Power supply circuit, operational amplifier and comparator

Abstract

The invention discloses a power supply circuit for differential input pair transistors, an operational amplifier and a comparator. The power supply circuit comprises a voltage stabilizing unit which comprises a first transistor connected between a first power supply voltage and a power supply node of a differential input geminate transistor; the control unit is used for providing a control signal for the control end of the first transistor according to the input voltage of the differential input geminate transistors, the first transistor is used for generating a power supply voltage according to the control signal, and the power supply voltage synchronously changes along with the input common-mode voltage of the differential input geminate transistors. According to the power supply circuit provided by the invention, the input common mode range can be expanded while the power supply rejection ratio of differential input pair transistors is improved.

Description

Technical Field

[0001] This invention relates to the field of integrated circuit technology, and in particular to a power supply circuit, an operational amplifier, and a comparator. Background Technology

[0002] Differential input transistor pairs are widely used as input stage circuits in basic circuits such as operational amplifiers and comparators. However, in typical differential input transistor pair structures, the operating state of the transistors changes with variations in the supply voltage, leading to alterations in the circuit's equivalent input offset voltage. This makes it difficult to improve the power supply rejection ratio, affecting the circuit's accuracy and reliability.

[0003] To improve the power supply rejection ratio (PSRR) of a circuit, existing technologies use a linear regulator circuit between the power supply node and the differential input pair to provide a stable supply voltage. However, the input voltage of the differential input pair must be strictly controlled within the supply voltage. If a linear regulator circuit is used to provide the supply voltage, due to its operating principle, the supply voltage provided to the differential input pair will inevitably be lower than the supply terminal voltage. This reduction in supply voltage further limits the range of input voltages available for the differential input pair, increasing the difficulty and complexity of circuit design. Summary of the Invention

[0004] In view of the above problems, the purpose of this application is to provide a power supply circuit, an operational amplifier and a comparator that can improve the power supply rejection ratio of the differential input pair transistors while expanding the input common-mode range of the differential input pair transistors.

[0005] According to one aspect of this application, a power supply circuit for a differential input pair transistor is provided, comprising: a voltage regulator unit including a first transistor connected between a first power supply voltage and a power supply node of the differential input pair transistor; and a control unit for providing a control signal to a control terminal of the first transistor according to the input voltage of the differential input pair transistor, the first transistor being configured to generate a power supply voltage according to the control signal, wherein the power supply voltage changes synchronously with the input common-mode voltage of the differential input pair transistor.

[0006] Optionally, the control unit includes: an input module that provides a control signal that changes synchronously with the input common-mode voltage based on the input voltage and the bias current; a bias module connected between the first power supply voltage and the input module for providing the bias current; and a load connected between the input module and ground, wherein the intermediate node between the input module and the bias module is connected to the control terminal of the first transistor.

[0007] Optionally, the input module includes: a second transistor, with a first terminal connected to the bias module, a second terminal connected to the load, and a control terminal connected to one of the input voltages.

[0008] Optionally, the input module includes a second transistor and a third transistor, wherein a first terminal of the second transistor is connected to a first terminal of the third transistor, and the intermediate node between the two is connected to the bias module; a second terminal of the second transistor is connected to a second terminal of the third transistor, and the intermediate node between the two is connected to the load; a control terminal of the second transistor is connected to one of the input voltages, and a control terminal of the third transistor is connected to the other of the input voltages.

[0009] Optionally, the input module further includes a first resistor connected between the first terminal of the second transistor and the bias module.

[0010] Optionally, the bias module includes a first current source or current mirror PMOS transistor connected between the first power supply voltage and the input module, and the load includes a second current source, current mirror NMOS transistor, or resistor connected between the input module and ground.

[0011] Optionally, the control unit further includes a filtering module, with each of the input voltages connected to the input module via its respective filtering module.

[0012] Optionally, each of the filtering modules includes: a second resistor, with a first end connected to the corresponding input voltage and a second end connected to the input module; and a capacitor connected between the second end of the second resistor and ground.

[0013] Optionally, the power supply circuit further includes a boost unit, and the bias module and the first transistor are connected to the first power supply voltage via the boost unit.

[0014] According to a second aspect of this application, an operational amplifier is provided, comprising: an input stage circuit including a differential input pair transistor; and a power supply circuit as described in any of the preceding claims.

[0015] According to a third aspect of this application, a comparator is provided, comprising: an input stage circuit including a differential input pair transistor; and a power supply circuit as described in any of the preceding claims.

[0016] According to the power supply circuit, operational amplifier, and comparator provided in this application, the input common-mode range of the differential input pair is effectively extended by providing a power supply voltage that changes synchronously with the input common-mode voltage of the differential input pair. Since the provided power supply voltage follows the control voltage, the influence of voltage fluctuations at the first power supply terminal on the power supply voltage of the differential input pair is avoided, resulting in a higher power supply rejection ratio for the differential input pair. Attached Figure Description

[0017] The above and other objects, features and advantages of the present invention will become more apparent from the following description of embodiments of the invention with reference to the accompanying drawings, in which:

[0018] Figure 1 A schematic structural diagram of the power supply circuit according to the first embodiment of this application is shown;

[0019] Figure 2 A schematic structural diagram of the power supply circuit according to the second embodiment of this application is shown;

[0020] Figure 3 A schematic structural diagram of the power supply circuit according to the third embodiment of this application is shown;

[0021] Figure 4 A schematic structural diagram of the power supply circuit according to the fourth embodiment of this application is shown. Detailed Implementation

[0022] Various embodiments of the invention will now be described in more detail with reference to the accompanying drawings. In the various drawings, the same elements are indicated by the same or similar reference numerals. For clarity, the various parts in the drawings are not drawn to scale.

[0023] Furthermore, certain terms are used in this specification and claims to refer to specific components. Those skilled in the art will understand that manufacturers may use different names to refer to the same component. This specification and claims do not distinguish components based on differences in name, but rather on differences in function.

[0024] It should be understood that, in the following description, "circuit" may include single or combined hardware circuits, programmable circuits, state machine circuits, and / or elements capable of storing instructions executed by the programmable circuit. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it may be directly coupled or connected to the other element, or there may be intermediate elements; the connection between elements may be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.

[0025] Furthermore, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0026] In this application, the MOSFET includes a first terminal, a second terminal, and a control terminal. When the MOSFET is in the on state, current flows from the first terminal to the second terminal. The first terminal, second terminal, and control terminal of a P-type MOSFET (PMOS transistor) are the source, drain, and gate, respectively. The first terminal, second terminal, and control terminal of an N-type MOSFET (NMOS transistor) are the drain, source, and gate, respectively.

[0027] This application discloses a power supply circuit for providing a supply voltage to a differential input pair transistor. The differential input pair transistor can be used as the input stage circuit of a circuit such as an operational amplifier or comparator. Specifically, the power supply circuit includes a control unit and a voltage regulator unit. More specifically, the voltage regulator unit includes a first transistor connected between a first power supply voltage and the power supply node of the differential input pair transistor. The control unit provides a control signal to the control terminal of the first transistor according to the input voltage of the differential input pair transistor. The voltage regulator unit formed by the first transistor provides the supply voltage according to the control signal. The supply voltage changes synchronously with the input common-mode voltage range of the differential input pair transistor. According to the power supply circuit, operational amplifier, and comparator provided in this application, by providing a supply voltage that changes synchronously with the input common-mode voltage of the differential input pair transistor, the input common-mode range of the differential input pair transistor is effectively extended. Because the provided supply voltage follows the control voltage, the influence of voltage fluctuations at the first power supply terminal on the supply voltage of the differential input pair transistor is avoided, resulting in a higher power supply rejection ratio for the differential input pair transistor.

[0028] To facilitate understanding of the power supply circuit provided in this application, Figure 1 A schematic structural diagram of the power supply circuit according to the first embodiment of this application is shown. The following is in conjunction with... Figure 1 The power supply circuit provided in this application is described in detail.

[0029] refer to Figure 1The power supply circuit 100 provided in this application is used to provide a power supply voltage for the differential input pair transistors. Furthermore, the differential input pair transistors are used in the aforementioned input stage circuit 10 as an example. Figure 1 In this circuit, the input stage 10 includes a differential input pair composed of PMOS transistors and a tail current source Iw. Specifically, the differential input pair includes a first input transistor PM11 and a second input transistor PM12. A positive voltage VINP and a negative voltage VINN are provided as a pair of input voltages to the differential input pair. The control terminal of the first input transistor PM11 receives the positive voltage VINP, and the control terminal of the second input transistor PM12 receives the negative voltage VINN. The first terminals of the first input transistor PM11 and the second input transistor PM12 are connected together and connected to the supply voltage VDDIN via the tail current source Iw. The second terminals of both the first input transistor PM11 and the second input transistor PM12 are connected to the subsequent stage circuit and provide input current to the subsequent stage circuit. More specifically, taking the differential input pair multiplexed as the input stage circuit of an operational amplifier as an example, the second terminals of both the first input transistor PM11 and the second input transistor PM12 can be sequentially connected to the load stage circuit and the output stage circuit of the operational amplifier. It should be noted that when the differential input pairs composed of PMOS transistors are multiplexed as the input stage circuit of a rail-to-rail operational amplifier, the input stage circuit also includes a set of differential input pairs composed of NMOS transistors. By connecting the two sets of differential input pairs in parallel to form a complementary structure, a rail-to-rail input stage is achieved, thus adapting to scenarios with wide power supply voltage variations.

[0030] The power supply circuit 100 includes a control unit 110 and a voltage regulator unit 120. The voltage regulator unit 120 includes a first transistor M0 connected between the first power supply voltage VDD and the power supply node of the differential input pair transistors. The first transistor M0 is used to form a voltage follower circuit. Figure 1 In this example, the first transistor M0 is an NMOS transistor, with its first terminal connected to the first power supply voltage VDD and its second terminal connected to the power supply node of the differential input pair, i.e., the power supply node of the input stage circuit 10. It should be understood that in some embodiments, the first transistor M0 may also be a bipolar transistor or other types of transistors.

[0031] Control unit 110 provides a control signal VB1 to the control terminal of the first transistor M0 based on the input voltage of the differential input pair. More specifically, control unit 110 includes an input module 111, a bias module 112, and a load 113. Input module 111 provides the control signal VB1, which changes synchronously with the input common-mode voltage, based on the input voltage and bias current of the differential input pair. Bias module 112 is connected between the first power supply voltage VDD and input module 111 to provide the aforementioned bias current. Load 113 is connected between input module 111 and ground. The intermediate node between input module 111 and bias module 112 is connected to the control terminal of the first transistor M0 to provide the control signal VB1. Figure 1 In this example, bias module 112 includes a first current source I1, and load 113 includes a second current source I2. In other embodiments, bias module 112 may include a current mirror PMOS transistor, and / or load 113 may include a current mirror NMOS transistor or a resistor.

[0032] In some embodiments, the difference between the positive voltage VINP and the negative voltage VINN is less than a set value, meaning that VINP and VINN are approximately equal. Then, refer to... Figure 1 The input module 111 may include a second transistor PM21. The first terminal of the second transistor PM21 is connected to the bias module 112, the second terminal is connected to the load 113, and the control terminal is connected to one of the input voltages (positive voltage VINP and negative voltage VINN). In a preferred embodiment, as shown... Figure 1 As shown, the control terminal of the second transistor PM21 is connected to the positive voltage VINP. Since the positive voltage VINP and the negative voltage VINN are approximately equal, the common-mode voltage Vcm of the positive voltage VINP and the negative voltage VINN is also approximately equal to VINP and VINN. When the second transistor PM21 is turned on, the voltage at its first terminal can be approximated as Vcm + |Vth|, where |Vth| is the turn-on threshold of the first transistor. Therefore, the input module 111 can provide a control signal VB1 that follows the synchronous change of the input common-mode voltage of the differential input pair and is slightly greater than the common-mode voltage Vcm.

[0033] Continue to refer to Figure 1 The first transistor M0 provides the supply voltage VDDIN for the follower control voltage VB1 via a source-follower connection. This avoids the influence of voltage fluctuations at the first supply terminal VDD on the supply voltage VDDIN, which helps maintain a stable operating state for the differential input pair and gives the input stage circuit 10 a higher power supply rejection ratio. Furthermore, since the control voltage VB1 is obtained based on the input common-mode voltage and is slightly larger than the input common-mode voltage, it is more conducive to expanding the input common-mode range of the differential input pair.

[0034] In a preferred embodiment, such as Figure 1 As shown, the input module 111 also includes a first resistor R1 connected between the first terminal of the second transistor PM21 and the bias module 112. The control signal VB1 is obtained by superimposing the voltage division of the first resistor R1 on the common-mode voltage Vcm, which can ensure that the supply voltage VDDIN provided by the power supply circuit 100 is greater than the input common-mode voltage of the differential input pair transistors, which is more conducive to improving the stability of the input stage circuit.

[0035] In order to further expand the applicability of the power supply circuit of this application. Figure 2 A schematic structural diagram of the power supply circuit according to the second embodiment of this application is shown.

[0036] refer to Figure 2 In the second embodiment, the power supply circuit 200 is also used to provide a power supply voltage VDDIN to the input stage circuit 10, i.e., the differential input pair. Unlike the first embodiment, the second embodiment does not impose many restrictions on the pair of input voltages provided to the differential input pair. That is, in the second embodiment, it is not required that the positive voltage VINP and the negative voltage VINN be approximately equal. Therefore, compared to the power supply circuit 100 of the first embodiment, the power supply circuit 200 of the second embodiment can be applied to more application scenarios. However, it should be understood that, from a cost-saving perspective, in a preferred embodiment, the power supply circuit 100 provided in the first embodiment can be used when the difference between the positive voltage VINP and the negative voltage VINN is less than a set value (i.e., approximately equal); conversely, the power supply circuit 200 provided in the second embodiment can be used when the difference between the positive voltage VINP and the negative voltage VINN is greater than or equal to a set value.

[0037] Continue to refer to Figure 2 The power supply circuit 200 provided in the second embodiment of this application includes a control unit 210 and a voltage regulator unit 120 (i.e., a first transistor M0 with the same connection method) as in the first embodiment. The control unit 210 also includes the same bias module 112 and load 113 as in the first embodiment. To avoid limiting the magnitude of the positive voltage VINP and the negative voltage VINN, compared to the control unit 110 in the first embodiment, in the second embodiment, the input module 211 of the control unit 210 includes a third transistor PM22 in addition to the second transistor PM21.

[0038] In this configuration, the first terminal of the second transistor PM21 is connected to the first terminal of the third transistor PM22, and the intermediate node between them is connected to the bias module 112. The second terminal of the second transistor PM21 is connected to the second terminal of the third transistor PM22, and the intermediate node between them is connected to the load 113. The control terminal of the second transistor PM21 is connected to one of the input voltages, and the control terminal of the third transistor PM22 is connected to the other of the input voltages. The intermediate node between the input module 211 and the bias module 112 is connected to the control terminal of the first transistor M0 to provide the control signal VB2. Figure 2 In this example, the bias module 112 includes a first current source I1, the load 113 includes a second current source I2, and the control terminal of the second transistor PM21 is connected to a positive voltage VINP. Correspondingly, the control terminal of the third transistor PM22 is connected to a negative voltage VINN.

[0039] Furthermore, such as Figure 2 As shown, in a preferred embodiment, the input module 211 also includes a first resistor R1 connected between the bias module 112 and the first terminal of the second transistor PM21.

[0040] Since the control voltage VB2 is obtained based on the common-mode voltage of the positive voltage VINP and the negative voltage VINN, and preferably by superimposing the voltage division of the first resistor R1 on the common-mode voltage, the second embodiment of this application can also expand the input common-mode range of the differential input pair while improving the power supply rejection ratio. Furthermore, the second embodiment provided by this application can further reduce the limitation on the input voltage.

[0041] Figure 3 A schematic structural diagram of the power supply circuit according to the third embodiment of this application is shown. The power supply circuit 300 of the third embodiment is also used to provide a power supply voltage VDDIN to the input stage circuit 10, i.e., the differential input pair transistors. Furthermore, unlike the first and second embodiments, in the third embodiment of this application, the power supply circuit 300 includes a boost unit in addition to the control unit and the voltage regulator unit.

[0042] As an example, in Figure 3 In this example, the power supply circuit 300 has the same voltage regulator unit 120 as in the first and second embodiments described above, and the same control unit 210 as in the second embodiment described above. The control unit 220 includes, for example, the following components: Figure 2The diagram shows an input module 211, a bias module 112, and a load 113, with the intermediate node between the input module 211 and the bias module 112 providing a control signal VB3. That is, in the third embodiment of this application, it also includes a second transistor PM21, a third transistor PM22, a first transistor M0, a first current source I1, and a second current source I2, all with the same connection relationships as described above. Furthermore, in a preferred embodiment, a first resistor R1 is also included.

[0043] like Figure 3 As shown, the power supply circuit 300 of the third embodiment also includes a boost unit 330. The first terminal of the first transistor M0 and the bias module 112 are both connected to the first power supply terminal VDD via the boost unit 330. The boost unit 330 can be implemented using any level shifting circuit in the prior art. By configuring the boost unit 330, the control voltage VB3 can approach or even exceed the voltage of the first power supply terminal VDD, which in turn allows the supply voltage VDDIN to approach or even exceed the voltage of the first power supply terminal VDD, thereby enabling the differential input pair to support a higher input common-mode range.

[0044] It should be understood that, although in Figure 3 The example provided uses input module 211, which includes a second transistor PM21 and a third transistor PM22. However, it should be understood that even if the input unit 111 provided in the first embodiment is used, i.e., the input unit includes the second transistor PM21, a boost unit can still be provided in the power supply circuit.

[0045] Furthermore, Figure 4 A schematic structural diagram of the power supply circuit according to the fourth embodiment of this application is shown. In the fourth embodiment of this application, the power supply circuit 400 is also used to provide a power supply voltage VDDIN for the differential input pair transistors. Unlike the embodiments described above, in the power supply circuit 400 of the fourth embodiment, the control voltage generation unit 410 further includes a filtering module. The positive voltage VINP and the negative voltage VINN are connected to the input module via their respective filtering modules. The filtering module is, for example, an RC filter circuit. Specifically, each filtering module includes a second resistor and a capacitor. The first end of the second resistor is connected to the corresponding input voltage, the second end is connected to the input module, and the capacitor is connected between the second end of the second resistor and ground. The inclusion of the filtering module enhances the power supply circuit's anti-interference capability.

[0046] refer to Figure 4 Taking the power supply circuit 400 as an example, which includes the same voltage regulator unit 120 as in the first to third embodiments described above, the power supply voltage VDDIN follows the control voltage VB4 through the first transistor M0 with a source follower connection.

[0047] In the power supply circuit 400 of the fourth embodiment, the control unit 410 includes, in addition to the same input module 211, bias module 112 and load 113 as in the second embodiment, a filter module 414a corresponding to the positive voltage VINP and a filter module 414b corresponding to the negative voltage VINP.

[0048] More specifically, the connection method of the second transistor PM21, the third transistor PM22, the first current source I1, the second current source I2, and the first resistor R1 in the control unit 410 is the same as in the second and third embodiments. The filter module 414a includes a second resistor R2a and a capacitor Ca connected between the positive voltage VINP and ground, with the intermediate node of the second resistor R2a and the first capacitor Ca connected to the control terminal of the second transistor PM21. The filter module 414b includes a second resistor R2b and a capacitor Cb connected between the negative voltage VINN and ground, with the intermediate node of the second resistor R2b and the capacitor Cb connected to the control terminal of the third transistor PM22.

[0049] It should be understood that, although in Figure 4 The example provided uses input module 211, which includes a second transistor PM21 and a third transistor PM23. However, it should be understood that even if input module 111 provided in the first embodiment is used, i.e., the input module includes a second transistor PM21, a filtering module can still be set in the control unit.

[0050] Furthermore, although the second transistor PM21 and the third transistor PM22 are both PMOS transistors in the examples of Embodiments 1 to 4 above, it should be understood that in some embodiments, the second transistor PM21 and the third transistor PM22 may also be NMOS transistors. Further, although the third and fourth embodiments respectively show examples of a power supply circuit including a boost unit and a filter module, in some embodiments, the filter module and the boost circuit may also coexist in the power supply circuit.

[0051] Further, in a preferred embodiment, for any of the above embodiments, the size of the transistor in the control unit can be one-Nth of the size of a single input transistor in the differential input pair. N ≥ 2 and is an integer. For example, the size of the second transistor PM21 and the third transistor PM22 can be one-tenth the size of the first input transistor PM11, that is, one-tenth the size of the second input transistor PM12.

[0052] This application also provides an operational amplifier whose input stage circuit includes a differential input pair transistor. The operational amplifier also includes a power supply circuit provided in this application to provide a power supply voltage to the differential input pair transistor. Therefore, this operational amplifier also possesses any of the aforementioned beneficial effects.

[0053] This application also provides a comparator whose input stage circuit includes a differential input pair transistor, and the comparator further includes a power supply circuit provided in this application to provide a power supply voltage to the differential input pair transistor. Therefore, this comparator also has any of the aforementioned beneficial effects.

[0054] According to the power supply circuit, operational amplifier, and comparator provided in this application, the input common-mode range of the differential input pair is effectively extended by providing a power supply voltage that changes synchronously with the input common-mode voltage of the differential input pair. Since the provided power supply voltage follows the control voltage, the influence of voltage fluctuations at the first power supply terminal on the power supply voltage of the differential input pair is avoided, resulting in a higher power supply rejection ratio for the differential input pair.

[0055] As described above, these embodiments of this application do not exhaustively cover all details, nor do they limit this application to specific embodiments. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of this application, thereby enabling those skilled in the art to effectively utilize this application and its modifications. The scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A power supply circuit for a differential input pair transistor, wherein, include: The voltage regulator unit includes a first transistor connected between the first power supply voltage and the power supply node of the differential input pair transistors; as well as The control unit is configured to provide a control signal to the control terminal of the first transistor based on the input voltage of the differential input pair transistors, and the first transistor is configured to generate a supply voltage based on the control signal. The supply voltage changes synchronously with the input common-mode voltage of the differential input pair transistors.

2. The power supply circuit according to claim 1, wherein, The control unit includes: The input module provides the control signal, which changes synchronously with the input common-mode voltage, based on the input voltage and bias current; and A bias module, connected between the first power supply voltage and the input module, is used to provide the bias current; and The load is connected between the input module and ground. The intermediate node between the input module and the bias module is connected to the control terminal of the first transistor.

3. The power supply circuit according to claim 2, wherein, The input module includes: The second transistor has a first terminal connected to the bias module, a second terminal connected to the load, and a control terminal connected to one of the input voltages.

4. The power supply circuit according to claim 2, wherein, The input module includes: a second transistor and a third transistor. The first terminal of the second transistor is connected to the first terminal of the third transistor, and the intermediate node between them is connected to the bias module. The second terminal of the second transistor is connected to the second terminal of the third transistor, and the intermediate node between them is connected to the load. The control terminal of the second transistor is connected to one of the input voltages, and the control terminal of the third transistor is connected to the other of the input voltages.

5. The power supply circuit according to any one of claims 3 or 4, wherein, The input module further includes a first resistor connected between the first terminal of the second transistor and the bias module.

6. The power supply circuit according to claim 2, wherein, The bias module includes a first current source or current mirror PMOS transistor connected between the first power supply voltage and the input module. The load includes: a second current source, a current mirror NMOS transistor, or a resistor connected between the input module and ground.

7. The power supply circuit according to claim 2, wherein, The control unit further includes a filtering module, and each of the input voltages is connected to the input module via its respective filtering module.

8. The power supply circuit according to claim 7, wherein, Each of the filtering modules includes: The second resistor has its first end connected to the corresponding input voltage and its second end connected to the input module; and A capacitor is connected between the second terminal of the second resistor and ground.

9. The power supply circuit according to claim 2, wherein, The power supply circuit also includes a boost unit, and the bias module and the first transistor are connected to the first power supply voltage via the boost unit.

10. An operational amplifier, wherein, include: Input stage circuitry, including differential input pairs; as well as The power supply circuit as described in any one of claims 1-9.

11. A comparator, wherein, include: The input stage circuitry includes differential input pairs of transistors: and The power supply circuit as described in any one of claims 1-9.

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