Bonded wafer and polishing method thereof

Abstract

The invention provides a bonding wafer and a polishing method thereof, in the polishing method of the bonding wafer, after a grinding process is executed on the bonding wafer, a rough polishing process and a fine polishing process are sequentially executed on the bonding wafer, the removal amount of the fine polishing process is larger than or equal to 0.4 time of the removal amount of the rough polishing process, and the removal amount of the rough polishing process is larger than or equal to 0.4 time of the removal amount of the fine polishing process. The removal amount of the fine polishing process is greater than or equal to 0.4 time of the removal amount of the rough polishing process, so that the surface defects of the bonding wafer can be improved, the granularity of the surface of the polished bonding wafer can be reduced, the scratch of the surface of the bonding wafer can be reduced or avoided, and the quality of the device can be improved. The number of particles with the diameter of 37 nm on the surface of the bonded wafer is smaller than 10, and the number of scratches on the surface of the bonded wafer is smaller than or equal to 1.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of integrated circuit technology, and in particular to a bonded wafer and a polishing method thereof. BACKGROUND

[0002] Silicon on insulator (SOI) technology has become one of the mainstream products in most electronic material fields. The uneven thickness of the top layer of silicon in the SOI wafer can cause unstable device performance, inconsistent current density of local electronic channels, uneven thermal effects, and even line width variation.

[0003] In the preparation process of the SOI wafer, the chemical mechanical polishing process is one of the main polishing processes in the manufacturing process of the SOI wafer, which can not only further improve the uniformity of the SOI wafer, but also repair mechanical damage to the surface of the SOI wafer to obtain a wafer with high flatness and low roughness. The chemical mechanical polishing process (CMP) is a global planarization process, and its working principle combines chemical corrosion and mechanical polishing. In the process of performing the chemical mechanical polishing process, the chemicals in the polishing liquid first react with the top layer of silicon of the SOI wafer to passivate it, and then pressure is applied by a polishing head, the SOI wafer moves relative to the polishing pad, and the abrasive particles distributed on the polishing pad remove the passivated silicon. However, in the current polishing process, the surface particle size of the bonded wafer after polishing is large and the surface is prone to scratches. SUMMARY

[0004] The purpose of the present application is to provide a bonded wafer and a polishing method thereof to improve the surface defects of the bonded wafer, reduce the surface particle size of the bonded wafer after polishing, and reduce or avoid surface scratches of the bonded wafer.

[0005] To achieve the above purpose, the present application provides a polishing method of a bonded wafer, comprising: providing a bonded wafer, the bonded wafer comprising a support substrate, a buried oxygen layer and a device substrate stacked in order from bottom to top; performing a polishing process on the bonded wafer; sequentially performing a rough polishing process and a fine polishing process on the bonded wafer, the removal amount of the fine polishing process being greater than or equal to 0.4 times the removal amount of the rough polishing process, so as to remove the polishing damage layer on the surface of the device substrate and thin the thickness of the device substrate to a target thickness.

[0006] Optionally, in the polishing method of the bonded wafer, the removal amount of the rough polishing process is 0.3 μm to 2 μm.

[0007] Optionally, in the polishing method for the bonded wafer, the polishing slurry used in the rough polishing process is an alkaline polishing slurry, and the size of the abrasive particles is 60 nm to 80 nm.

[0008] Optionally, in the polishing method for the bonded wafer, the pH of the polishing solution used in the rough polishing process is 10.3~11.6.

[0009] Optionally, in the polishing method for the bonded wafer, the polishing slurry used in the fine polishing process is an alkaline polishing slurry, and the size of the abrasive particles is 30 nm to 40 nm.

[0010] Optionally, in the polishing method for the bonded wafer, the pH of the polishing solution used in the fine polishing process is 10-11.

[0011] Optionally, in the polishing method for the bonding wafer, the grinding process includes a coarse grinding process and a fine grinding process performed sequentially, wherein the grinding thickness of the coarse grinding process is greater than the grinding thickness of the fine grinding process.

[0012] Optionally, in the polishing method for the bonding wafer, the coarse grinding process uses a coarse grinding wheel with a mesh size of 300-400 mesh and a spindle speed of 2000-3000 rpm.

[0013] Optionally, in the polishing method for the bonding wafer, the fine grinding process uses a fine grinding wheel with a mesh size of 5000-8000 and a spindle speed of 1000-2000 rpm.

[0014] Based on the same inventive concept, the present invention also provides a bonding wafer, which is prepared by the bonding wafer polishing method described above, wherein the number of particles with a diameter of 37 nm on the surface of the bonding wafer is less than 10, and the number of scratches on the surface of the bonding wafer is less than or equal to 1.

[0015] In the bonding wafer and polishing method provided by the present invention, after performing a grinding process on the bonding wafer, a coarse polishing process and a fine polishing process are sequentially performed on the bonding wafer. The removal amount of the fine polishing process is greater than or equal to 0.4 times the removal amount of the coarse polishing process, so as to remove the grinding damage layer on the surface of the device substrate and reduce the thickness of the device substrate to the target thickness. Since the removal amount of the fine polishing process is greater than or equal to 0.4 times the removal amount of the coarse polishing process, the surface defects of the bonding wafer can be improved, the particle size of the surface of the polished bonding wafer can be reduced, and scratches on the surface of the bonding wafer can be reduced or avoided, so that the number of particles with a diameter of 37nm on the surface of the bonding wafer is less than 10, and the number of scratches on the surface of the bonding wafer is less than or equal to 1. Attached Figure Description

[0016] Figure 1 This is a schematic flowchart of the polishing method for bonded wafers provided in an embodiment of the present invention; Figures 2-3 This is a schematic diagram of the structure formed in the polishing method of the bonded wafer provided in the embodiment of the present invention; Figures 4-11 This is a schematic diagram of the surface particles of the bonded wafer in each embodiment of the polishing method for bonded wafers provided in this invention. The reference numerals in the attached figures are explained as follows: 100 - Bonding wafer; 101 - Device substrate; 102 - Buried oxide layer; 103 - Supporting substrate. Detailed Implementation

[0017] The bonding wafer and its polishing method proposed in this invention will be further described in detail below with reference to the accompanying drawings and specific embodiments. The advantages and features of this invention will become clearer from the following description. It should be noted that the drawings are all in a very simplified form and use non-precise proportions, only for the purpose of conveniently and clearly illustrating the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structure. In particular, different proportions may be used in different drawings to illustrate different aspects.

[0018] Figure 1 This is a schematic flowchart of the polishing method for bonded wafers provided in an embodiment of the present invention. Figure 1 As shown, the polishing method for bonded wafers provided in this embodiment includes: Step S1: Provide a bonding wafer, the bonding wafer comprising a support substrate, a buried oxide layer and a device substrate stacked sequentially from bottom to top; Step S2: Perform a polishing process on the bonded wafer; Step S3: Perform a rough polishing process and a fine polishing process on the bonding wafer in sequence. The amount of material removed by the fine polishing process is greater than or equal to 0.4 times the amount of material removed by the rough polishing process, so as to remove the lattice damage layer on the surface of the device substrate and reduce the thickness of the device substrate to the target thickness.

[0019] Figures 2-3 This is a schematic diagram of the structure formed in the polishing method of the bonded wafer provided in an embodiment of the present invention. The following will refer to the attached diagram. Figures 2-3 The polishing method for bonded wafers provided in this embodiment will be described in more detail.

[0020] like Figure 2As shown, in step S1, a bonding wafer 100 is provided, which includes a support substrate 103, a buried oxide layer 102, and a device substrate 101 stacked sequentially from bottom to top. Specifically, the method for forming the bonding wafer 100 includes: first, providing a device substrate 101, on which a buried oxide layer 102 is formed, the thickness of which can be 0.2 μm to 2 μm. The device substrate 101 can be made of silicon, and the buried oxide layer 102 is made of silicon oxide.

[0021] Then, a support substrate 103 is provided, which may be made of silicon and has a thickness of 772μm to 777μm.

[0022] Next, as Figure 2 As shown, the support substrate 103 and the device substrate 101 are bonded to form a bonded wafer 100, and the buried oxide layer 102 is located between the device substrate 101 and the support substrate 103.

[0023] In this embodiment, the support substrate 103 and the device substrate 101 can be bonded by low-pressure bonding. The low-pressure bonding pressure can be 0.01 mbar to 100 mbar, preferably 5 mbar.

[0024] In this embodiment, the combined deflection angle between the device substrate 101 and the support substrate 103 can be 0.1 degrees to 0.6 degrees, preferably 0.2 degrees to 0.4 degrees.

[0025] Subsequently, the bonding wafer 100 is subjected to a hardening heat treatment process, a chamfering process, and an edge etching process in sequence. The hardening heat treatment temperature is 900℃~1250℃, the hardening heat treatment time is 1h~3h, and the atmosphere is an inert gas containing oxygen or hydrogen, such as argon (Ar), nitrogen (N2), or helium (He).

[0026] Next, as Figure 3 As shown, step S2 is performed to conduct a polishing process on the bonding wafer 100. The polishing process includes a coarse polishing process and a fine polishing process performed sequentially, wherein the polishing thickness of the coarse polishing process is greater than the polishing thickness of the fine polishing process.

[0027] Specifically, during the coarse grinding process, a biaxial grinder is used to grind the surface of the device substrate 101 of the bonding wafer 100; that is, the coarse grinding process is a mechanical grinding process. The coarse grinding wheel used in the coarse grinding process can have a mesh size of 300-400 mesh, preferably 325 mesh, and the spindle speed can be 2000 rpm-3000 rpm.

[0028] After performing the coarse grinding process, a fine grinding process is performed on the bonding wafer 100. A biaxial grinder is used to grind the surface of the device substrate 101 of the bonding wafer 100 so that the thickness of the device substrate 101 after grinding is less than 30 μm. Preferably, the thickness of the device substrate 101 after grinding is 15 μm.

[0029] When performing the fine grinding process, the fine grinding wheel used in the fine grinding process can have a mesh size of 5000-8000 mesh, and the spindle speed can be 1000rpm-2000rpm.

[0030] Next, step S3 is executed, in which a coarse polishing process and a fine polishing process are sequentially performed on the bonding wafer 100. The removal amount of the fine polishing process is greater than or equal to 0.4 times the removal amount of the coarse polishing process, so as to remove the grinding damage layer on the surface of the device substrate 101 and reduce the thickness of the device substrate 101 to the target thickness.

[0031] Specifically, a rough polishing process is first performed on the device substrate 101 in the bonding wafer 100. The rough polishing process is used to remove the grinding damage layer on the surface of the bonding wafer 100, that is, to remove the grinding damage layer on the surface of the device substrate 101. Since the aforementioned grinding process will cause mechanical grinding damage to the surface of the bonding wafer 100, the rough polishing process can remove the grinding damage layer on the surface of the bonding wafer 100 and remove part of the thickness of the device substrate 101 so that the thickness of the device substrate 101 is close to the target thickness.

[0032] In this embodiment, the coarse polishing process is a chemical mechanical polishing (CMP) process. During the coarse polishing process, a hard polishing pad is used for polishing, and the polishing slurry is an alkaline slurry with a pH value of 10.3~11.6, preferably 11, to achieve efficient removal of the polishing damage layer while reducing the surface roughness of the device substrate and ensuring process stability. The size of the abrasive particles in the coarse polishing process is 60 nm~80 nm, preferably 70 nm.

[0033] After performing the rough polishing process, a fine polishing process is performed on the device substrate 101 in the bonding wafer 100 to planarize the surface of the device substrate 101 and reduce the thickness of the device substrate 101 to a target thickness, which can be 1 μm to 5 μm.

[0034] In this embodiment, the fine polishing process is a chemical mechanical polishing process. During the fine polishing process, a soft polishing pad is used for polishing, and the polishing solution is an alkaline polishing solution with a pH value of 10-11, preferably 10.5. This helps to reduce the surface roughness of the device substrate. The size of the abrasive particles in the fine polishing process is 30nm-40nm, preferably 35nm.

[0035] In this embodiment, the amount of material removed by the fine polishing process is greater than or equal to 0.4 times the amount of material removed by the coarse polishing process, that is, the ratio between the amount of material removed by the fine polishing process and the amount of material removed by the coarse polishing process is greater than or equal to 0.4.

[0036] For example, the amount of material removed by the fine polishing process is equal to the amount of material removed by the coarse polishing process, or the amount of material removed by the fine polishing process is greater than the amount of material removed by the coarse polishing process.

[0037] Specifically, the amount of material removed by the fine polishing process and the amount removed by the coarse polishing process satisfy the following relationship: B≥0.4A; where B represents the amount removed by the fine polishing process and A represents the amount removed by the coarse polishing process, and the units of the amount removed by the fine polishing process and the coarse polishing process are both μm.

[0038] Since the removal amount of the fine polishing process is greater than or equal to 0.4 times that of the coarse polishing process, the surface defects of the bonding wafer 100 can be improved, the grain size of the surface of the bonding wafer 100 after polishing can be reduced, and scratches on the surface of the bonding wafer 100 can be reduced.

[0039] Table 1 Comparison of various embodiments

[0040] As shown in Table 1, in Embodiment 1, a bonding wafer 100 is provided, which includes a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence; a grinding process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, wherein the removal amount of the rough polishing process is 0.5 μm, the removal amount of the fine polishing process is 0.1 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.2.

[0041] like Figure 4 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 20 particles with a diameter of 37nm on the surface of the bonding wafer 100, and 2 scratches (or marks) on the surface of the bonding wafer 100.

[0042] In Embodiment 2, a bonding wafer 100 is provided, which includes a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top. The bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence. A polishing process is performed on the bonding wafer 100. A rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence. The removal amount of the rough polishing process is 0.5 μm, the removal amount of the fine polishing process is 0.3 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.6.

[0043] like Figure 5 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 6 particles with a diameter of 37nm on the surface of the bonding wafer 100, and there were 0 scratches (or marks) on the surface of the bonding wafer 100, that is, there were no scratches on the surface of the bonding wafer 100.

[0044] In Embodiment 3, a bonding wafer 100 is provided, which includes a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence; a polishing process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, wherein the removal amount of the rough polishing process is 1 μm, the removal amount of the fine polishing process is 0.3 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.3.

[0045] like Figure 6 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 38 particles with a diameter of 37nm on the surface of the bonding wafer 100, and 5 scratches (or marks) on the surface of the bonding wafer 100.

[0046] In Embodiment 4, a bonding wafer 100 is provided, which includes a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence; a polishing process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, wherein the removal amount of the rough polishing process is 1 μm, the removal amount of the fine polishing process is 0.5 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.5.

[0047] like Figure 7 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 4 particles with a diameter of 37nm on the surface of the bonding wafer 100, and there were 0 scratches (or marks) on the surface of the bonding wafer 100, that is, there were no scratches on the surface of the bonding wafer 100.

[0048] In Embodiment 5, a bonding wafer 100 is provided, the bonding wafer 100 comprising a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence; a polishing process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, the removal amount of the rough polishing process is 1.5 μm, the removal amount of the fine polishing process is 0.45 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.3.

[0049] like Figure 8 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 35 particles with a diameter of 37nm on the surface of the bonding wafer 100, and 5 scratches (or marks) on the surface of the bonding wafer 100.

[0050] In Embodiment Six, a bonding wafer 100 is provided, the bonding wafer 100 comprising a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence; a polishing process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, the removal amount of the rough polishing process is 1.5 μm, the removal amount of the fine polishing process is 0.9 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.6.

[0051] like Figure 9 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 3 particles with a diameter of 37nm on the surface of the bonding wafer 100, and there were 0 scratches (or marks) on the surface of the bonding wafer 100, that is, there were no scratches on the surface of the bonding wafer 100.

[0052] In Embodiment Seven, a bonding wafer 100 is provided, the bonding wafer 100 comprising a support substrate, a buried oxide layer, and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process, and an edge etching process in sequence; a polishing process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, the removal amount of the rough polishing process is 2 μm, the removal amount of the fine polishing process is 0.6 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.3.

[0053] like Figure 10As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 24 particles with a diameter of 37nm on the surface of the bonding wafer 100, and 3 scratches (or marks) on the surface of the bonding wafer 100.

[0054] In Embodiment 8, a bonding wafer 100 is provided, the bonding wafer 100 comprising a support substrate, a buried oxide layer and a device substrate stacked sequentially from bottom to top; the bonding wafer 100 is subjected to a hardening heat treatment, a chamfering process and an edge etching process in sequence; a polishing process is performed on the bonding wafer 100; a rough polishing process and a fine polishing process are performed on the bonding wafer 100 in sequence, the removal amount of the rough polishing process is 2 μm, the removal amount of the fine polishing process is 0.8 μm, and the ratio between the removal amount of the fine polishing process and the removal amount of the rough polishing process is 0.4.

[0055] like Figure 11 As shown, after performing the coarse polishing process and the fine polishing process in sequence, the SPX test showed that there were 4 particles with a diameter of 37nm on the surface of the bonding wafer 100, and there were 0 scratches (or marks) on the surface of the bonding wafer 100, that is, there were no scratches on the surface of the bonding wafer 100.

[0056] Based on the above eight embodiments, it can be seen that in Embodiments 2, 4, 6, and 8, since the removal amount of the fine polishing process is greater than or equal to 0.4 times the removal amount of the coarse polishing process (the ratio of the removal amount of the fine polishing process to the removal amount of the coarse polishing process is greater than or equal to 0.4), the number of particles with a diameter of 37nm on the surface of the bonding wafer 100 after the fine polishing process is less than or equal to 6ea, and there are no obvious scratches on the surface of the bonding wafer 100. In other words, the bonding wafer polishing method provided in this embodiment can effectively improve the surface defects of the bonding wafer, reduce the particle size of the surface of the polished bonding wafer, and reduce or avoid scratches on the surface of the bonding wafer.

[0057] This embodiment also provides a bonding wafer, which is prepared by the polishing method of the bonding wafer provided in this embodiment. The number of particles with a diameter of 37 nm on the surface of the bonding wafer is less than 10, and the number of scratches on the surface of the bonding wafer is less than or equal to 1.

[0058] In summary, in the bonding wafer and polishing method provided by this invention, after performing a grinding process on the bonding wafer, a coarse polishing process and a fine polishing process are sequentially performed on the bonding wafer. The removal amount of the fine polishing process is greater than or equal to 0.4 times the removal amount of the coarse polishing process, in order to remove the grinding damage layer on the surface of the device substrate and reduce the thickness of the device substrate to the target thickness. Since the removal amount of the fine polishing process is greater than or equal to 0.4 times the removal amount of the coarse polishing process, the surface defects of the bonding wafer can be improved, the particle size of the surface of the polished bonding wafer can be reduced, and the scratches on the surface of the bonding wafer can be reduced, so that the number of particles with a diameter of 37nm on the surface of the bonding wafer is less than 10, and the number of scratches on the surface of the bonding wafer is less than or equal to 1.

[0059] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to mutually. In addition, different parts between embodiments can also be combined with each other, and this invention does not limit this.

[0060] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A polishing method for bonded wafers, characterized in that, include: A bonding wafer is provided, the bonding wafer comprising a support substrate, a buried oxide layer and a device substrate stacked sequentially from bottom to top; A grinding process is performed on the bonded wafer; The bonding wafer is subjected to a coarse polishing process and a fine polishing process in sequence. The amount of material removed by the fine polishing process is greater than or equal to 0.4 times that of the coarse polishing process, in order to remove the grinding damage layer on the surface of the device substrate and reduce the thickness of the device substrate to the target thickness.

2. The polishing method for bonding wafers as described in claim 1, characterized in that, The removal amount of the coarse polishing process is 0.3μm~2μm.

3. The polishing method for bonding wafers as described in claim 1, characterized in that, The coarse polishing process uses an alkaline polishing slurry, and the size of the abrasive particles is 60nm~80nm.

4. The polishing method for bonding wafers as described in claim 3, characterized in that, The pH of the polishing solution used in the rough polishing process is 10.3~11.

6.

5. The polishing method for bonding wafers as described in claim 1, characterized in that, The polishing process uses an alkaline polishing solution, and the size of the abrasive particles is 30nm~40nm.

6. The polishing method for bonding wafers as described in claim 5, characterized in that, The polishing solution used in the fine polishing process has a pH of 10-11.

7. The polishing method for bonding wafers as described in claim 1, characterized in that, The grinding process includes a coarse grinding process and a fine grinding process performed sequentially, wherein the grinding thickness of the coarse grinding process is greater than the grinding thickness of the fine grinding process.

8. The polishing method for bonding wafers as described in claim 7, characterized in that, The coarse grinding process uses a coarse grinding wheel with a mesh size of 300-400 mesh and a spindle speed of 2000-3000 rpm.

9. The polishing method for bonding wafers as described in claim 7, characterized in that, The fine grinding process uses a fine grinding wheel with a mesh size of 5000-8000 and a spindle speed of 1000-2000 rpm.

10. A bonding wafer, characterized in that, The bonding wafer is prepared by the polishing method of the bonding wafer as described in any one of claims 1 to 9, wherein the number of particles with a diameter of 37 nm on the surface of the bonding wafer is less than 10, and the number of scratches on the surface of the bonding wafer is less than or equal to 1.

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