PCB wiring method based on multi-mode fusion and electronic equipment

Abstract

The invention provides a PCB wiring method based on multi-modal fusion and an electronic device, and the method comprises the steps: obtaining the current wiring information of a target PCB, constructing a multi-modal state space according to the current wiring information, the multi-modal state space comprises geometric modal features, physical rule modal features, electrical performance modal features and heat distribution modal features, and the geometric modal features, the physical rule modal features, the electrical performance modal features and the heat distribution modal features are matched with the physical rule modal features; and performing feature fusion on the multi-modal state space to obtain input information, inputting the input information into a pre-trained intelligent agent, outputting a wiring action by the intelligent agent based on the input information, and updating current wiring information according to the wiring action. According to the method, the multi-dimensional information of the current wiring is fused into the structured state space, so that the intelligent agent is guided to make a wiring decision.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor technology, in particular to a PCB wiring method based on multi-modal fusion and an electronic device. BACKGROUND

[0002] In the field of electronic device design, printed circuit board (PCB) wiring is a core link affecting the performance, stability and reliability of the device. With the development of electronic devices towards high density, high performance and miniaturization, the PCB wiring is becoming more and more complex.

[0003] In the prior art, the wiring design is usually based on artificial intelligence and simple wiring rules, and the wiring scheme cannot adapt to the comprehensive performance requirements, and the wiring efficiency is low, which requires a large amount of time cost for manual correction. SUMMARY

[0004] The present application aims at the deficiencies in the prior art, and provides a PCB wiring method based on multi-modal fusion and an electronic device to solve the problems of low wiring efficiency and poor effect in the prior art.

[0005] To achieve the above-mentioned purpose, the technical scheme adopted by the present application is as follows: In a first aspect, the present application provides a PCB wiring method based on multi-modal fusion, comprising: obtaining current wiring information of a target PCB, the current wiring information including physical structure, component layout, network table and design rules, the network table including wiring targets; constructing a multi-modal state space according to the current wiring information, the multi-modal state space including geometric modal features, physical rule modal features, electrical performance modal features and thermal distribution modal features; performing feature fusion on the multi-modal state space to obtain input information; inputting the input information into a pre-trained agent, the agent outputting a wiring action based on the input information and updating the current wiring information according to the wiring action.

[0006] Optionally, the constructing a multi-modal state space according to the current wiring information comprises: determining geometric modal features according to the physical structure, the component layout and the design rules; determining the physical rule modal features according to the design rules and the network table; determining the electrical performance modal features according to the physical structure, the network table and the design rules; According to the element layout and the physical structure, the thermal distribution modal feature is determined.

[0007] Optionally, according to the physical structure, the element layout and the network table, a geometric modal feature is determined, including: According to the physical structure, the element layout and the design rule, a graph structure is generated, the graph structure including a plurality of first nodes and a plurality of first edges connecting the first nodes, each first node being used to represent an element in the target PCB, and a first edge between two first nodes being used to represent a wireable connection between the two first nodes. Based on a graph neural network, geometric features of each node and each edge in the graph structure are extracted to obtain the geometric modal feature.

[0008] Optionally, according to the design rule and the network table, the physical rule modal feature is determined, including: The design rule and the network table are converted into a rule graph, the rule graph including a plurality of second nodes and a plurality of second edges connecting the second nodes, each second node being used to represent a network in the target PCB, and a second edge between two second nodes being used to represent a constraint relationship between the two second nodes. Based on a graph attention network, the rule graph is feature-extracted to obtain the physical rule modal feature.

[0009] Optionally, the electrical performance modal feature is determined according to the physical structure, the network table and the design rule, including: Based on the network table, a key network is determined. The physical structure, the key network and the design rule are input into a pre-trained lightweight prediction model to obtain the electrical performance modal feature.

[0010] Optionally, the thermal distribution modal feature is determined according to the element layout and the physical structure, including: Based on the element layout and the physical structure, a thermal simulation model is established. Based on the thermal simulation model, chip thermal data is output, the chip thermal data including a plurality of hot spot temperatures, thermal gradients and temperature rise exceeding regions. The chip thermal data is feature-extracted to obtain the thermal distribution modal feature.

[0011] Optionally, the input information is obtained by feature fusion on the multi-modal state space, including: determine the correlation weights of the geometric modality features, the physical rule modality features, the electrical performance modality features and the thermal distribution modality features in the multi-modal state space based on the cross-modal attention mechanism; determine input information according to the geometric modality features, the physical rule modality features, the electrical performance modality features and the thermal distribution modality features, the correlation weights of the geometric modality features, the correlation weights of the physical rule modality features, the correlation weights of the electrical performance modality features and the correlation weights of the thermal distribution modality features.

[0012] Optionally, after the current wiring information is updated according to the wiring action, the method further comprises: determining whether the wiring target is completed, if not, constructing a new multi-modal state space according to the new current wiring information, performing feature fusion on the new multi-modal state space to obtain new input information, inputting the new input information into the agent, outputting a new wiring action, updating the current wiring information according to the new wiring action, and outputting target wiring information until the wiring target is completed.

[0013] Optionally, the training process of the agent comprises: determining a plurality of reward items based on the new current wiring information according to a pre-set reward condition; if the target wiring information does not exist the DRC violation, determining an overall reward; determining a target reward according to the pre-set weights corresponding to each reward item, the weight corresponding to the overall reward, each reward item and the overall reward; updating the agent based on the target reward.

[0014] In a second aspect, the present application provides an electronic device, comprising a processor, a storage medium and a bus, the storage medium storing machine readable instructions executable by the processor, the processor and the storage medium communicating through the bus when the electronic device is running, and the processor executing the machine readable instructions to perform the steps of the PCB wiring method based on multi-modal fusion as described above.

[0015] The beneficial effects of the present application are: obtaining the current wiring information of the target PCB, and constructing a multi-modal state space according to the current wiring information, the multi-modal state space including: geometric modal features, physical rule modal features, electrical performance modal features and thermal distribution modal features, then performing feature fusion on the multi-modal state space to obtain input information, inputting the input information into a pre-trained agent, and the agent outputs a wiring action based on the input information, and updates the current wiring information according to the wiring action. The embodiment constructs a state space including geometric modal features, physical rule modal features, electrical performance modal features and thermal distribution modal features according to the current wiring information, which strengthens the agent to evaluate the weight of the four targets when making decisions, and finally outputs the wiring that meets the requirements. And the fully automated wiring not only speeds up the wiring efficiency, but also reduces the dependence on professional knowledge of personnel, narrows the design capability gap of the team, reduces the cost of talent training, and has strong applicability. BRIEF DESCRIPTION OF DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings needed in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0017] Figure 1 is a flowchart of a PCB wiring method provided by an embodiment of the present application based on multi-modal fusion; Figure 2 is a flowchart of constructing a multi-modal state space provided by an embodiment of the present application; Figure 3 is a flowchart of determining thermal distribution modal features provided by an embodiment of the present application; Figure 4 is a flowchart of the training process of an agent provided by an embodiment of the present application; Figure 5 is a structural diagram of a PCB wiring architecture provided by an embodiment of the present application; Figure 6 is a flowchart of a PCB wiring method provided by an embodiment of the present application; Figure 7 is a structural diagram of an electronic device provided by an embodiment of the present application. DETAILED DESCRIPTION

[0018] To make the objectives, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. It should be understood that the drawings in the present application only serve the purpose of description and illustration, and are not used to limit the scope of protection of the present application. In addition, it should be understood that the schematic drawings are not drawn according to the actual proportions. The flowchart shows the operations implemented according to some embodiments of the present application. It should be understood that the operations of the flowchart can not be implemented in sequence, and the steps without logical context relationship can be reversed in sequence or implemented simultaneously. In addition, one or more other operations can be added to the flowchart or one or more operations can be removed from the flowchart under the guidance of the content of the present application.

[0019] In addition, the described embodiments are only some of the embodiments of the present application, not all the embodiments. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without creative labor are within the scope of protection of the present application.

[0020] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the presence of the features declared thereafter, but does not exclude the addition of other features.

[0021] In the prior art, the wiring design is usually based on artificial intelligence and simple wiring rules, and the wiring scheme cannot adapt to the comprehensive performance requirements, and it is difficult to effectively integrate heterogeneous high-dimensional data such as material interpretation rules, electrical performance, heat distribution, etc.

[0022] Based on this, the present application proposes a PCB wiring method based on multi-modal fusion. In the method, the current wiring information of the target PCB is first obtained, then the geometric modal features, physical rule modal features, electrical performance modal features and heat distribution modal features are determined according to the current wiring information, the above features are high-dimensionally fused and input into the pre-trained agent to obtain the wiring action, and the current wiring information is updated according to the wiring action. The present application fuses the multi-dimensional information of the current wiring into a structured state space, thereby guiding the agent to make wiring decisions.

[0023] Optionally, two scenarios are introduced first: in the first scenario, the target PCB is a high-density interconnection PCB design such as a smartphone main control board, which is characterized by dense component pins, narrow trace channels, and frequent use of micro-holes. The traditional routing algorithm is prone to cause low routing rate or post-signal integrity problems. The second scenario is an Insulated Gate Bipolar Transistor (IGBT) power module PCB in an industrial motor driver. The large current path is prone to cause local overheating and voltage imbalance, and the thermal-electric coupling effect needs to be considered in the routing stage. However, the traditional routing algorithm cannot consider the thermal-electric coupling relationship.

[0024] Next, refer to Figure 1 The implementation process of the PCB routing method based on multi-modal fusion in the present application is introduced. Among them, Figure 1 is a flowchart of a PCB routing method based on multi-modal fusion provided by an embodiment of the present application.

[0025] S101, obtain the current routing information of the target PCB, the current routing information including: physical structure, component layout, network table and design rules, the network table including routing targets.

[0026] Among them, the target PCB is a PCB to be routed or being routed.

[0027] In the current routing information, the physical structure refers to the current physical structure of the target PCB, including the number of PCB layers, the layer stacking order, the board material parameters and the current connection. Among them, the board material parameters can include dielectric constant and loss tangent value, etc. The current connection includes the completed routing, including the routing position and the connected component identifier. It is worth noting that when the agent updates the current routing information, the current connection will be updated. The component layout includes the packaging, pin coordinates and pad size information of all components in the target PCB. The network table includes routing targets and network attributes of routing targets. Among them, the routing targets include multiple groups of pin pairs that need to be connected, and the network attributes of the routing targets include high-speed lines, power lines and differential lines, etc. The design rules can be DRC and preset rule information, including minimum line width and distance, via size, impedance requirement, electrical constraint and thermal management requirement, etc. Among them, the electrical constraint includes equal length, shielding and reference plane continuity, etc., and the thermal management requirement includes maximum temperature rise and hot spot area limitation, etc.

[0028] Exemplarily, if it is the first scenario, the physical structure is a 10-layer high density interconnect (HDI) board containing blind via structures, and the ball grid array (BGA) package pin pitch is 0.4 mm. The network table has 320 networks, of which 128 are high-speed networks (DDR5 memory, mobile industry processor interface (MIPI) interface) that need to meet the equal length and timing requirements. The design rule is a minimum line width / space of 4 mil, a micro-hole diameter of 0.15 mm, and a differential impedance of 90Ω±10%.

[0029] If it is the second scenario, the physical structure is a 6-layer board, and the outer layer is a thick copper layer for carrying large current. The network table has 3 main power paths that need to be connected in parallel to evenly distribute the current. The design rule is that the bottom has a heat sink, the top has natural convection, and the ambient temperature is 60°C.

[0030] S102, according to the current routing information, a multi-modal state space is constructed, and the multi-modal state space includes: geometric modal characteristics, physical rule modal characteristics, electrical performance modal characteristics, and thermal distribution modal characteristics.

[0031] The geometric modal characteristics are a quantitative representation of the spatial structure and physical position relationship of the target PCB routing area, and are used to reflect the spatial routing feasibility and provide a spatial basis for routing.

[0032] The physical rule modal characteristics are an encoded identifier of the relationship between the PCB design rule check (DRC) and the network constraint, and reflect the hard constraints that the routing must satisfy.

[0033] The electrical performance modal characteristics are a quantitative evaluation result of the PCB signal transmission quality of the current routing, and reflect whether the current routing scheme causes signal distortion or interference.

[0034] The thermal distribution modal characteristics are a quantitative prediction result of the temperature distribution and heat dissipation capacity of the current routing in the target PCB, and reflect whether the current routing scheme will cause local overheating and affect the reliability of the components.

[0035] S103, feature fusion is performed on the multi-modal state space to obtain input information.

[0036] As an optional implementation, the geometric modal characteristics, the physical rule modal characteristics, the electrical performance modal characteristics, and the thermal distribution modal characteristics in the multi-modal state space are aligned and fused to obtain output information.

[0037] The input information can be a high-dimensional state vector or a graph structure, which retains key information valuable for routing decisions.

[0038] In S104, the input information is input into the pre-trained agent, the agent outputs a routing action based on the input information, and the current routing information is updated according to the routing action.

[0039] Specifically, after the input information is input into the pre-trained agent, the encoder in the agent first analyzes the features of the input information. For example, the key information such as "the position of the current pin pair to be routed", "the line width and impedance rules that the pin pair needs to meet", "whether the area to be routed is close to a high-speed line", "whether the temperature of the area exceeds the standard" and the like are extracted from the input information, and the abstract state vector or structure graph is converted into a decision basis that can be understood by the agent.

[0040] The agent selects the optimal routing action from a preset action space based on the analyzed output information using a Proximal Policy Optimization (PPO) algorithm, a Soft Actor-Critic (SAC) algorithm or a Deep Q-Network (DQN) algorithm.

[0041] The action space includes basic path actions, cross-layer and via actions, line width adjustment actions, and special processing actions. The basic path action is, for example, moving 5 mil in the positive direction of the X axis, the cross-layer and via action includes selecting a routing layer and selecting a via type, the selection of the routing layer is, for example, switching to the L4 layer, and the selection of the via type is, for example, inserting a 0.3mm aperture blind via. The line width adjustment action is, for example, adjusting the current width from 6 mil to 8 mil to adapt to the impedance requirement. The special processing action is, for example, bypassing 3 mil in the negative direction of the Y axis due to the blocking of elements in front, and selecting whether to increase a heat dissipation via matrix and whether to enable backtracking and rerouting to optimize the current path. It should be noted that the action space can be further limited according to the actual scene, and the present embodiment does not limit it here.

[0042] Optionally, after the routing action is output, the current routing information is updated according to the routing action, thereby generating new current routing information required for the next round of decision. For example, the routing action "5 mil + switch to L4 layer + insert blind via" is executed in the target PCB.

[0043] Optionally, after the current routing information is updated according to the routing action, it can also be checked whether the DRC is violated. If so, the newly added wire and via are deleted, the illegal routing action is recorded, and the routing action selection is performed again based on the illegal routing action until the DRC is not violated.

[0044] In this embodiment, the current routing information of the target PCB is acquired, and a multimodal state space is constructed based on this information. The multimodal state space includes geometric modal features, physical rule modal features, electrical performance modal features, and thermal distribution modal features. Then, feature fusion is performed on the multimodal state space to obtain input information, which is then input into a pre-trained agent. The agent outputs routing actions based on the input information and updates the current routing information accordingly. This embodiment constructs a state space including geometric modal features, physical rule modal features, electrical performance modal features, and thermal distribution modal features based on the current routing information, enhancing the agent's ability to simultaneously evaluate the weights of these four objectives during decision-making, ultimately outputting routing that meets the requirements. Furthermore, fully automated routing not only accelerates routing efficiency but also reduces reliance on human expertise, bridges the gap in team design capabilities, reduces talent training costs, and has strong applicability.

[0045] Next, refer to Figure 2 The process of constructing a multimodal state space based on the current wiring information in step S102 above will be described. Figure 2 This is a schematic diagram of a process for constructing a multimodal state space provided in an embodiment of this application.

[0046] S201. Determine the geometric modal characteristics based on the physical structure, component layout, and design rules.

[0047] Optionally, as the wiring is updated, the physical structure is also updated, and therefore the geometric modal features are also updated accordingly.

[0048] As an optional implementation, physical structure and component layout data can be parsed from the target PCB file, and a unified format can be obtained using tools. Unroutable areas can then be marked according to design rules. After determining the discrete granularity, network nodes are created. Each grid node can be an element in the target PCB, with attributes such as layer number, coordinates, and type. Each routing layer in the target PCB is discretized into a grid array, with each grid cell corresponding to a geometric node. Edges are then constructed based on the adjacency relationships of the grid cells, generating a network graph or topology graph. Finally, a graph neural network is used to extract features from the network graph or topology graph to obtain geometric modal features.

[0049] Optionally, a fine-grained grid can be used for densely populated pin areas, while a coarse-grained grid can be used for sparsely populated pin areas, thereby balancing progress and computational efficiency.

[0050] S202. Determine the physical rule modal characteristics based on the design rules and network table.

[0051] As an optional implementation, the design rules and network associations are extracted from the design rules and network table to ensure coverage of all constraint dimensions. Then the design rules are classified according to the constraint types, and the non-quantitative rules are converted into vectors using an embedding layer. Then the network types in the network table are assigned a classification structure and vector results for each network to obtain the assignment results. Next, the networks in the assignment results are taken as nodes, the constraint relationships are taken as edges, and the associated types are marked as edge attributes, so as to construct a rule graph. Finally, the rule graph is feature-extracted based on a graph attention network to obtain the physical rule modality features.

[0052] It is worth mentioning that for different PCB scenarios, a design rule template library can be established to automatically load the corresponding rules when switching, avoiding repeated configuration.

[0053] Optionally, a DRC conflict analysis module can be integrated to automatically identify conflicts during the rule association stage and send the identified conflicts to engineers in the form of a conflict report to enable engineers to make timely adjustments and avoid later rework.

[0054] Optionally, during the routing process, if the routing of a certain area cannot meet the design rules, a rule exemption condition can be preset, and the exemption state is marked in the physical rule modality features to ensure flexibility. For example, if the line spacing cannot meet 8mil under the Ball Grid Array (BGA), the rule exemption condition is set: the minimum line spacing can be reduced to 6mil, but the shielding copper skin needs to be increased.

[0055] S203, determining the electrical performance modality features according to the physical structure, the network table and the design rules.

[0056] Optionally, performance-related data can be first screened from the physical structure, the network table and the design rules, including physical structure data, network table data and design rule data. The physical structure data includes board material electrical parameters, layer structure, copper foil thickness and pin-to-wiring path, the network table data includes key network identification, signal parameters, and the design rule data includes impedance requirements, crosstalk threshold, maximum average segment length and eye diagram margin requirements. Then the key networks in the network table are determined, and the performance-related data and the key networks are input into a pre-trained lightweight prediction model to obtain the electrical performance modality features.

[0057] The electrical performance modality features can be an electrical quality vector, including single-network features and global features. The global features are the key network over-standard rate and the impedance compliance rate. For example, 1 out of 10 high-speed networks has crosstalk over-standard, and the over-standard rate is 10%.

[0058] S204, determine the thermal distribution modal feature according to the element layout and the physical structure.

[0059] Specifically, the basic data related to thermal calculation is extracted according to the element layout and the physical structure. Exemplarily, the basic data related to thermal calculation includes: position coordinates of all components, power consumption parameters, package thermal resistance, element size, PCB storage, board thermal conductivity, copper distribution, heat dissipation layer design and environmental parameters. Then, modeling is performed based on the basic data related to thermal calculation to obtain a thermal simulation model. The thermal simulation model may be, for example, a thermal resistance network model or a machine learning (ML) agent model. The simulation temperature of each component can be determined through the thermal simulation model, a temperature field is formed, key thermal features of the temperature field are extracted, and the thermal distribution modal feature is obtained.

[0060] In this embodiment, by respectively determining the geometric modal feature, the physical rule modal feature, the electrical performance modal feature and the thermal distribution modal feature, the intelligent agent can consider multiple coupling constraints in the process of predicting wiring, so that the wiring result meets the requirements of signal integrity, power integrity and heat, and a more optimal global wiring scheme is further realized.

[0061] Next, the specific steps of determining the geometric modal feature according to the physical structure, the element layout and the network table in step S201 will be introduced.

[0062] As an optional implementation, a graph structure is generated according to the physical structure, the element layout and the design rules, the graph structure including a plurality of first nodes and a plurality of first edges connecting the first nodes, each first node being used to represent an element in the target PCB, and the first edge between two first nodes being used to represent a wireable connection between the two first nodes. Based on a graph neural network, geometric features of each node and each edge in the graph structure are extracted to obtain the geometric modal feature.

[0063] Specifically, first, the physical structure and the element layout are analyzed, and coordinate information is extracted through a software development kit (SDK) or other tools, and the coordinate information is converted to a unified unit. And according to the design rules, the non-wirable area is generated, specifically, the element station area, the forbidden area, and the area except the pins of the solder pad are marked as obstacles on the coordinate plane, and an obstacle mask graph is generated.

[0064] Secondly, a graph structure is constructed. Specifically, according to the minimum line width determined according to the design rule requirement, for example, the design rule requires a minimum line width of 0.1 mm, the grid granularity is set to 0.05 mm, ensuring that the line width can be divided by the grid, avoiding precision loss. Then, each routing layer of the target PCB is discretized into a grid array, thereby dividing grid nodes, each of which can correspond to an element in the target PCB, where the element can be a component or a pin in the component. Finally, an edge connection relationship is constructed: if two adjacent grid units are both free or are pad pins, and there is no obstacle to block, an edge is constructed, and the edge attribute includes connection direction, length, whether it crosses layers, etc. If it crosses layers, it needs to be associated with the via position and type.

[0065] Thirdly, encoding is performed through a graph neural network. Specifically, the node feature vector is initialized first, then a graph neural network model is selected, the constructed graph structure is input into the selected graph neural network model, the spatial correlation is learned through field aggregation, and finally the geometric modal features are output. The geometric modal features can be high-dimensional feature vectors of each node and global features.

[0066] Optionally, when constructing the graph structure, the interlayer medium and via parameters in the physical structure need to be associated with the cross-layer edges, for example, the edge from the Top layer node to the GND layer node needs to be marked as a blind via, and the via impedance needs to meet the design rule.

[0067] In this embodiment, the graph structure is generated according to the physical structure, component layout and design rule, and then the geometric features of each node and edge in the graph structure are extracted based on the graph neural network to obtain the geometric modal features, thereby analyzing the structured features of the target PCB, so that the agent obtains spatial geometric data.

[0068] Next, the step of determining the physical rule modal features according to the design rules and the network table in step S202 is introduced.

[0069] Optionally, the design rules and the network table are converted into a rule graph, which includes a plurality of second nodes and a plurality of second edges connecting the second nodes, each second node is used to represent a network in the target PCB, and the second edge between two second nodes is used to represent the constraint relationship between the two second nodes.

[0070] Specifically, first, the rules are classified according to the constraint type, and are stored in a structured manner using key-value pairs. The numerical units are unified. At the same time, non-quantitative rules are converted into vectors using One-Hot Encoding or embedding layers, for example, the shielding requirement is encoded as [1, 0], and the non-shielding is encoded as [0, 1].

[0071] Secondly, the network properties matching rules of each network in the network table are matched, that is, according to the network type in the network table, the corresponding design rules are allocated to each network, for example: high-speed signal Net1: matching "impedance 50Ω±10%, minimum line width 8mil, parallel segment ≤300mil"; differential pair Net2-Net3: matching "differential impedance 100Ω±10%, spacing 8mil, equal length error ≤20mil"; power supply Net4: matching "minimum line width 20mil, copper coverage ≥50%". At the same time, if multiple rules exist for the same network, for example, the line width needs to be greater than or equal to 8mil, and the impedance requires the line width to be greater than or equal to 10mil, the strict value is selected as the constraint, for example, according to the priority, for example, if the electrical constraint is greater than the physical constraint, which is greater than the process constraint, then the line width needs to be greater than or equal to 10mil.

[0072] Finally, taking the network as the node and the constraint relationship as the edge, the edge attribute is marked with the association type. Exemplarily, the edge between the node Net1 network and the GND network has the edge attribute of shielding.

[0073] Optionally, the rule graph is feature extracted based on the graph attention network to obtain the physical rule modality feature.

[0074] Optionally, the graph attention network (GAT) is adopted to learn the association feature of the rule graph, the attention weight of the GAT can reflect the importance of the constraint, for example, the equal length constraint of the differential pair is higher than the ordinary line spacing constraint, and finally the physical rule modality feature is output, the physical rule modality feature includes the rule feature vector of each network and the global rule compliance rate. Wherein, the global planning compliance rate is the proportion of the network matching the rules.

[0075] In this embodiment, the design rules and the network table are converted into a rule graph, and then the rule graph is feature extracted based on the graph attention network to obtain the physical rule modality feature, so that the agent obtains the rule type data.

[0076] Next, the step of determining the electrical performance modality feature according to the physical structure, the network table and the design rules in the above step S203 is introduced.

[0077] Optionally, the key network is determined based on the network table.

[0078] As an optional implementation, the key network is determined according to the signal rate and the priority of each network in the network table. Exemplarily, the high-speed signal with a signal rate greater than 5Gbps, the differential pair signal and the clock signal are preferentially selected, and the ordinary low-speed signal can be simplified or skipped, so as to reduce the calculation amount.

[0079] In addition, for the key networks, the key paths of the key networks can be marked. Specifically, according to the connection relationship of the pin pairs of the network table, the potential routing paths of the key networks are marked, and the reference planes in the physical structure are associated. For example, the network Net1 can pass through the Top layer, pass through the via to the Bottom layer, and the reference plane of the Top layer signal is associated with the GND layer.

[0080] Optionally, the physical structure, the key networks, and the design rules are input into a pre-trained lightweight prediction model to obtain the electrical performance modal feature.

[0081] Specifically, the preset physical structure data in the physical structure, the identification of the key networks in the key networks, the key paths of the key networks, the signal parameters of the key networks, the impedance requirements in the design rules, the crosstalk threshold, the maximum parallel segment length, and the eye diagram margin requirement are input into the lightweight prediction model. The lightweight prediction model integrates three types of simplified signal integrity models, which are respectively used to calculate crosstalk, reflection, and eye diagram and jitter, and outputs an electrical quality vector as an electrical parameter modal feature.

[0082] As an optional implementation, the lightweight prediction model can integrate a direct current voltage drop (IR Drop) fast calculation module or a lightweight crosstalk and reflection prediction model to obtain the electrical parameters in real time.

[0083] In this embodiment, the key networks are determined based on the network table, and the physical structure, the key networks, and the design rules are input into a pre-trained lightweight prediction model to obtain the electrical performance modal feature, so that the agent can combine the electrical performance of the current routing in the process of predicting the routing to achieve more global routing.

[0084] Figure 3 is a flowchart of a process for determining a thermal distribution modal feature provided by an embodiment of the present application. Next, referring to Figure 3 The process of determining the thermal distribution modal feature according to the element layout and the physical structure in step S204 is introduced.

[0085] S301, a thermal simulation model is established based on the element layout and the physical structure.

[0086] Optionally, the basic data related to thermal calculation is extracted according to the element layout and the physical structure, and the thermal simulation model is established based on the basic data related to thermal calculation. The thermal simulation model may, for example, be a thermal resistance network model or a machine learning (ML) agent model.

[0087] S302, chip thermal data is output based on the thermal simulation model, and the chip thermal data includes a plurality of hot spot temperatures, a thermal gradient, and a temperature rise exceeding area.

[0088] The hotspot temperature can be the highest temperature of each component, and if the highest temperature of each component exceeds a preset chip temperature threshold, the performance of the component can be reduced. The thermal gradient refers to the temperature change rate per unit distance in the PCB, and if the thermal gradient exceeds a preset gradient threshold, it indicates that the heat distribution is uneven, which can cause the solder joint to crack. The temperature rise exceeding the threshold region refers to a region where the actual temperature rise exceeds a preset threshold. The temperature rise is the difference between the actual temperature of the region and the ambient temperature. The chip thermal data can be used to evaluate the heat dissipation reliability of the PCB, so that when the agent makes a routing decision, actions that increase the hotspot temperature, expand the thermal gradient, and expand the region exceeding the threshold are avoided, ensuring that the design meets the thermal reliability requirements.

[0089] If the established thermal simulation model is a thermal resistance network model, the current PCB is divided into multiple thermal nodes of a preset size, the thermal resistance between each node is calculated, and then a thermal balance equation is established based on the thermal resistance between each node. The chip thermal data is obtained by solving the equation.

[0090] If the ML agent model is established, the basic data related to thermal calculation is input, and a convolutional neural network or a Transformer model is used for processing. The temperature field matrix is output, and the chip thermal data is extracted based on the temperature field matrix.

[0091] S303, feature extraction is performed on the chip thermal data to obtain thermal distribution modal features.

[0092] Optionally, the chip thermal data is feature extracted to obtain local features and global features, and the local features and global features are used as thermal distribution modal features. The local features include thermal fixed temperature and thermal gradient, and the global features include over-temperature region area and copper skin heat dissipation efficiency.

[0093] In this embodiment, a thermal simulation model is established based on the component layout and physical structure, and then the chip thermal data is output based on the thermal simulation model. The chip thermal data is feature extracted to obtain thermal distribution modal features, so that the agent can combine the thermal distribution of the current routing in the process of predicting the routing, and realize more global routing.

[0094] Next, the specific process of feature fusion of the multi-modal state space in step S103 above is introduced.

[0095] Optionally, based on the cross-modal attention mechanism, the correlation weights of the geometric modal features, the physical rule modal features, the electrical performance modal features, and the thermal distribution modal features in the multi-modal state space are determined respectively.

[0096] The correlation weight is used to represent the correlation strength between the modalities, and the information complementation can be realized through the correlation weight.

[0097] As an optional implementation, the correlation weight of the geometric modality feature, the rule modality feature, the performance modality feature and the heat distribution modality feature in each modality state space can also be calculated by using the graph fusion network. Specifically, the four kinds of modality features are converted into a vector form with unified dimensions to ensure that the attention calculation can be performed, and then the correlation weight is determined based on each modality feature.

[0098] It is worth noting that the correlation weight is a variable quantity and can change dynamically with the wiring scene. When the decision target depends more on a modality, the weight of the modality is higher.

[0099] Optionally, the input information is determined according to the geometric modality feature, the physical rule modality feature, the electrical performance modality feature and the heat distribution modality feature, the correlation weight of the geometric modality feature, the correlation weight of the physical rule modality feature, the correlation weight of the electrical performance modality feature and the correlation weight of the heat distribution modality feature.

[0100] Specifically, each modality feature is weighted and then fused by splicing and linear transformation to obtain the input information. The input information can be a high-dimensional state vector or a graph structure.

[0101] Optionally, the input information can be represented by the following formula (1): (1) Wherein, is the input information, Fusion is a multi-modality mixing function, is the geometric modality feature, is the physical rule modality feature, is the electrical performance modality feature, is the heat distribution modality feature.

[0102] Exemplarily, the input information can be represented by the following formula (2): (2) Wherein, is a cross-modality attention fusion layer, is the correlation weight of the geometric modality feature, is the correlation weight of the physical rule modality feature, is the correlation weight of the electrical performance modality feature, is the correlation weight of the heat distribution modality feature.

[0103] In this embodiment, the correlation weights of the geometric modal features, the physical rule modal features, the electrical performance modal features and the thermal distribution modal features are determined respectively, and the correlation weights of the modal features and the modal features are determined according to the modal features, so that the reinforcement learning agent can simultaneously perceive the geometric constraints, rule requirements, electrical performance and thermal reliability of the current PCB layout, thereby making more comprehensive optimal decisions.

[0104] As an optional implementation, after updating the current layout information according to the layout action, the following method can also be performed: determining whether the layout target is completed, if not, constructing a new multi-modal state space according to the new current layout information, performing feature fusion on the new multi-modal state space to obtain new input information, inputting the new input information into the agent, outputting a new layout action, and updating the current layout information according to the new layout action until the layout target is completed, and outputting the target layout information.

[0105] Specifically, after updating the current layout information according to the layout action, it is determined whether the overall layout is completed according to the layout target in the network table. If yes, the updated current layout information is taken as the target layout information, and the engineer can perform chip production according to the target layout information. If not, a new current layout information is generated, and the steps S201 to S204 are performed according to the new current layout information until the overall layout is completed, and the target layout information is output.

[0106] In this embodiment, the current layout information is constantly updated until the layout target is completed by determining whether the layout is completed, so as to output complete layout information.

[0107] As an optional implementation, referring to Figure 4 , the training process of the agent is as follows. Wherein, Figure 4 is a flowchart of a training process of an agent provided by an embodiment of the present application.

[0108] S401, based on the pre-set reward condition, determining a plurality of reward items according to the new current layout information.

[0109] Optionally, the reward condition can be set according to the actual PCB scene. Illustratively, the reward condition can include: whether the target point is successfully connected, whether the physical rule is violated, whether the signal quality is significantly deteriorated, whether the hotspot temperature is increased or the thermal gradient is increased, whether the space is efficiently utilized, and whether unnecessary complex routing is introduced. Each reward condition corresponds to a reward value.

[0110] Optionally, a plurality of reward items are determined according to the new current layout information and the reward condition. Wherein, the reward item corresponds to the reward condition one by one.

[0111] S402, if the target routing information does not violate the DRC, determine the overall reward.

[0112] Specifically, if the routing is completed, the target routing information is output, and the target routing information does not violate the DRC, the overall reward is determined.

[0113] S403, according to the weights corresponding to each reward item, the weight corresponding to the overall reward, each reward item and the overall reward, determine the target reward.

[0114] Specifically, the calculation method of the target reward can be as follows formula (3): (3) Wherein, R is the target reward, is the reward item corresponding to whether the target point is successfully connected, is the weight corresponding to the reward item, is the reward item corresponding to whether the physical rule is violated, is the weight corresponding to the reward item, is the reward item corresponding to whether the signal quality is significantly deteriorated, is the weight corresponding to the reward item, is the reward item corresponding to whether the hotspot temperature rises or the thermal gradient increases, is the weight corresponding to the reward item, is the reward item corresponding to whether the space is efficiently utilized, is the weight corresponding to the reward item, is the reward item corresponding to whether unnecessary complex routing is introduced, is the weight corresponding to the reward item, is the overall reward, is the weight corresponding to the overall reward.

[0115] S404, update the agent based on the target reward.

[0116] Specifically, using reinforcement learning algorithms such as policy gradient or Q learning, the reward signal is backpropagated, and the policy parameters of the agent are adjusted, so that the subsequent prediction can select the routing action that can obtain high reward with a higher probability. By updating the agent, the routing strategy of the agent is gradually optimized until the result meeting the multi-modal target is stably output.

[0117] As an optional implementation, after updating the current routing information according to the routing action each time, it is checked whether the DRC is violated, and if so, the penalty can also be recorded to reduce the probability of predicting the current routing structure when the new routing is predicted.

[0118] In this embodiment, a plurality of reward items are determined based on the reward condition according to the new current wiring information, the overall reward is determined if the target wiring information does not exist the case of violating the DRC, the target reward is determined according to the weight of each reward item, the weight of the overall reward, each reward item and the overall reward, and the intelligent agent is updated based on the target reward, so that the intelligent agent learns the trade-off strategy between the rules and the performance.

[0119] Figure 5 is a structural schematic diagram of a PCB wiring architecture provided by an embodiment of the present application. Next, referring to Figure 5 The PCB wiring architecture is introduced. The PCB wiring architecture includes an input layer, a geometric modal encoder, a physical rule modal encoder, an electrical performance modal encoder, a thermal distribution modal encoder, a cross-modal fusion layer, a reinforcement learning intelligent agent, and an output layer. The reinforcement information intelligent agent can include a policy network, a value network, a memory pool, and a training module. The output layer can include a wiring decision and a feedback module. The input layer is used to obtain the current wiring information of the target PCB, the geometric modal encoder, the physical rule modal encoder, the electrical performance modal encoder, and the thermal distribution modal encoder are respectively used to generate geometric modal features, physical rule modal features, electrical performance modal features, and thermal distribution modal features, the cross-modal fusion layer is used to fuse the features of the multi-modal state space to obtain input information, the reinforcement information intelligent agent is used to determine the current wiring information according to the input information, and the output layer is used to output and update the current wiring information. The wiring decision is used to update the wiring information, and the feedback module is used to synchronize the current wiring progress to the user.

[0120] Figure 6 is a flowchart of a PCB wiring method provided by an embodiment of the present application. Next, referring to Figure 6 The flow of the PCB wiring method is introduced.

[0121] S601, obtaining current wiring information of a target PCB; S602, constructing a multi-modal state space according to the current wiring information; S603, fusing features of the multi-modal state space to obtain input information; S604, outputting a wiring action based on the intelligent agent, and updating the current wiring information according to the wiring action; S605, determining whether all networks are wired, if yes, performing S606, and if no, performing S602; S606, generating target wiring information and outputting; S607, updating the current wiring information, and performing S602.

[0122] The present application also provides an electronic device, such as Figure 7As shown, a structural schematic diagram of an electronic device provided by an embodiment of the present application includes a processor 701, a memory 702, and a bus. The memory 702 stores machine-readable instructions executable by the processor 701. When the computer device is running, the processor 701 and the memory 702 communicate through the bus. The machine-readable instructions are executed by the processor 701 to perform the process of the above-mentioned PCB wiring method based on multi-modal fusion.

[0123] The embodiment of the present application further provides a computer readable storage medium, which stores a computer program. When the computer program is run by a processor, the steps of the above-mentioned PCB wiring method based on multi-modal fusion are executed.

[0124] Those skilled in the art can clearly understand that, for the convenience and brevity of the description, the specific working process of the above-mentioned system and device can refer to the corresponding process in the method embodiment, which will not be described herein. In the several embodiments provided by the present application, it should be understood that the disclosed system, device and method can be implemented by other ways. The above-mentioned device embodiments are only schematic, for example, the division of the modules is only a logical function division, and the actual implementation can be in another division way, for example, a plurality of modules or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the shown or discussed mutual elements can be indirect coupling or communication connection through some communication interface, device or module, which can be electrical, mechanical or other forms.

[0125] In addition, each functional unit in the embodiments of the present application can be integrated into one processing unit, or each unit can exist physically, or two or more units can be integrated into one unit. When the functions are realized in the form of software function units and sold or used as independent products, they can be stored in a computer readable storage medium. Based on this understanding, the technical solutions of the present application essentially or the parts that make contributions to the prior art or parts of the technical solutions can be embodied in the form of a software product, which is stored in a storage medium, including a number of instructions to make a computer device (which can be a personal computer, a server, or a network device, etc.) execute all or part of the steps of the methods described in the embodiments of the present application. The aforementioned storage medium includes: a U disk, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, and various media that can store program codes.

[0126] The above merely provides the specific implementation of the present application, but the protection scope of the present application is not limited to this. Any person skilled in the art can easily think of the changes or replacements within the technical range disclosed by the present application, which should be covered in the protection scope of the present application.

Claims

1. A PCB routing method based on multimodal fusion, characterized in that, The method includes: Obtain the current routing information of the target PCB. The current routing information includes: physical structure, component layout, netlist and design rules. The netlist includes routing targets. Based on the current wiring information, a multimodal state space is constructed, which includes: geometric modal features, physical rule modal features, electrical performance modal features, and thermal distribution modal features; Feature fusion is performed on the multimodal state space to obtain input information; The input information is input into a pre-trained agent, which outputs wiring actions based on the input information and updates the current wiring information according to the wiring actions.

2. The PCB routing method based on multimodal fusion according to claim 1, characterized in that, The step of constructing a multimodal state space based on the current wiring information includes: Based on the physical structure, the component layout, and the design rules, determine the geometric modal characteristics; Based on the design rules and the network table, the physical rule modal characteristics are determined; The electrical performance modal characteristics are determined based on the physical structure, the netlist, and the design rules. The thermal distribution mode characteristics are determined based on the component layout and the physical structure.

3. The PCB routing method based on multimodal fusion according to claim 2, characterized in that, Based on the physical structure, the component layout, and the netlist, the geometric modal features are determined, including: Based on the physical structure, the component layout, and the design rules, a graph structure is generated. The graph structure includes multiple first nodes and multiple first edges connecting the first nodes. Each first node is used to represent an element in the target PCB, and the first edge between two first nodes is used to represent the traceable connection between the two first nodes. Based on graph neural networks, the geometric features of each node and each edge in the graph structure are extracted to obtain geometric modal features.

4. The PCB routing method based on multimodal fusion according to claim 2, characterized in that, Based on the design rules and the network table, the physical rule modal characteristics are determined, including: The design rules and netlist are converted into a rule graph, which includes multiple second nodes and multiple second edges connecting the second nodes. Each second node is used to represent a net in the target PCB, and the second edge between two second nodes is used to represent the constraint relationship between the two second nodes. The physical rule modal features are obtained by extracting features from the rule graph based on a graph attention network.

5. The PCB routing method based on multimodal fusion according to claim 2, characterized in that, The step of determining the electrical performance modal characteristics based on the physical structure, the netlist, and the design rules includes: Based on the network table, the key networks are identified; The physical structure, the key network, and the design rules are input into a pre-trained lightweight prediction model to obtain the electrical performance modal features.

6. The PCB routing method based on multimodal fusion according to claim 2, characterized in that, Determining the thermal distribution mode characteristics based on the component layout and the physical structure includes: A thermal simulation model is established based on the component layout and the physical structure. Based on the thermal simulation model, chip thermal data is output, which includes: multiple hot spot temperatures, thermal gradients, and areas where the temperature rise exceeds the standard. Feature extraction is performed on the thermal data of the chip to obtain thermal distribution mode features.

7. The PCB routing method based on multimodal fusion according to claim 1, characterized in that, The feature fusion of the multimodal state space to obtain input information includes: Based on the cross-modal attention mechanism, the correlation weights of the geometric modal features, physical rule modal features, electrical performance modal features, and thermal distribution modal features in the multimodal state space are determined respectively. The input information is determined based on the geometric modal features, the physical rule modal features, the electrical performance modal features, the thermal distribution modal features, the correlation weights of the geometric modal features, the physical rule modal features, the electrical performance modal features, and the thermal distribution modal features.

8. The PCB routing method based on multimodal fusion according to claim 1, characterized in that, After updating the current wiring information based on the wiring action, the method further includes: Determine whether the wiring target has been completed. If not, construct a new multimodal state space based on the new current wiring information, perform feature fusion on the new multimodal state space to obtain new input information, input the new input information into the agent, output a new wiring action, and update the current wiring information based on the new wiring action until the wiring target is completed, and output the target wiring information.

9. The PCB routing method based on multimodal fusion according to claim 1, characterized in that, The training process of the agent includes: Based on pre-set reward criteria, multiple reward items are determined according to the new current wiring information; If the target cabling information does not violate DRC, then the overall reward is determined; The target reward is determined based on the pre-set weights of each reward item, the weight of the overall reward, each reward item, and the overall reward. The agent is updated based on the target reward.

10. An electronic device, characterized in that, include: The processor and memory, the memory storing machine-readable instructions executable by the processor, which, when the electronic device is running, are executed by the processor to perform the steps of the PCB routing method based on multimodal fusion as described in any one of claims 1 to 9.

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