Systems and methods for specifying radio frequency matching margins for substrate processing devices

Abstract

A substrate processing apparatus with plasma control capabilities is disclosed. The apparatus comprises a radio frequency (RF) source, a plasma chamber, and a plasma control system, the plasma control system comprising: an impedance matching network comprising a first variable impedance matching device and a second variable impedance matching device; and a control circuit configured to determine a first parameter of the first variable impedance matching device and a second parameter of the second variable impedance matching device and a reflected RF power value (Pr) reflected back to the RF source, determine a matching point (MP), where Pr is a specific value (P0), determine a plurality of matching edge points representative of an edge RF power value (PE) based on MP, the edge RF power value (PE) being greater than P0 by a predetermined margin (PM), where PE = P0 + PM, and determining at least one of a size and a center position of the impedance matching region.

Description

Technical Field

[0001] This disclosure generally relates to plasma control systems and methods in substrate processing apparatus, and more specifically to plasma control in substrate processing apparatus. Background Technology

[0002] In the manufacture of semiconductor devices such as microprocessors, memory chips, and other integrated circuits, plasma processing is used at various stages of the manufacturing process. Plasma processing involves energizing a gas mixture by introducing RF (radio frequency) energy into the gas molecules. This gas mixture is typically contained within a vacuum chamber (also known as a plasma chamber), and the RF energy is introduced through electrodes or other devices within the chamber. In a typical plasma process, an RF generator produces power at the desired RF frequency and power, and this power is transmitted to the plasma chamber via RF cables and networks.

[0003] To ensure efficient power transfer from the RF generator to the plasma chamber, an RF matching network is positioned between the RF generator and the plasma chamber. The purpose of the RF matching network is to convert the plasma impedance to a value suitable for the RF generator. In many cases, especially in semiconductor manufacturing processes, RF power is transmitted via a 50-ohm coaxial cable, and the system impedance (output impedance) of the RF generator is also 50 ohms. On the other hand, the impedance of the plasma driven by RF power varies based on the plasma chemistry and other conditions within the plasma chamber. This impedance must be converted to a reactance-free 50 ohm (i.e., 50 + j0) for maximum power transfer. The RF matching network performs the task of continuously converting the plasma impedance to the 50 ohms of the RF generator. In most cases, this conversion results in an impedance of 50 + j0 ohms on the input side of the RF matching network, i.e., a pure resistance of 50 ohms.

[0004] RF matching networks may include variable capacitors and microprocessor-based control circuitry for controlling the capacitors. The value and size of the variable capacitors are influenced by the power handling capability of the plasma chamber, the operating frequency, and the impedance range. The primary variable capacitor used in RF matching networks is the vacuum variable capacitor (VVC). A VVC is an electromechanical device consisting of two concentric metal rings that move relative to each other to change the capacitance. An alternative to VVCs is the electronic variable capacitor (EVC) (see, for example, U.S. Patent No. 7,251,121, the entire contents of which are incorporated herein by reference), which is faster than VVCs and thus enables reductions in semiconductor processing tuning time. EVC-based matching networks are a type of solid-state matching network.

[0005] The operating principle of an RF matching network is to transform the chamber impedance by changing the EVC value, thereby minimizing the RF reflected power at the matching network input. It is difficult to determine how stable these EVC values ​​are from the EVC values ​​alone. Process stability is assessed by combining the reflected power level of the matching conditions with the EVC value. However, there is an unclear margin for determining the extent of stability. Summary of the Invention

[0006] This summary is provided to present the chosen concepts in a simplified form. These concepts are further described in detail in the following description of exemplary embodiments of this disclosure. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0007] According to one embodiment, a substrate processing apparatus may be provided, comprising: a radio frequency (RF) source configured to generate RF; a plasma chamber configured to process a substrate; and a plasma control system, wherein the plasma control system includes: an impedance matching network (IMN) operably coupled between the RF source and the plasma chamber, including a first variable impedance matching device (first VIMD) and a second variable impedance matching device (second VIMD); and control circuitry operably coupled to the impedance matching network (IMN), the control circuitry being configured to: determine a first parameter (C1) of the first variable impedance matching device (first VIMD), a second parameter (C2) of the second variable impedance matching device (second VIMD), and a reflected radio frequency (RF) power value (P) reflected back to the RF source. r ), where P r The values ​​vary according to the first parameter (C1) and the second parameter (C2); the matching point (MP) is determined, where P r It is a specific value (P0); the edge radio frequency (RF) power value (P) is determined based on the matching point (MP). E Multiple Matched Edge Points (MEPs) of ) and edge RF power values ​​(P) E The pre-determined margin is larger than P0 (P M ), where P E = P0 + P M And determine at least one of the size and center location of the impedance matching region (IMA) defined by a plurality of matching edge points (MEPs).

[0008] According to another embodiment, a method for determining an impedance matching region (IMA) in a plasma control system for a substrate processing apparatus can be provided, the method comprising: determining a first parameter (C1) of a first variable impedance matching device (first VIMD), a second parameter (C2) of a second variable impedance matching device (second VIMD), and a reflected radio frequency (RF) power value (P) reflected back to a radio frequency (RF) source. r ), where P r The values ​​vary according to the first parameter (C1) and the second parameter (C2); the matching point (MP) is determined, where P r It is a specific value (P0); the edge radio frequency (RF) power value (P) is determined based on the matching point (MP). E Multiple Matched Edge Points (MEPs) of ) and edge RF power values ​​(P) E The pre-determined margin is larger than P0 (P M ), where P E = P0 + P M And determine at least one of the size and center location of the impedance matching region (IMA) defined by a plurality of matching edge points (MEPs).

[0009] On one hand, determining multiple matching edge points (MEPs) involves changing the first parameter (C1) at the matching point (MP) until P... r From P0 to P E If P r P is reached at the corresponding point. E If the corresponding point is set as the first matching edge point (MEP1), then the remaining multiple matching edge points (MEP) are set by starting from the first matching edge point (MEP1) and reaching the first matching edge point (MEP1) or its vicinity again in a zigzag step manner, wherein the first parameter (C1) and the second parameter (C2) change in a clockwise or counterclockwise direction relative to the matching point (MP).

[0010] On one hand, setting the remaining multiple matching edge points (MEPs) includes: at any one of the multiple matching edge points (MEPs), fixing one of the first parameter (C1) and the second parameter (C2) and changing the other, until P... r From P E Reaching the predetermined upper limit (P) max ) or predetermined lower limit (P) min ), or reach P again E , where P min < P E < P max And P min ≤ P r ≤P max .

[0011] On one hand, setting the remaining multiple matching edge points (MEP) also includes: when P r From P E Reaching P max or P min When, change one of the first parameter (C1) and the second parameter (C2); and if P r Reaching P E If so, the corresponding point will be set as the matching edge point (MEP) among the remaining multiple matching edge points (MEPs).

[0012] On one hand, setting the remaining multiple matching edge points (MEP) also includes: when P r From P E Reaching P max or P min When, change one of the first parameter (C1) and the second parameter (C2); if P r P was not achieved E And reach P again max If P is fixed, then one of the first parameter (C1) and the second parameter (C2) is fixed and the other is changed; and if P r Reaching P E If so, the corresponding point will be set as the matching edge point (MEP) among the remaining multiple matching edge points (MEPs).

[0013] In one aspect, determining multiple matching edge points (MEPs) includes: determining the representation of P by changing a first parameter (C1) and a second parameter (C2) to follow the ridge width direction (a2) of the impedance matching region (IMA) at the matching point (MP). E Furthermore, the first matching edge point (MEP1) and the second matching edge point (MEP2) that are opposite each other in the ridge width direction (a2); by changing the first parameter (C1) and the second parameter (C2) to follow the pole direction (a1) of the impedance matching region (IMA) from the midpoint between the first matching edge point (MEP1) and the second matching edge point (MEP2), the representation of P is determined. E Furthermore, the third matching edge point (MEP3) and the fourth matching edge point (MEP4) that are opposite each other in the pole direction (a1); and by changing the first parameter (C1) and the second parameter (C2) to follow the ridge width direction (a2) from the midpoint between the third matching edge point (MEP3) and the fourth matching edge point (MEP4), the representation P is obtained. E Furthermore, the fifth matching edge point (MEP5) and the sixth matching edge point (MEP6) that are opposite each other in the ridge width direction (a2) are determined, and the size of the ridge width is determined.

[0014] On one hand, determining multiple matching edge points (MEPs) also includes: determining the representation of P by changing the first parameter (C1) and the second parameter (C2) at specific points on the axis connecting MEP3 and MEP4, parallel to the ridge width direction (a2). E And additional matching edge points (MEPs) that are opposite to each other in the ridge width direction (a2).

[0015] On one hand, the impedance matching region (IMA) is determined by the midpoint between MEP3 and MEP4, the distance between MEP3 and MEP4, and the ridge width. Attached Figure Description

[0016] It should be understood that the elements in the accompanying drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the dimensions of some elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the embodiments illustrated in this disclosure.

[0017] Figure 1 This is a block diagram of an embodiment of a plasma control system in a substrate processing apparatus, including an RF generator, a matching network, a plasma chamber, and control circuitry (not shown).

[0018] Figures 2(a) and 2(b) show the impedance space and Gamma space of the plasma chamber impedance for Z1=10+i70, respectively.

[0019] Figures 3(a), 3(b), and 3(c) show the Gamma space, Z2 (matcher-plasma chamber) impedance, and C1 / C2 space constrained by reflection % < 1%, respectively.

[0020] Figure 4 An enlarged view of the C1 / C2 space of the region of interest in Figure 3(c) is shown.

[0021] Figure 5 Another C1 / C2 space is shown, representing the reflection power ratios of 3% and 7%, respectively.

[0022] Figure 6 Another C1 / C2 space is shown, representing reflected power less than 20 watts and 0.5 watts, respectively.

[0023] Figure 7 An embodiment of the present invention is shown, which uses a sawtooth stepping method to find the MEP.

[0024] Figure 8 Another embodiment of the invention is shown, which uses a different sawtooth stepping method to find the MEP.

[0025] Figure 9An alternative embodiment of the invention is shown, which uses the pole and ridge width method to find the MEP. Detailed Implementation

[0026] Although certain embodiments and examples are disclosed below, those skilled in the art will understand that the invention extends beyond the specific disclosed embodiments and / or uses of the invention and their obvious modifications and equivalents. Therefore, it is intended that the scope of the disclosed invention should not be limited to the specific disclosed embodiments described below.

[0027] As used herein, the term "substrate" can refer to any one or more underlying materials, including any one or more underlying materials that can be modified or on which devices, circuits, or films can be formed. A "substrate" can be continuous or discontinuous; rigid or flexible; solid or porous; and combinations thereof. A substrate can be in any form, such as powder, plate, or workpiece. Plate-type substrates can include wafers of various shapes and sizes. Substrates can be made of semiconductor materials, including, for example, silicon, silicon germanium, silicon oxide, gallium arsenide, gallium nitride, and silicon carbide.

[0028] As an example, the substrate in powder form can have applications for pharmaceutical manufacturing. Porous substrates can contain polymers. Examples of workpieces may include medical devices (e.g., stents and syringes), jewelry, tooling devices, components for battery manufacturing (e.g., anodes, cathodes, or separators), or components for photovoltaic cells, etc.

[0029] A continuous substrate can extend beyond the boundaries of the processing chamber, where a deposition process takes place. In some processes, the continuous substrate can move through the processing chamber, allowing the process to continue until the end of the substrate is reached. A continuous substrate can be supplied from a continuous substrate feed system to allow for the fabrication and output of the continuous substrate in any suitable form.

[0030] Non-limiting examples of continuous substrates may include sheets, nonwoven films, rollers, foils, meshes, flexible materials, bundles of continuous filaments or fibers (e.g., ceramic or polymer fibers). Continuous substrates may also include carriers or sheets on which discontinuous substrates are mounted.

[0031] The illustrations presented herein are not intended to be actual views of any particular material, structure, or device, but are merely idealized representations used to describe embodiments of this disclosure.

[0032] The specific embodiments shown and described are illustrative of the invention and its best mode, and are not intended to limit the scope of aspects and embodiments in any way or otherwise. In fact, for the sake of brevity, conventional manufacturing, connection, preparation, and other functional aspects of the system may not be described in detail. Furthermore, the connecting lines shown in the figures are intended to represent exemplary functional relationships and / or physical connections between various elements. Many alternative or additional functional relationships or physical connections may exist in the actual system, and / or may not exist in some embodiments.

[0033] It should be understood that the configurations and / or methods described herein are exemplary in nature, and these specific embodiments or examples should not be considered limiting, as many variations are possible. The particular routines or methods described herein may represent one or more of any number of processing strategies. Therefore, the various actions shown may be performed in the order shown, in a different order, or in some cases omitted.

[0034] The subject matter of this disclosure includes all novel and non-obvious combinations and sub-combinations of the various processes, systems and configurations disclosed herein, as well as any and all equivalents thereof.

[0035] Reference Figure 1 The plasma control system in the substrate processing apparatus according to an embodiment of the present invention includes an RF generator, a matching network, a plasma chamber, and a control circuit (not shown).

[0036] Semiconductor devices can be microprocessors, memory chips, or other types of integrated circuits or devices. A substrate can be placed in a plasma chamber, which is configured to deposit or etch material layers onto or from the substrate. Plasma processing involves energizing a gas mixture by introducing RF energy into the gas molecules. This gas mixture is typically contained within a vacuum chamber (plasma chamber), and the RF energy is typically introduced into the plasma chamber via electrodes. Therefore, the plasma can be excited to perform deposition or etching by coupling RF power from an RF source into the plasma chamber.

[0037] In a typical plasma process, an RF generator produces power at radio frequency (typically in the range of 3 kHz to 300 GHz), and this power is transmitted to the plasma chamber via RF cables and networks. To provide efficient power transmission from the RF generator to the plasma chamber, an intermediate circuit is used to match the fixed impedance of the RF generator to the variable impedance of the plasma chamber. This intermediate circuit is commonly referred to as an RF impedance matching network, or more simply as an RF matching network (hereinafter referred to as "RF matching network"). The purpose of the RF matching network is to convert the variable plasma impedance to a value that more closely matches the fixed impedance of the RF generator.

[0038] The illustrated matching network uses an electronically variable capacitor (EVC) for a first variable impedance matching device (first VIMD) having a first parameter (C1) and a second variable impedance matching device (second VIMD) having a second parameter (C2). It should be noted that the invention is not limited thereto. For example, one of the EVCs can be a mechanically variable VVC, or it can be replaced by a variable inductor.

[0039] As described above, an RF matching network is used to help maximize the amount of RF power delivered from an RF source to a plasma chamber by matching the impedance to a fixed impedance of the RF source. The RF matching network can consist of a single module within a single housing, which is designed to electrically connect to the RF source and the plasma chamber. In other embodiments, the components of the RF matching network can be located in different housings, some components can be outside the housing, and / or some components can share the housing with components outside the RF matching network. As an example of an RF matching network, see, for example, U.S. Patent No. 10,707,057 B2. Figure 1 Its entire content is incorporated into this article through citation.

[0040] As is known in the art, the plasma within a plasma chamber typically experiences certain fluctuations beyond operational control, resulting in a variable impedance presented by the plasma chamber. Since the variable impedance of the plasma chamber cannot be fully controlled, impedance matching networks can be used to create impedance matching between the plasma chamber and the RF source. Furthermore, the impedance of the RF source can be fixed at a set value through the design of a specific RF source. Although the fixed impedance of the RF source may experience minor fluctuations during use due to factors such as temperature or other environmental changes, it is still considered a fixed impedance for impedance matching purposes because the fluctuations do not cause the fixed impedance to change significantly from its original set value. Other types of RF sources can be designed such that the impedance of the RF source can be set during or at the time of use. The impedance of this type of RF source is still considered fixed because it can be controlled by the user (or at least by a programmable controller), and the impedance setpoint can be known at any time during operation, thus effectively making the setpoint a fixed impedance.

[0041] The RF source can be an RF generator of a type known in the art, and generates an RF signal at an appropriate frequency and power for use in the process performed within the plasma chamber. The RF source can be electrically connected to an RF impedance matching network using a coaxial cable, which will have the same fixed impedance as the RF source for impedance matching purposes.

[0042] Plasma in a plasma chamber enables one or both of the following: material deposition onto a substrate and material etching from the substrate.

[0043] In an exemplary embodiment, the RF matching network includes a first variable impedance matching device (first VIMD) and a second variable impedance matching device (second VIMD).

[0044] In an exemplary embodiment, each of the first VIMD and the second VIMD may be an electronically variable capacitor (EVC), as described in U.S. Patent No. 7,251,121, which is effectively formed as a capacitor array consisting of a plurality of discrete capacitors.

[0045] In an exemplary embodiment, the control circuitry includes a processor. The processor can be any type of suitably programmed processing device (or a collection of two or more processing devices working together) configured to execute computer program instructions (e.g., code), such as a computer or microprocessor. The processor can be embodied in any suitable type of computer and / or server hardware (e.g., desktop, laptop, notebook, tablet, cellular phone, etc.) and can include all common auxiliary components required to form a functional data processing device, including but not limited to buses, software and data memory (e.g., volatile and non-volatile memory), input / output devices, graphical user interfaces (GUIs), removable data storage, and wired and / or wireless communication interface devices (including Wi-Fi, Bluetooth, LAN, etc.). The processor in the exemplary embodiment is configured with specific algorithms to enable the matching network to perform the functions described herein.

[0046] The control circuit is the brain of the RF impedance matching network because it receives multiple inputs from sources such as RF sources and the EVC, performs the calculations required to determine the changes in the EVC, and delivers commands to the EVC to create impedance matching. Control circuits are a common type of control circuit used in semiconductor manufacturing processes and are therefore known to those skilled in the art. Any differences in control circuits compared to prior art arise from programming differences to address the speed at which the RF matching network can perform EVC switching and impedance matching.

[0047] exist Figure 1In this context, the EVC values ​​(C1, C2) convert the actual plasma chamber impedance value Z1 into the effective plasma chamber impedance value Z2 as shown below.

[0048] Z1(R+iX)→Z2(Z2_re+i Z2_im)for(C1,C2,f0): Impedance calculation

[0049] exist Figure 1 In this example, the EVC values ​​(C1, C2) and f0 form the unique Z1 to Z2.

[0050] Gamma (voltage standing wave ratio) is defined as follows.

[0051] Gamma = (Z2 - Zout) / (Z2 + Zout)

[0052] Using mathematical tools, the matching network performs a 2D mapping function between the control space, impedance space, and Gamma space.

[0053] The Gamma value is related to the reflection power ratio, as described below.

[0054] Reflection%=[absolute(Gamma)] 2

[0055] Figures 2(a) and 2(b) show the impedance space and Gamma space of the plasma chamber impedance Z1 = R + iX, where R is 10 ohms and X is 70 ohms, respectively. In Figure 2(a), C1 can vary up to 2000 pF, while C2 can vary up to 500 pF. The Gamma space can be obtained by mapping the impedance space shown in Figure 2(a) using the above formula Gamma = (Z2 - Zout) / (Z2 + Zout).

[0056] Figures 3(a), 3(b), and 3(c) show the Gamma space, Z2 (matcher-plasma chamber) impedance, and C1 / C2 space constrained by reflection % < 1%, respectively. In Figure 3(c), the C1 / C2 space is shown in a controlled scale, where C1 = 100 x (C1 actual / C1 max ), C2 = 100 x (C2 actual / C2 max ), and 0 ≤ C1≤100 and 0 ≤ C2≤100.

[0057] Figure 4 An enlarged view of the C1 / C2 space of the region of interest in Figure 3(c) is shown, wherein the ranges of C1 and C2 of the region of interest are 21~28 and 47~52, respectively, and the geometric center is obtained as (24.4, 49.2).

[0058] Figure 5 Another C1 / C2 space is shown, representing the reflection power ratios of 3% and 7%, respectively.

[0059] Figure 6 Alternative C1 / C2 spaces with reflected power less than 20 W and 0.5 W, respectively, are shown using a scanning method. Scanning was performed under plasma chamber conditions of 180 W (drive power), N2 (plasma gas), and continuous wave (CW) input. The impedance matching region is substantially elliptical in shape, and the slope of the major axis can be... Figure 6 We find that C2 / C1 = -0.2. Therefore, if C1 moves by d1, then C2 also moves accordingly. Figure 6 The long axis scan movement is d1*(-0.2).

[0060] There are two ways to specify the RF impedance matching margin of the matching network: calculation and scanning.

[0061] First, one approach to specifying the RF impedance matching margin of the matching network can be performed by calculating the matching data as follows: if the matching network characteristics are known and the relational matrix is ​​pre-stored for each plasma chamber impedance, the user can specify the matching margin from the measured chamber impedance, assuming the plasma impedance is constant for small power variations. The calculated matching margin can be parameterized by matching the C1 / C2 phase diagram region or by two-dimensional topological features within that C1 / C2 phase diagram region.

[0062] Secondly, another method for specifying the RF impedance matching margin of the matching network can be performed by scanning around the matching point using the matching device as follows: the EVC values ​​(C1, C2) can vary under the constraint that the reflected power level is below a threshold. The scan will take time, but it has the advantage of not having to directly measure the room impedance and not having to refer to a pre-stored dataset. A separate RF power sensor can be used to guide the scan.

[0063] Especially for EVC, the scan time will be several hundred milliseconds, which is short enough for the RF turn-on time during the ALD process.

[0064] The advantages of this invention can be achieved by using the two methods described above, because users can obtain additional information, such as impedance matching regions and a precise set of optimal C1 / C2 matching values.

[0065] Using impedance matching region information, users can reliably and quantitatively determine the stability of the RF system within the matching network and plasma chamber. The impedance matching region is the C1 / C2 position tolerance relative to the plasma chamber impedance (Z1).

[0066] Once the impedance matching region information is obtained, the geometric center within the region can be easily calculated to obtain the nominal matching point. This nominal matching point is a more accurate set of C1 / C2 values ​​for the plasma chamber impedance because it has the characteristic of being the average value of the impedance matching region.

[0067] Process operations can also be performed on the matching edge points of the impedance matching region. If a matching edge point with greater reflected power is stable, then the nominal matching point is more stable. The process at the edge poles can be compared with the process at the geometric center to determine process stability. This intentional deviation test can be used to test process stability and adjust the threshold of the matching edge points.

[0068] According to one embodiment of the present invention, a method for determining the impedance matching region (IMA) in a plasma control system for a substrate processing apparatus is disclosed. Specifically, the method includes: determining a first parameter (C1) of a first variable impedance matching device (first VIMD), a second parameter (C2) of a second variable impedance matching device (second VIMD), and a reflected radio frequency (RF) power value (P) reflected back to the radio frequency (RF) source. r ), where P r The values ​​vary according to the first parameter (C1) and the second parameter (C2); the matching point (MP) is determined, where P r It is a specific value (P0); the edge radio frequency (RF) power value (P) is determined based on the matching point (MP). E Multiple Matched Edge Points (MEPs) of ) and edge RF power values ​​(P) E The pre-determined margin is larger than P0 (P M ), where P E = P0 + P M And determine at least one of the size and center location of the impedance matching region (IMA) defined by a plurality of matching edge points (MEPs).

[0069] Figure 7 An embodiment of the present invention is shown, which uses a sawtooth stepping method to find the MEP.

[0070] At the matching point (MP), change the first parameter (C1) until P. r From P0 to P E .

[0071] Then, if P r P is reached at the corresponding point. E If so, the corresponding point is set as the first MEP (MEP1). In other words, C1 moves from MP to MEP1.

[0072] Then, the remaining multiple MEPs are set by starting from MEP1 and returning to MEP1 or its vicinity in a zigzag step manner, wherein the first parameter (C1) and the second parameter (C2) vary in a clockwise or counterclockwise direction relative to the matching point (MP).

[0073] In another embodiment of the invention, at any of the plurality of Matching Edge Points (MEPs), one of the first parameter (C1) and the second parameter (C2) is fixed and the other is changed until P. r From P E Reaching the predetermined lower limit (P) min (For example, C2 moves from MEP1 to A) min Or move from MEP2 to B min ), or reach P again E (For example, C2 moves from MEP3 to MEP4), where P min < P E And P min ≤ P r ≤ P E .

[0074] In another embodiment of the invention, when P r From P E Reaching P min When, change one of the first parameter (C1) and the second parameter (C2); and if P r Reaching P E If so, the corresponding point is set as the Matching Edge Point (MEP) among the remaining multiple Matching Edge Points (MEPs). In other words, C1 is from A min Move to MEP2 or from B min Move to MEP3.

[0075] Figure 8 Another embodiment of the invention is shown, which uses a different sawtooth stepping method to find the MEP.

[0076] At the matching point (MP), change the first parameter (C1) until P. r From P0 to P E .

[0077] Then, if P r P is reached at the corresponding point. E If so, the corresponding point is set as the first MEP (MEP1). In other words, C1 moves from MP to MEP1.

[0078] Then, the remaining multiple MEPs are set by starting from MEP1 and returning to MEP1 or its vicinity in a zigzag step manner, wherein the first parameter (C1) and the second parameter (C2) vary in a clockwise or counterclockwise direction relative to the matching point (MP).

[0079] In another embodiment of the invention, at any of the plurality of Matching Edge Points (MEPs), one of the first parameter (C1) and the second parameter (C2) is fixed and the other is changed until P. r From P E Reaching the predetermined upper limit (P) max (For example, C2 moves from MEP3 to A) max Or move from MEP4 to B max ), where P E < P max And P E ≤ P r ≤ P max .

[0080] In another embodiment of the invention, when P r From P E Reaching P max When, change one of the first parameter (C1) and the second parameter (C2); and if P r Reaching P E If so, the corresponding point is set as the Matching Edge Point (MEP) among the remaining multiple Matching Edge Points (MEPs). In other words, C1 is from A max Move to MEP4.

[0081] In another embodiment of the invention, when P r From P E Reaching P max When, change one of the first parameter (C1) and the second parameter (C2); if P r P was not achieved E And reach P again max (For example, C1 is from B) max Move to C max If P is fixed, then one of the first parameter (C1) and the second parameter (C2) is fixed and the other is changed; and if P r Reaching P E If so, the corresponding point will be set as the matching edge point (MEP) among the remaining multiple matching edge points (MEPs). In other words, C1 is from C max Move to MEP5.

[0082] Figure 9 Another embodiment of the invention is shown, which uses the pole and ridge width method to find the MEP.

[0083] By changing the first parameter (C1) and the second parameter (C2) to follow the ridge width direction (a2) of the impedance matching region (IMA) at the matching point (MP), the representation of P can be determined. E Furthermore, the first matching edge point (MEP1) and the second matching edge point (MEP2) are opposite to each other in the ridge width direction (a2). Then, by changing the first parameter (C1) and the second parameter (C2) to follow the pole direction (a1) of the impedance matching region (IMA) from the midpoint between the first matching edge point (MEP1) and the second matching edge point (MEP2), the representation of P can be determined. E Furthermore, the third matching edge point (MEP3) and the fourth matching edge point (MEP4) are opposite to each other in the pole direction (a1). Then, by changing the first parameter (C1) and the second parameter (C2) to follow the ridge width direction (a2) from the midpoint between the third matching edge point (MEP3) and the fourth matching edge point (MEP4), the representation P can be obtained. E Furthermore, the fifth matching edge point (MEP5) and the sixth matching edge point (MEP6) that are opposite each other in the ridge width direction (a2) are determined, and the size of the ridge width is determined.

[0084] In another embodiment of the invention, by changing the first parameter (C1) and the second parameter (C2) at a specific point on the axis connecting MEP3 and MEP4, parallel to the ridge width direction (a2), the representation of P can be determined. E And additional matching edge points (MEPs) that are opposite to each other in the ridge width direction (a2).

[0085] In another embodiment of the invention, the impedance matching region (IMA) is determined by the midpoint between MEP3 and MEP4, the distance between MEP3 and MEP4, and the ridge width.

[0086] While the embodiments discussed herein use one or more variable capacitors in the matching network to achieve impedance matching, it should be noted that any variable reactance element can be used. A variable reactance element may include one or more discrete reactance elements, wherein the reactance element is a capacitor or inductor or a similar reactive device.

[0087] While the invention has been described with respect to specific examples including the currently preferred mode of carrying out the invention, those skilled in the art will understand that many variations and substitutions of the above-described system and techniques exist. It should be understood that other embodiments can be utilized and structural and functional modifications can be made without departing from the scope of the invention. Therefore, the spirit and scope of the invention should be interpreted broadly as set forth in the appended claims.

[0088] The configuration of the above-described equipment and methods is merely an illustration of the application of the principles of the present invention, and many other embodiments and modifications can be made without departing from the spirit and scope of the invention as defined in the claims. Therefore, the scope of the invention should not be determined by reference to the above description, but rather by the full scope of the appended claims and their equivalents.

Claims

1. A substrate processing apparatus, comprising: A radio frequency (RF) source configured to generate RF; A plasma chamber configured to process a substrate; as well as The plasma control system includes: An impedance matching network (IMN) operatively coupled between an RF source and a plasma chamber includes a first variable impedance matching device (first VIMD) and a second variable impedance matching device (second VIMD). and A control circuit, operably coupled to an impedance matching network (IMN), is configured to: Determine the first parameter (C1) of the first variable impedance matching device (first VIMD), the second parameter (C2) of the second variable impedance matching device (second VIMD), and the reflected radio frequency (RF) power value (P) reflected back to the radio frequency (RF) source. r ), where P r It varies depending on the values ​​of the first parameter (C1) and the second parameter (C2); Determine the matching point (MP), where P r It is a specific value (P0); Determine the edge radio frequency (RF) power value (P) based on the matching point (MP). E Multiple Matched Edge Points (MEPs) of ) and edge RF power values ​​(P) E The pre-determined margin is larger than P0 (P M ), where P E = P0 + P M ;and Determine at least one of the size and center location of the impedance matching region (IMA) defined by a plurality of matching edge points (MEPs).

2. A method for determining the impedance matching region (IMA) in a plasma control system for a substrate processing apparatus, the method comprising: Determine the first parameter (C1) of the first variable impedance matching device (first VIMD), the second parameter (C2) of the second variable impedance matching device (second VIMD), and the reflected radio frequency (RF) power value (P) reflected back to the radio frequency (RF) source. r ), where P r It varies depending on the values ​​of the first parameter (C1) and the second parameter (C2); Determine the matching point (MP), where P r It is a specific value (P0); Determine the edge radio frequency (RF) power value (P) based on the matching point (MP). E Multiple Matched Edge Points (MEPs) of ) and edge RF power values ​​(P) E The pre-determined margin is larger than P0 (P M ), where P E = P0 + P M ;and Determine at least one of the size and center location of the impedance matching region (IMA) defined by a plurality of matching edge points (MEPs).

3. The method according to claim 2, wherein, Determining the plurality of matching edge points (MEPs) includes: At the matching point (MP), change the first parameter (C1) until P. r From P0 to P E ; If P r P is reached at the corresponding point. E Then, the corresponding point is set as the first matching edge point (MEP1); and The remaining matching edge points (MEPs) are set by starting from the first matching edge point (MEP1) and then returning to or near the first matching edge point (MEP1) in a zigzag stepping manner. The first parameter (C1) and the second parameter (C2) change in a clockwise or counterclockwise direction relative to the matching point (MP).

4. The method according to claim 3, wherein, Setting the remaining multiple Matching Edge Points (MEPs) includes: At any of the plurality of Matching Edge Points (MEPs), fix one of the first parameter (C1) and the second parameter (C2) and change the other until P. r From P E Reaching the predetermined upper limit (P) max ) or predetermined lower limit (P) min ), or reach P again E , where P min < P E < P max And P min ≤ P r ≤ P max .

5. The method according to claim 4, wherein, Setting the remaining multiple matching edge points (MEP) also includes: When P r From P E Reaching P max or P min When changing one of the first parameter (C1) and the second parameter (C2), and... If P r Reaching P E If so, the corresponding point is set as the matching edge point (MEP) among the remaining multiple matching edge points (MEPs).

6. The method according to claim 4, wherein, Setting the remaining multiple matching edge points (MEP) also includes: When P r From P E Reaching P max or P min When changing one of the first parameter (C1) and the second parameter (C2), the change is made. If P r P was not achieved E And reach P again max Then, fix one of the first parameter (C1) and the second parameter (C2) and change the other; and If P r Reaching P E If so, the corresponding point is set as the matching edge point (MEP) among the remaining multiple matching edge points (MEPs).

7. The method according to claim 2, wherein, Determining the plurality of matching edge points (MEPs) includes: By changing the first parameter (C1) and the second parameter (C2) to follow the ridge width direction (a2) of the impedance matching region (IMA) at the matching point (MP), the value representing P is determined. E And the first matching edge point (MEP1) and the second matching edge point (MEP2) that are opposite to each other in the ridge width direction (a2); By changing the first parameter (C1) and the second parameter (C2) to follow the pole direction (a1) of the impedance matching region (IMA) from the midpoint between the first matching edge point (MEP1) and the second matching edge point (MEP2), the representation of P is determined. E And the third matching edge point (MEP3) and the fourth matching edge point (MEP4) that are opposite each other in the pole direction (a1); and By changing the first parameter (C1) and the second parameter (C2) to follow the ridge width direction (a2) from the midpoint between the third matching edge point (MEP3) and the fourth matching edge point (MEP4), the representation P is obtained. E Furthermore, the fifth matching edge point (MEP5) and the sixth matching edge point (MEP6) that are opposite each other in the ridge width direction (a2) are determined, and the size of the ridge width is determined.

8. The method according to claim 7, wherein, Determining the plurality of matching edge points (MEPs) further includes: By changing the first parameter (C1) and the second parameter (C2) at a specific point on the axis connecting MEP3 and MEP4, parallel to the ridge width direction (a2), the representation of P is determined. E And additional matching edge points (MEPs) that are opposite to each other in the ridge width direction (a2).

9. The method according to claim 7, wherein, The impedance matching region (IMA) is determined by the midpoint between MEP3 and MEP4, the distance between MEP3 and MEP4, and the ridge width.

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