Process for producing semiconductor wafer from monocrystalline silicon

By maintaining a constant pulling speed and changing the crucible rotation direction during the cylindrical section and end cone of silicon single crystal, combined with a horizontal magnetic field, the problem of LLS defects in silicon single crystal wafers was solved, thus improving the quality of large-size semiconductor wafers.

CN121511331APending Publication Date: 2026-02-10SILTRONIC AG
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Patent Information

Application Number
CN202480045919.4
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-07-18
Filing Date
2024-07-05
Publication Date
2026-02-10

AI Technical Summary

Technical Problem

Existing technologies are insufficient to effectively reduce LLS defects in silicon single-crystal wafers, especially in the cylindrical section where LLS defects account for 75% to 95%, thus affecting wafer quality.

Method used

By maintaining a constant pulling speed during the cylindrical section and end cone of the Czochralski silicon single crystal pulling process, and increasing the pulling speed when pulling the end cone, while changing the rotation direction of the crucible and applying a horizontal magnetic field in the melt, the axial temperature gradient and rotation speed are controlled.

Benefits of technology

It significantly reduces LLS defects smaller than 19 nm in silicon single-crystal wafers, improving wafer quality, especially the performance of semiconductor wafers with diameters of 200 mm or 300 mm.

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Abstract

The present invention proposes a process for producing a semiconductor wafer from monocrystalline silicon, comprising pulling up a cylindrical section of the monocrystalline silicon from a melt present in a crucible and subsequently pulling up an end cone of the monocrystalline silicon; wherein the pulling speed at which the end cone is pulled is kept substantially constant as compared to the pulling speed at which the end region of the cylindrical section is pulled; rotating the crucible at a rotational speed and in a rotational direction during pulling of the cylindrical section and the end cone of the single crystal; the pulling speed during the pulling of the end cone is at least greater than 0.46 mm / min, while the direction of rotation of the crucible continuously changes, and the magnitude of the rotation speed before and after the change of the direction of rotation is not less than 6 rpm.
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Description

Technical Field

[0001] This invention provides a process (or method) for producing semiconductor wafers from single-crystal silicon. Background Technology

[0002] In most practical cases, single crystals are produced from silicon using either the crucible pulling process (the so-called Chuklaski process or CZ process) or the crucibleless pulling process (the so-called zone melting process or FZ process). Single crystals in bar form, typically 100 to 300 mm in diameter, are primarily used as substrates for producing wafers, which are then used to manufacture electronic components.

[0003] The Czochralski method involves pulling a single crystal from a melt present in a crucible. The single crystal is pulled from the melt suspended from a seed crystal. Generally, the neck first crystallizes at the lower end of the seed crystal so that dislocations move to the edge of the neck and are eliminated in this way. Further pulling of the silicon single crystal continues in a conventional manner (particularly through conical, cylindrical, and end-tapered sections of the single crystal). Near the end of the pulling operation, the single crystal tapers to a small diameter in a conical shape. This prevents slip or dislocations in the single crystal that occur during separation from the melt from the single crystal from the melt from returning to the single crystal to any extent, especially to the cylindrical section. The silicon single-crystal semiconductor wafer is cut from the cylindrical section of the single crystal and further processed.

[0004] When pulling silicon single crystals using the CZ method, it is particularly important to control the V / G ratio of the pulling speed V to the axial temperature gradient G at the crystal boundary.

[0005] The pulling rate V is the speed at which the growing single crystal is pulled upward away from the melt, and the axial temperature gradient G is a measure indicating the temperature change at the crystal boundary in the direction of crystal displacement.

[0006] If the ratio V / G is above the critical value k1, vacancies will predominate, which can aggregate and then be identified as COPs (crystal origin particles). Depending on the detection method, this is also known as LPD (light spot defect) or LLS (local light scatterer).

[0007] If the V / G ratio is below the critical value k2 (which is less than k1), the principal intrinsic point defects will manifest as interstitial lattice atoms (silicon self-interstitial atoms), which can also form aggregates and macroscopically appear as dislocation loops. Aggregates of interstitial lattice atoms form local crystal dislocations, which are also known as LPIT (Large Etching Pit) due to the detection method used.

[0008] In the broadest sense, the region where no defects or interstitial lattice atoms accumulate (i.e., the region where V / G is between k1 and k2) is called the neutral region or perfect region. The V / G value when a crystal changes from excess defects to interstitial lattice atoms naturally falls between k1 and k2.

[0009] The axial temperature gradient G at the crystal boundary and its radial distribution are determined by heat transfer from and to the crystal boundary. Heat transfer is significantly influenced by the thermal properties of the environment of the growing single crystal (the so-called hot zone) and the heat supply through one or more heating devices.

[0010] The axial and radial distributions of the axial temperature gradient G at the crystal boundary can be determined by simulation calculations that take into account thermal equilibrium.

[0011] To keep the quotient V / G within a predetermined range in the axial direction, it is necessary to compensate for the change in the axial temperature gradient G over time by correspondingly changing the lifting speed V. The quotient V / G can also be controlled by controlling the lifting speed V.

[0012] Oxygen plays a crucial role in the formation of BMDs (volume microdefects). BMDs are oxygen precipitates that form nuclei from BMDs during heat treatment. BMDs act as internal getters, i.e., energy absorption traps for impurities, and are therefore fundamentally advantageous.

[0013] US 2020 / 199776 A1 discloses a process for producing single-crystal silicon, wherein if a dislocation occurs during crystal pulling (or crystal pulling), pulling continues at the same pulling rate until the dislocation initiation point crosses the temperature region where a BMD nucleus forms. Therefore, the aim of this process is to avoid affecting the thermal history of the non-dislocation region by altering the pulling process, and to enable the formation of BMDs in subsequent thermal processing of these wafers.

[0014] EP4025726A1 discloses a method for producing semiconductor wafers from single-crystal silicon via CZ, wherein the rotation direction of the crucible is continuously changed. This allows the axial fluctuation of oxygen concentration (expressed as the difference between the maximum and minimum concentration) in the cylindrical segment of the single crystal to be reduced by more than half.

[0015] An increase in LLS (Liquid Crystallization Synthetic Assay) sizes smaller than 19 nm was found in wafers cut from cylindrical segments ranging from 75% to 95% of the rod length of a single crystal. This size of LLS could be detected by scattered light measurement using an SP5 particle measurement device from KLA. Summary of the Invention

[0016] The purpose of this invention is to reduce LLS contamination on wafers.

[0017] The object of the present invention is achieved by a process (or method) for producing semiconductor wafers from single-crystal silicon, the process comprising pulling a cylindrical segment (or cylindrical portion) of a silicon single crystal from a melt present in a crucible and subsequently pulling an end cone (or end taper) of the silicon single crystal. Among them, the lifting speed of the end cone remains basically constant compared to the lifting speed of the cylindrical section (or relative to the lifting speed of the cylindrical section); During the cylindrical section and end cone of the Czochralski single crystal pulling process, the crucible is rotated at a certain rotational speed and in a certain rotational direction; and Single-crystal silicon semiconductor wafers are diced from cylindrical segments of a single crystal, wherein the pulling speed during the pulling of the end cone is at least greater than 0.46 mm / min, while the rotation direction of the crucible is continuously changed, and the magnitude of the rotation speed before and after the change of rotation direction is not less than 6 rpm.

[0018] The process of this invention enables a significant reduction in the level of LLS with a size smaller than 19 nm in wafers cleaved from cylindrical segments of a single crystal in the range of 75% to 95% of the rod length.

[0019] From the inventor's perspective, this is related to the fact that the process reduces the residence time in this section (75% to 95% of the bar length). This will be illustrated in a later example.

[0020] Preferred embodiments of the present invention are given in the following description and claims.

[0021] At least during the cylindrical section of the Czochralski single crystal, the melt is preferably subjected to a horizontal magnetic field. In the phase boundary region between the grown single crystal and the melt, the strength of the horizontal magnetic field is preferably not less than 0.2 T and not greater than 0.4 T.

[0022] The process of this invention is particularly suitable for producing silicon single-crystal semiconductor wafers with a diameter of at least 200 mm, and especially at least 300 mm.

[0023] The growth of cylindrical segments of the crystal is preferably achieved by adjusting v / G so that the rods are free of defects and interstitial lattice atom aggregates, i.e., the resulting wafers do not contain any L-Pit or COP.

[0024] In one embodiment, no dislocations occur when pulling the cylindrical section of a single crystal.

[0025] Changing the crucible rotation during the formation of the end cone results in a more stable shape for the end cone. This can reduce the dislocation frequency of the end cone by 2%.

[0026] The features described in detail above with respect to the process of the present invention can be implemented individually or in combination as embodiments of the present invention. Furthermore, they can describe advantageous implementations that can be independently protected. Detailed Implementation

[0027] Example Simulations of the thermal history of the CZ process show high residence times in the rod region (75-95%) where LLS defects have been observed, within a temperature range between 600°C and 700°C.

[0028] The increase in the lifting speed of the end cone and the significant reduction in the allowable dwell time of the crucible rotation result in a significant reduction in defects.

[0029] Simulate various lifting speeds and conduct experimental tests.

[0030] Comparison example: Lower lifting speed of the end cone (-10%) Example 1: A lower pulling speed is applied at the end of the bar, followed by a constant speed from the end of the bar to the end cone. Example 2: High lifting speed from the end of the rod to the end cone Example 3 (of the present invention): The higher lifting speed from the end of the rod to the end cone and the change in crucible rotation for the end cone. Table 1 shows the minimum and maximum dwell times for the comparative examples and examples 1 to 3, determined by numerical simulation.

[0031] Table 1

[0032] Examples 1 to 3 resulted in a significant reduction in LLS < 19 nm, as shown in Table 2.

[0033] Table 2

[0034] However, in Example 2 (without changing the crucible rotation), COP was found at the end of the rod.

[0035] Example 3, which only involves increased lifting speed and altered crucible rotation, resulted in an even more significant reduction in LLS (compared to Examples 1 and 2) while simultaneously avoiding COP.

[0036] The above description of illustrative embodiments should be considered by way of example. Therefore, this disclosure aims firstly to enable those skilled in the art to understand the invention and its associated advantages, and secondly, to understand that obvious changes and modifications to the described structures and methods are also possible. Therefore, all such changes and modifications, as well as equivalents, should be considered to be covered by the scope of the claims.

Claims

1. A process for producing semiconductor wafers from single-crystal silicon, comprising pulling a cylindrical segment of a silicon single crystal from a melt present in a crucible and subsequently pulling an end cone of the silicon single crystal; in, The lifting speed for the end cone remains essentially constant compared to the lifting speed for the end region of the cylindrical section. During the cylindrical section and end cone of the Czochralski single crystal, the crucible is rotated at a certain rotational speed and in a certain rotational direction; as well as Single-crystal silicon semiconductor wafers are diced from cylindrical segments of a single crystal, wherein the pulling speed during the pulling of the end cone is at least greater than 0.46 mm / min, while the rotation direction of the crucible is continuously changed, and the magnitude of the rotation speed before and after the change of rotation direction is not less than 6 rpm.

2. The process as described in claim 1, wherein, The lifting speed during the lifting of the end cone is at least greater than 0.5 mm / min.

3. The process according to any one of claims 1 and 2, wherein, The residence time of the cylindrical section of the rod, ranging from 75% to 95% of its length, is less than 460 minutes within a temperature range of 600-700℃.

4. The process according to any one of claims 1 to 3, wherein, The diced semiconductor wafers do not contain COP or LPit.

5. The process according to any one of claims 1 to 4, wherein, No dislocations occur in the cylindrical section of the Czochralski single crystal.

6. The process according to any one of claims 1 to 5, wherein, The melt is subjected to a horizontal magnetic field.

Citation Information

Patent Citations

  • Method for producing semiconductor wafers from monocrystalline silicon

    EP4025726A1

  • Method for producing silicon single crystal

    US20200199776A1