Half-bridge cascade circuit with current sampling function and corresponding circuit board

Abstract

The application provides a half-bridge cascade circuit with current sampling function and a corresponding circuit board. A digital-to-analog conversion chip performs digital-to-analog conversion on a first PWM digital signal to generate a first analog signal, and a voltage conversion chip performs voltage conversion on the first analog signal with the voltage of a switching node as a reference. An integrated chip performs digital-to-analog conversion on a second PWM digital signal to generate a second analog signal, and a signal output pin outputs the second analog signal, and the integrated chip generates a current sampling signal based on a power supply voltage generated by a power supply and the second analog signal. The second analog signal can control the conduction or disconnection of a first lower bridge arm field effect transistor, and the first analog signal can control the conduction or disconnection of a first upper bridge arm field effect transistor and a second upper bridge arm field effect transistor. Based on the time of the conduction or disconnection of the first upper bridge arm field effect transistor and the second upper bridge arm field effect transistor, and based on the time of the conduction or disconnection of the first lower bridge arm field effect transistor, the half-bridge cascade circuit can adjust the voltage of the switching node.

Description

Technical Field

[0001] This invention relates to the field of circuit technology, and in particular to a half-bridge cascaded circuit with current sampling function and a corresponding circuit board. Background Technology

[0002] In modern society, half-bridge circuits are widely used in various topologies of switching power supplies and motors. In traditional designs, a half-bridge circuit includes a driver, two independent switching transistors, and a current sampling resistor. The current sampling signal needs to be acquired through the current sampling resistor, but this resistor introduces additional losses. Therefore, existing half-bridge circuits suffer from low efficiency.

[0003] Therefore, it is necessary to provide a half-bridge cascaded circuit with current sampling function and a corresponding circuit board to solve the above-mentioned technical problems. Summary of the Invention

[0004] This invention provides a half-bridge cascaded circuit with current sampling function and a corresponding circuit board, which effectively solves the technical problem of low efficiency of existing half-bridge circuits.

[0005] This invention provides a half-bridge cascaded circuit with current sampling function, comprising:

[0006] A digital-to-analog converter chip includes a digital-to-analog converter input pin and a digital-to-analog converter output pin. The digital-to-analog converter input pin is used to receive a first PWM digital signal. The digital-to-analog converter chip is used to perform a digital-to-analog conversion operation on the first PWM digital signal to generate a first analog signal. The digital-to-analog converter output pin is used to output the first analog signal.

[0007] A voltage conversion chip includes a voltage conversion input pin and a voltage conversion output pin. The voltage conversion input pin is connected to the digital-to-analog conversion output pin. The voltage conversion chip is used to perform voltage conversion on the first analog signal with reference to the voltage of the switching node.

[0008] The first upper arm field-effect transistor has its gate connected to the voltage conversion output pin, its source connected to the switching node, and its drain connected to the source of the second upper arm field-effect transistor.

[0009] The drain of the second upper arm field-effect transistor is connected to the high voltage bus, and the gate of the second upper arm field-effect transistor is connected to the source of the first upper arm field-effect transistor.

[0010] The first lower bridge arm field-effect transistor has its drain connected to the switching node, its source connected to the integrated chip, and its gate grounded.

[0011] The integrated chip includes a signal input pin, a signal output pin, a sampling current pin, a power supply pin, and a ground pin. The signal input pin is used to receive a second PWM digital signal. The integrated chip is used to perform a digital-to-analog conversion operation on the second PWM digital signal to generate a second analog signal. The signal output pin is used to output the second analog signal and is connected to the source of the first lower bridge arm field-effect transistor. The power supply pin is connected to a power supply. The integrated chip is used to generate a current sampling signal based on the power supply voltage generated by the power supply and the second analog signal. The sampling current pin is used to output the current sampling signal, and the ground pin is grounded.

[0012] The second analog signal is used to control the first lower bridge arm MOSFET to be turned on or off, and the first analog signal is used to control the first upper bridge arm MOSFET and the second upper bridge arm MOSFET to be turned on or off.

[0013] Based on the on / off time of the first upper bridge arm MOSFET and the second upper bridge arm MOSFET, and based on the on / off time of the first lower bridge arm MOSFET, the half-bridge cascaded circuit can adjust the voltage of the switching node. This allows for sampling without setting a sampling resistor when acquiring current sampling signals, reducing the energy consumption of the sampling resistor and effectively improving the efficiency of the half-bridge cascaded circuit.

[0014] In the half-bridge cascaded circuit with current sampling function described in this invention, the integrated chip includes a second lower bridge arm field-effect transistor. The gate of the second lower bridge arm field-effect transistor is connected to the signal input pin and the ground pin respectively through a comparator. The drain of the second lower bridge arm field-effect transistor is connected to the power supply pin and the signal output pin. The source of the second lower bridge arm field-effect transistor is connected to the ground pin.

[0015] The integrated chip also includes a chip field-effect transistor (FET). The source of the chip FET is connected to the power supply pin, the drain of the chip FET is connected to the sampling current pin, and the gate of the chip FET is connected to the source of the chip FET and the signal output pin through a comparator. The chip FET and the second lower bridge arm FET form a mirror current source structure.

[0016] In the half-bridge cascaded circuit with current sampling function described in this invention, the resistance between the source of the second lower bridge arm field-effect transistor and the power supply pin is set as the first resistance, the resistance between the source of the chip field-effect transistor and the power supply pin is set as the second resistance, the drain current of the second lower bridge arm field-effect transistor is set as the operating current, the current value of the current sampling signal is proportional to the current value of the operating current, the current value of the current sampling signal is proportional to the resistance value of the first resistor, and the current value of the current sampling signal is inversely proportional to the resistance value of the second resistor.

[0017] In the half-bridge cascaded circuit with current sampling function described in this invention, the half-bridge cascaded circuit includes a first circuit module and a second circuit module. The digital-to-analog converter chip, the first lower bridge arm MOSFET, and the integrated chip are disposed on the first circuit module, and the reference signal of the first circuit module is a ground signal. The voltage conversion chip, the first upper bridge arm MOSFET, and the second upper bridge arm MOSFET are disposed on the second circuit module, and the reference signal of the second circuit module is the signal at the switching node.

[0018] In the half-bridge cascaded circuit with current sampling function described in this invention, the half-bridge cascaded circuit further includes a high-voltage bus port, a sampling current terminal, a first signal input terminal, a second signal input terminal, and a bootstrap circuit module. The drain of the second upper bridge arm MOSFET is connected to the high-voltage bus through the high-voltage bus port. The sampling current terminal is connected to the sampling current pin and is used to output the current sampling signal to an external device. The first signal input terminal is connected to the digital-to-analog converter input pin and is used to input a first PWM digital signal. The second signal input terminal is connected to the signal input pin and is used to input a second PWM digital signal. The bootstrap circuit module is connected to the gate of the first upper bridge arm MOSFET and is used to generate a high voltage for the gate of the first upper bridge arm MOSFET.

[0019] In the half-bridge cascaded circuit with current sampling function described in this invention, the half-bridge cascaded circuit further includes a power supply terminal. One end of the power supply terminal is an external power source, and the other end of the power supply terminal is connected to the digital-to-analog converter chip, the voltage conversion chip, and the integrated chip. The external power source is used to generate an external power supply voltage, and the power supply terminal is used to input the external power supply voltage to power the digital-to-analog converter chip, the voltage conversion chip, and the integrated chip.

[0020] In the half-bridge cascaded circuit with current sampling function described in this invention, the digital-to-analog converter chip includes a digital-to-analog converter power supply pin and a digital-to-analog converter ground pin. The half-bridge cascaded circuit also includes a ground terminal, which is grounded. The digital-to-analog converter power supply pin is connected to the power supply terminal, and the digital-to-analog converter ground pin is connected to the ground terminal. The voltage conversion chip includes a voltage conversion power supply pin and a voltage conversion ground pin. The voltage conversion power supply pin is connected to the bootstrap circuit module, and the voltage conversion ground pin is connected to the switching node.

[0021] In the half-bridge cascaded circuit with current sampling function described in this invention, the first upper bridge arm MOSFET is a low-voltage enhancement-mode MOSFET, and the first lower bridge arm MOSFET is a high-voltage depletion-mode MOSFET.

[0022] In the half-bridge cascaded circuit with current sampling function described in this invention, the second upper bridge arm MOSFET is a high-voltage depletion-type MOSFET, and the second lower bridge arm MOSFET is a low-voltage enhancement-type MOSFET.

[0023] The present invention also provides a circuit board comprising any of the above-described half-bridge cascaded circuits with current sampling function.

[0024] Compared to existing technologies, the advantages of this invention are as follows: This invention provides a half-bridge cascaded circuit with current sampling function. The half-bridge cascaded circuit includes a digital-to-analog converter chip, a voltage converter chip, a first upper bridge arm MOSFET, a second upper bridge arm MOSFET, a first lower bridge arm MOSFET, and an integrated chip. This integrated chip is a current mirror chip; its MOSFET structure can realize the output of the drive signal and also realize the small current detection of the drive signal. While ensuring normal output, it simplifies the current detection structure and reduces current detection losses. This effectively solves the technical problem of low efficiency in existing half-bridge circuits; therefore, this half-bridge cascaded circuit has high efficiency. Attached Figure Description

[0025] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the embodiments are briefly introduced below. The drawings described below are only the corresponding drawings of some embodiments of the present invention.

[0026] Figure 1 This is a schematic diagram of the device structure of an embodiment of the half-bridge cascaded circuit with current sampling function of the present invention.

[0027] Figure 2 This is a circuit diagram of an embodiment of the half-bridge cascaded circuit with current sampling function of the present invention.

[0028] Figure 3This is a schematic diagram of the circuit structure of the second lower bridge arm field-effect transistor and the chip field-effect transistor in an embodiment of the half-bridge cascaded circuit with current sampling function of the present invention.

[0029] In the diagram, 10 is the half-bridge cascade circuit; 11 is the first circuit module; 111 is the digital-to-analog converter chip; 1111 is the digital-to-analog converter input pin; 1112 is the digital-to-analog converter output pin; 1113 is the digital-to-analog converter power supply pin; 1114 is the digital-to-analog converter ground pin; 112 is the first lower bridge arm MOSFET; 1121 is the source of the first lower bridge arm MOSFET; 1122 is the drain of the first lower bridge arm MOSFET; 1123 is the gate of the first lower bridge arm MOSFET; 113 is the integrated chip; 1131 is the signal input pin; 1132 is the signal output pin; 1133 is the sampling current pin; 1134 is the power supply pin; 1135 is the ground pin; 1136 is the second lower bridge arm MOSFET; 1137 is the chip MOSFET; 114 is the ground terminal; 12 is the second circuit module; 1 21. Voltage conversion chip; 1211. Voltage conversion input pin; 1212. Voltage conversion output pin; 1213. Voltage conversion power supply pin; 1214. Voltage conversion ground pin; 122. First upper arm MOSFET; 1221. Source of the first upper arm MOSFET; 1222. Drain of the first upper arm MOSFET; 1223. Gate of the first upper arm MOSFET; 123. Second upper arm MOSFET; 1231. Source of the second upper arm MOSFET; 1232. Drain of the second upper arm MOSFET; 1233. Gate of the second upper arm MOSFET; 124. Switching node; 13. High voltage bus port; 14. Power supply terminal; 15. Sampling current terminal; 16. First signal input terminal; 17. Second signal input terminal; 18. Bootstrap circuit module. Detailed Implementation

[0030] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0031] The directional terms mentioned in this invention, such as "up", "down", "front", "back", "left", "right", "inner", "outer", "side", "top" and "bottom", are only for reference to the orientation of the accompanying drawings. The directional terms used are for the purpose of explaining and understanding this invention, and are not intended to limit this invention.

[0032] The terms "first" and "second" used in the terminology of this invention are for descriptive purposes only and should not be construed as indicating or implying relative importance, nor as limiting the order of events.

[0033] In the diagram, units with similar structures are represented by the same labels.

[0034] Please refer to Figure 1 and Figure 2 This invention provides a half-bridge cascaded circuit 10 with current sampling function. The half-bridge cascaded circuit 10 with current sampling function is disposed in a circuit board and includes a digital-to-analog converter chip 111, a voltage converter chip 121, a first upper bridge arm MOSFET 122, a second upper bridge arm MOSFET 123, a first lower bridge arm MOSFET 112, and an integrated circuit chip 113. The half-bridge cascaded circuit 10 also includes a high-voltage bus port 13, a power supply terminal 14, a sampling current terminal 15, a first signal input terminal 16, and a second signal input terminal 17. The high-voltage bus port 13 is connected to an external high-voltage bus, which can provide a high voltage to the half-bridge cascaded circuit 10 through the high-voltage bus port 13. One end of the power supply terminal 14 is connected to an external power source (not shown in the figure), and the other end of the power supply terminal 14 is connected to the digital-to-analog converter chip 111 and the integrated circuit chip 113. An external power supply is used to generate an external power supply voltage. Power supply terminal 14 is used to input the external power supply voltage to power the digital-to-analog converter chip 111 and the integrated chip 113. Sampling current terminal 15 is used to output a current sampling signal to an external device. First signal input terminal 16 is used to input a first PWM digital signal, and second signal input terminal 17 is used to input a second PWM digital signal. The half-bridge cascaded circuit 10 also includes a bootstrap circuit module 18, which is configured based on power supply terminal 14. This bootstrap circuit module 18 generates a high voltage for the gate 1223 of the first upper bridge arm MOSFET, thereby better driving the first upper bridge arm MOSFET 122.

[0035] Please refer to Figure 1 and Figure 2 The digital-to-analog converter (DAC) chip 111 includes a DAC input pin 1111, a DAC output pin 1112, a DAC power supply pin 1113, and a DAC ground pin 1114. The DAC input pin 1111 is connected to the first signal input terminal 16 and is used to receive a first PWM digital signal. The DAC chip 111 performs DAC operations on the first PWM digital signal and can generate a first analog signal. The DAC output pin 1112 is used to output the first analog signal. The DAC power supply pin 1113 is connected to the power supply terminal 14, and the DAC ground pin 1114 is connected to the ground terminal 114.

[0036] Please refer to Figure 1 and Figure 2The voltage conversion chip 121 includes a voltage conversion input pin 1211, a voltage conversion output pin 1212, a voltage conversion power supply pin 1213, and a voltage conversion ground pin 1214. The voltage conversion input pin 1211 is connected to the digital-to-analog conversion output pin 1212. The voltage conversion power supply pin 1213 is connected to the bootstrap circuit module 18, and the voltage conversion ground pin 1214 is connected to the switching node 124. Using the voltage of the switching node as a reference, the voltage conversion chip 121 can perform voltage conversion on the first analog signal.

[0037] Please refer to Figure 1 and Figure 2 The first upper-arm MOSFET 122 is a low-voltage enhancement-mode MOSFET, and its gate 1223 is connected to the voltage conversion output pin 1212. The source 1221 of the first upper-arm MOSFET is connected to the switching node 124, and its drain 1222 is connected to the source 1231 of the second upper-arm MOSFET.

[0038] The second upper arm field-effect transistor 123 is a high-voltage depletion-type field-effect transistor. The drain 1232 of the second upper arm field-effect transistor is connected to the high-voltage bus port 13, and the gate 1233 of the second upper arm field-effect transistor is connected to the source 1221 of the first upper arm field-effect transistor.

[0039] The first lower bridge arm MOSFET 112 is a high-voltage depletion-type MOSFET, and its drain 1122 is connected to the switching node 124. The source 1121 of the first lower bridge arm MOSFET is connected to the integrated circuit chip 113. The gate 1123 of the first lower bridge arm MOSFET is connected to ground 114, thus grounding the gate 1123 of the first lower bridge arm MOSFET.

[0040] Please refer to Figure 1 and Figure 2The integrated chip 113 includes a signal input pin 1131, a signal output pin 1132, a sampling current pin 1133, a power supply pin 1134, and a ground pin 1135. The signal input pin 1131 is connected to the second signal input terminal 17 and is used to receive a second PWM digital signal. The integrated chip 113 performs a digital-to-analog conversion on the second PWM digital signal and can generate a second analog signal. The signal output pin 1132 is used to output the second analog signal and is connected to the source 1121 of the first lower bridge arm MOSFET. The power supply pin 1134 is connected to a power supply, which is the same as the external power supply. The integrated chip 113 generates a current sampling signal based on the power supply voltage and the second analog signal. The sampling current pin 1133 is connected to the sampling current terminal 15 and is used to output the current sampling signal. The grounding pin 1135 is connected to the grounding terminal 114 of the half-bridge cascade circuit, thus grounding the grounding pin 1135. Furthermore, the sampling current terminal 15 is connected to the sampling current pin 1133. The current sampling signal is typically used in the protection and control equipment of switching power supplies. Its function is to measure the magnitude of the output current of the switching power supply for monitoring, protection, and control.

[0041] Please refer to Figure 1 and Figure 2 The second analog signal is used to control the first lower bridge arm MOSFET 112 to turn on or off, and the first analog signal is used to control the first upper bridge arm MOSFET 122 and the second upper bridge arm MOSFET 123 to turn on or off. Based on the on / off time of the first upper bridge arm MOSFET 122 and the second upper bridge arm MOSFET 123, and based on the on / off time of the first lower bridge arm MOSFET 112, the half-bridge cascade circuit 10 can adjust the voltage of the switching node 124. This half-bridge cascade circuit 10 can adjust the voltage of the high-voltage bus port 13 according to the user's needs by adjusting the on / off time of the first upper bridge arm MOSFET 122, the second upper bridge arm MOSFET 123, and the first lower bridge arm MOSFET 112. Therefore, the user can obtain a suitable voltage at the switching node 124.

[0042] Please refer to Figure 2 and Figure 3 The following is a detailed description of the internal structure of an integrated chip.

[0043] The integrated chip 113 includes a second lower-arm field-effect transistor (FET) 1136. The gate of the second lower-arm FET 1136 is connected to the signal input pin 1131 and the ground pin 1135 via comparators. The drain of the second lower-arm FET 1136 is connected to the power supply pin 1134 and the signal output pin 1132, and the source of the second lower-arm FET 1136 is connected to the ground pin 1135. The integrated chip 113 also includes a chip FET 1137. The source of the chip FET 1137 is connected to the power supply pin 1134, the drain of the chip FET 1137 is connected to the sampling current pin 1133, and the gate of the chip FET 1137 is connected to the source of the chip FET 1137 and the signal output pin 1132 via comparators. The gate of the second lower bridge arm MOSFET 1136 can receive a second PWM digital signal through signal input pin 1131, and the drain of the second lower bridge arm MOSFET 1136 can receive a second analog signal through signal output pin 1132. The drain of the second lower bridge arm MOSFET 1136 can receive the voltage of an external power supply through power supply pin 1134. The drain of the chip MOSFET 1137 outputs a current sampling signal through sampling current pin 1133, setting the current of the drain of the second lower bridge arm MOSFET 1136 as the operating current. The second lower bridge arm MOSFET 1136 generates this operating current based on the voltage of the external power supply and the second analog signal. Furthermore, the current value of this operating current is proportional to the current value of the current sampling signal, and the current value of the current sampling signal is much smaller than the current value of the operating current. Therefore, sampling this current sampling signal helps reduce the energy consumption of the current sampling signal and effectively improves the operating efficiency of the half-bridge cascade circuit 10.

[0044] Furthermore, the chip MOSFET 1137 and the second lower bridge arm MOSFET 1136 can form a mirror current source structure, both of which are integrated within the integrated chip 113. A mirror current source is a special type of current source that generates a mirror current balanced with the connected load, achieving specific current distribution and balance. A mirror current source typically consists of two transistors; in the circuit structure of this invention, these two transistors are the second lower bridge arm MOSFET and the chip MOSFET. The second lower bridge arm MOSFET 1136 is the main transistor, and the chip MOSFET 1137 is the mirror transistor. When the current in the main transistor changes, the mirror transistor provides feedback with the same current change, thereby controlling and adjusting its output current. Therefore, the user can adjust the magnitude of the current sampling signal through this mirror current source structure, thereby reducing the energy consumption of the current sampling signal in the half-bridge cascade circuit 10 and improving the operating efficiency of the half-bridge cascade circuit 10.

[0045] Please refer to Figure 3The resistance between the drain of the second lower bridge arm MOSFET 1136 and the power supply pin 1134 is set as the first resistor R1, and the resistance between the source of the chip MOSFET 1137 and the power supply pin 1134 is set as the second resistor R2. The current value of the current sampling signal is directly proportional to the operating current, directly proportional to the resistance of the first resistor R1, and inversely proportional to the resistance of the second resistor R2. The operating current is I1, and the sampling signal is I2. Therefore, I2 = R1 / R2 * I1. Here, the second resistor R2 is a user-configurable resistor, and the first resistor R1 is the equivalent resistance inside the chip. Furthermore, the resistance of the first resistor R1 is much smaller than the resistance of the second resistor R2, thus the half-bridge cascade circuit 10 will collect a current sampling signal with a smaller current value. This effectively reduces the current sampling power consumption of the half-bridge cascade circuit 10 and effectively improves its operating efficiency.

[0046] Please refer to Figure 2 and Figure 3 In traditional circuit structures, a mirror current source requires one main transistor and one mirror transistor, while a cascaded gallium nitride (GaN) structure requires one high-voltage depletion-mode MOSFET and one low-voltage enhancement-mode MOSFET, totaling four transistors. However, in the half-bridge cascaded circuit of this invention, the second lower bridge arm MOSFET 1136 serves two purposes: it acts as the main transistor for the mirror current source; and it and the first lower bridge arm MOSFET 112 form a cascaded GaN structure that can be used to adjust the voltage at the switching node 124. Therefore, compared to traditional circuit structures, the circuit of this invention requires only three transistors. This invention reduces the use of one MOSFET, simplifying the circuit structure and effectively saving the cost of the half-bridge cascaded circuit 10. Furthermore, the half-bridge cascade circuit integrates the second lower bridge arm MOSFET 1136 and the chip MOSFET 1137 inside the integrated chip, which makes the half-bridge cascade circuit 10 have the characteristics of high integration and small size.

[0047] Please refer to Figure 1 and Figure 2The half-bridge cascaded circuit 10 includes a first circuit module 11 and a second circuit module 12. A digital-to-analog converter chip 111, a first lower bridge arm MOSFET 112, and an integrated chip 113 are disposed on the first circuit module 11. The reference signal for the first circuit module 11 is ground. A voltage converter chip 121, a first upper bridge arm MOSFET 122, and a second upper bridge arm MOSFET 123 are disposed on the second circuit module 12. The reference signal for the second circuit module 12 is the signal at the switching node. The first upper bridge arm MOSFET 122 and the second upper bridge arm MOSFET 123 are disposed between the high-voltage bus port 13 and the switching node 124, and the first lower bridge arm MOSFET 112 and the second lower bridge arm MOSFET 1136 are disposed between the switching node 124 and the ground terminal 114. Therefore, the first upper bridge arm MOSFET 122 and the second upper bridge arm MOSFET 123 are disposed on a circuit module that uses the signal at the switching node 124 as a reference signal, while the first lower bridge arm MOSFET and the second lower bridge arm MOSFET are disposed on a circuit module that uses the ground signal as a reference signal. This half-bridge cascade circuit 10 can be better integrated on the circuit board, thus giving the circuit board the advantages of smaller size and higher integration.

[0048] Furthermore, this half-bridge cascade circuit 10 reduces the need for wiring to connect the first lower bridge arm MOSFET 112, the second lower bridge arm MOSFET 1136, and the ground terminal 114. This half-bridge cascade circuit also reduces the need for wiring to connect the first upper bridge arm MOSFET 122, the second upper bridge arm MOSFET 123, and the switching node 124, effectively saving costs associated with this half-bridge cascade circuit.

[0049] The working principle of the half-bridge cascaded circuit of the present invention is as follows: When the half-bridge cascaded circuit 10 is working, the digital-to-analog converter chip 111 receives a first PWM digital signal through the digital-to-analog converter input pin 1111. The digital-to-analog converter chip 111 can perform digital-to-analog conversion on the first PWM digital signal, thereby generating a first analog signal. The digital-to-analog converter chip 111 can output the first analog signal through the digital-to-analog converter output pin 1112. The voltage conversion chip 121 receives the first analog signal through the voltage conversion input pin 1211. The voltage conversion chip 121 can use the voltage of the switching node 124 as a reference to perform voltage conversion on the first analog signal. The voltage conversion chip 121 outputs the voltage-converted first analog signal through the voltage conversion output pin 1212. At the same time, the integrated chip 113 receives a second PWM digital signal through the signal input pin 1131. Furthermore, the integrated chip can perform digital-to-analog conversion on the second PWM digital signal, and the integrated chip 113 can generate a second analog signal. The integrated chip can output the second analog signal through the signal output pin 1132. The second analog signal controls the on / off state of the first lower bridge arm MOSFET 112, and the first analog signal controls the on / off state of the first upper bridge arm MOSFET 122 and the second upper bridge arm MOSFET 123. Based on the on / off times of the first upper bridge arm MOSFET 122 and the second upper bridge arm MOSFET 123, and based on the on / off time of the first lower bridge arm MOSFET 112, the half-bridge cascade circuit 10 can adjust the voltage of the switching node 124. Furthermore, the integrated chip 113 internally houses a chip MOSFET 1137 and a second lower bridge arm MOSFET 1136. These chip MOSFETs 1137 and the second lower bridge arm MOSFET 1136 form a mirrored current source structure. The integrated chip 113 is connected to a power supply via a power pin 1134. Based on the power supply voltage and the second analog signal, the integrated chip 113 can generate a current sampling signal through this mirrored current source structure. Based on the current sampling signal, the user can measure the magnitude of the switching power supply output current, thereby enabling the user to monitor, protect, and control the switching power supply.

[0050] The present invention also provides a circuit board having a half-bridge cascade circuit 10 internally disposed therein. The device structure of this circuit board is similar to that of the half-bridge cascade circuit 10; please refer to the description of the device structure of the half-bridge cascade circuit 10 for details. The operating principle of this circuit board is similar to that of the half-bridge cascade circuit 10; please refer to the description of the operating principle of the half-bridge cascade circuit 10 for details.

[0051] This invention provides a half-bridge cascaded circuit with current sampling function. The half-bridge cascaded circuit includes a digital-to-analog converter chip, a voltage converter chip, a first upper bridge arm MOSFET, a second upper bridge arm MOSFET, a first lower bridge arm MOSFET, and an integrated chip. The integrated chip is a current mirror chip; its MOSFET structure can both output the drive signal and detect a small current in the drive signal. While ensuring normal output, it simplifies the current detection structure and reduces current detection losses. This effectively solves the technical problem of low efficiency in existing half-bridge circuits; therefore, this half-bridge cascaded circuit has high efficiency.

[0052] In summary, although the present invention has been disclosed above with reference to preferred embodiments, the above preferred embodiments are not intended to limit the present invention. Those skilled in the art can make various modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the claims.

Claims

1. A half bridge cascaded circuit with a current sampling function, characterized in that, It includes, The digital-to-analog conversion chip includes a digital-to-analog conversion input pin and a digital-to-analog conversion output pin, the digital-to-analog conversion input pin is used to receive a first PWM digital signal, the digital-to-analog conversion chip is used to perform a digital-to-analog conversion operation on the first PWM digital signal to generate a first analog signal, and the digital-to-analog conversion output pin is used to output the first analog signal; The voltage conversion chip includes a voltage conversion input pin and a voltage conversion output pin, the voltage conversion input pin is connected to the digital-to-analog conversion output pin, and the voltage conversion chip is used to perform a voltage conversion operation on the first analog signal with the voltage of the switching node as a reference; The gate of the first upper bridge arm field effect tube is connected to the voltage conversion output pin, the source of the first upper bridge arm field effect tube is connected to the switching node, and the drain of the first upper bridge arm field effect tube is connected to the source of the second upper bridge arm field effect tube; The drain of the second upper bridge arm field effect tube is connected to the high-voltage bus, and the gate of the second upper bridge arm field effect tube is connected to the source of the first upper bridge arm field effect tube; The drain of the first lower bridge arm field effect tube is connected to the switching node, the source of the first lower bridge arm field effect tube is connected to the integrated chip, and the gate of the first lower bridge arm field effect tube is grounded; The integrated chip includes a signal input pin, a signal output pin, a sampling current pin, a power supply pin, and a ground pin, the signal input pin is used to receive a second PWM digital signal, the integrated chip is used to perform a digital-to-analog conversion operation on the second PWM digital signal to generate a second analog signal, the signal output pin is used to output the second analog signal, the signal output pin is connected to the source of the first lower bridge arm field effect tube, the power supply pin is connected to a power supply, and the integrated chip is used to generate a current sampling signal based on a power supply voltage generated by the power supply and the second analog signal, the sampling current pin is used to output the current sampling signal, and the ground pin is grounded; The second analog signal is used to control the first lower bridge arm field effect tube to be turned on or turned off, and the first analog signal is used to control the first upper bridge arm field effect tube and the second upper bridge arm field effect tube to be turned on or turned off; Based on the time when the first upper bridge arm field effect tube and the second upper bridge arm field effect tube are turned on or turned off, and based on the time when the first lower bridge arm field effect tube is turned on or turned off, the half-bridge cascade circuit can adjust the voltage of the switching node.

2. The half bridge cascaded circuit with current sampling function according to claim 1, characterized in that, The integrated chip includes a second lower bridge arm field effect tube, the gate of the second lower bridge arm field effect tube is connected to the signal input pin and the ground pin through a comparator, the drain of the second lower bridge arm field effect tube is connected to the power supply pin and the signal output pin, and the source of the second lower bridge arm field effect tube is connected to the ground pin; The integrated chip further comprises a chip field effect transistor, a source of the chip field effect transistor is connected with a power supply pin, a drain of the chip field effect transistor is connected with the sampling current pin, a gate of the chip field effect transistor is connected with the source of the chip field effect transistor and the signal output pin respectively through a comparator, and the chip field effect transistor and the second lower bridge arm field effect transistor form a mirror current source structure.

3. The half bridge cascaded circuit with current sampling function according to claim 2, characterized in that, The resistance between the source of the second lower bridge arm field effect transistor and the power supply pin is set as a first resistance, the resistance between the source of the chip field effect transistor and the power supply pin is set as a second resistance, and the current of the drain of the second lower bridge arm field effect transistor is set as a working current, the current value of the current sampling signal is proportional to the current value of the working current, the current value of the current sampling signal is proportional to the resistance value of the first resistance, and the current value of the current sampling signal is inversely proportional to the resistance value of the second resistance.

4. The half bridge cascaded circuit with current sampling function according to claim 1, characterized in that, The half-bridge cascade circuit comprises a first circuit module and a second circuit module, the digital-to-analog conversion chip, the first lower bridge arm field effect transistor and the integrated chip are arranged on the first circuit module, and a reference signal of the first circuit module is a ground signal; the voltage conversion chip, the first upper bridge arm field effect transistor and the second upper bridge arm field effect transistor are arranged on the second circuit module, and a reference signal of the second circuit module is a signal at a switching junction.

5. The half bridge cascaded circuit with current sampling function according to claim 1, characterized in that, The half-bridge cascade circuit further comprises a high-voltage bus port, a sampling current end, a first signal input end, a second signal input end and a bootstrap circuit module, the drain of the second upper bridge arm field effect transistor is connected with a high-voltage bus through the high-voltage bus port, the sampling current end is connected with the sampling current pin, the sampling current end is used for outputting the current sampling signal to an external device, the first signal input end is connected with the digital-to-analog conversion input pin, the first signal input end is used for inputting a first PWM digital signal, the second signal input end is connected with the signal input pin, the second signal input end is used for inputting a second PWM digital signal, and the bootstrap circuit module is connected with the gate of the first upper bridge arm field effect transistor and used for generating a high voltage for the gate of the first upper bridge arm field effect transistor.

6. The half bridge cascaded circuit with current sampling function according to claim 5, characterized in that, The half-bridge cascade circuit further comprises a power supply terminal, one end of the power supply terminal is connected with an external power supply, the other end of the power supply terminal is connected with the digital-to-analog conversion chip, the voltage conversion chip and the integrated chip, the external power supply is used for generating an external power supply voltage, and the power supply terminal is used for inputting the external power supply voltage to perform a power supply operation on the digital-to-analog conversion chip, the voltage conversion chip and the integrated chip.

7. The half bridge cascaded circuit with current sampling function according to claim 6, characterized in that, The digital-to-analog conversion chip comprises a digital-to-analog conversion power supply pin and a digital-to-analog conversion ground pin, the half-bridge cascade circuit further comprises a ground terminal, the ground terminal is connected with a ground, the digital-to-analog conversion power supply pin is connected with the power supply terminal, and the digital-to-analog conversion ground pin is connected with the ground terminal; the voltage conversion chip comprises a voltage conversion power supply pin and a voltage conversion ground pin, the voltage conversion power supply pin is connected with the bootstrap circuit module, and the voltage conversion ground pin is connected with the switching junction.

8. The half bridge cascaded circuit with current sampling function according to claim 1, characterized in that, The first upper bridge arm field effect tube is a low-voltage enhancement type field effect tube, and the first lower bridge arm field effect tube is a high-voltage depletion type field effect tube.

9. The half bridge cascaded circuit with current sampling function according to claim 2, characterized in that The second upper bridge arm field effect tube is a high-voltage depletion type field effect tube, and the second lower bridge arm field effect tube is a low-voltage enhancement type field effect tube.

10. A circuit board, characterized by It comprises the half bridge cascade circuit with the current sampling function as claimed in any one of claims 1-9.

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