SiC epitaxial wafer

Abstract

The invention relates to a SiC epitaxial wafer. The purpose of the present invention is to provide a SiC epitaxial wafer in which the film thickness variation of a SiC epitaxial layer in the vicinity of a positioning groove is small. The SiC epitaxial wafer has a positioning groove. The positioning groove is provided with a first side and a second side which connect the innermost side point of the positioning groove with the periphery of the wafer. The first side is located in the [-1-120] direction with respect to the innermost point, and the second side is located in the [11-20] direction with respect to the innermost point. The position 0.5 mm from the midpoint of the first side in the [-1100] direction is set as a first measurement point, and the position 0.5 mm from the midpoint of the second side in the [-1100] direction is set as a second measurement point. The film thickness deviation between the first measurement point and the second measurement point of the SiC epitaxial layer of the SiC epitaxial wafer is less than 10%.

Description

Technical Field

[0001] This invention relates to SiC epitaxial wafers. Background Technology

[0002] Compared to silicon (Si), silicon carbide (SiC) has an insulating breakdown electric field that is an order of magnitude larger and a band gap that is three times larger. Furthermore, its thermal conductivity is approximately three times higher than that of silicon (Si). Therefore, the application of silicon carbide (SiC) in power devices, high-frequency devices, and high-temperature operating devices is anticipated. SiC devices are obtained by chip-based fabrication of SiC epitaxial wafers after the SiC epitaxial layer has been formed.

[0003] SiC epitaxial wafers are obtained by stacking SiC epitaxial layers on the surface of a SiC substrate. Hereinafter, the substrate before the SiC epitaxial layer is stacked will be referred to as the SiC substrate, and the substrate after the SiC epitaxial layer is stacked will be referred to as the SiC epitaxial wafer. SiC substrates are fabricated by slicing from SiC ingots.

[0004] For example, Patent Documents 1-3 disclose methods for manufacturing SiC epitaxial wafers by epitaxially growing a SiC epitaxial layer on a SiC substrate. Furthermore, Patent Documents 1-3 disclose supplying gas to the back side of a SiC substrate to suppress deposits from adhering to the back side of the SiC substrate.

[0005] Existing technical documents

[0006] Patent documents

[0007] Patent Document 1: Japanese Patent Application Publication No. 2022-78450

[0008] Patent Document 2: Japanese Patent Application Publication No. 2022-66742

[0009] Patent Document 3: Japanese Patent Application Publication No. 2019-7045 Summary of the Invention

[0010] The technical problem that the invention aims to solve

[0011] To determine the orientation of the crystal axis, SiC substrates and SiC epitaxial wafers sometimes have positioning notches. These notches are formed at the cutouts in the SiC substrate and SiC epitaxial wafer. By reading the position of the positioning notches using lasers or similar methods during SiC device fabrication, the orientation of the SiC epitaxial wafer is adjusted so that the predetermined crystal axis of the SiC epitaxial wafer faces a predetermined direction.

[0012] Deviations in thickness and / or shape near the positioning groove may cause poor reading of the laser-based positioning groove position.

[0013] This disclosure was made in view of the above-mentioned problems, and its purpose is to provide a SiC epitaxial wafer with small film thickness deviation of the SiC epitaxial layer near the positioning groove.

[0014] Technical solutions for solving the problem

[0015] (1) The SiC epitaxial wafer of the first technical solution has a SiC substrate and a SiC epitaxial layer. Viewed from the stacking direction in a top view, the SiC epitaxial wafer of the first technical solution has a positioning groove that cuts a portion of the wafer from the outer periphery toward the inner side. The positioning groove has a first side and a second side connecting the innermost point of the positioning groove to the outer periphery of the wafer. The first side is located in the [-1-120] direction relative to the innermost point. The second side is located in the [11-20] direction relative to the innermost point. A first measurement point is defined as a position 0.5 mm from the first point, which is the midpoint of the first side, toward the [-1100] direction, and a second measurement point is defined as a position 0.5 mm from the second point, which is the midpoint of the second side, toward the [-1100] direction. The thickness deviation between the first film thickness of the SiC epitaxial layer at the first measurement point and the second film thickness of the SiC epitaxial layer at the second measurement point is less than 10%. The film thickness deviation is calculated by dividing the absolute value of the difference between the first film thickness and the second film thickness by twice the average film thickness of the first film thickness and the second film thickness.

[0016] (2) The SiC epitaxial wafer involved in the above technical solution can also be such that, when x≤5, (|L(x)-R(x)|) / (2×Ave(L(x), R(x)))×100<10%. L(x) is the film thickness of the SiC epitaxial layer at a position x mm from the first point in the [-1100] direction. R(x) is the film thickness of the SiC epitaxial layer at a position x mm from the second point in the [-1100] direction. Ave(L(x), R(x)) is the average value of L(x) and R(x).

[0017] (3) Alternatively, the diameter of the SiC epitaxial wafer involved in the above technical solution is 145mm or more.

[0018] (4) Alternatively, the diameter of the SiC epitaxial wafer involved in the above technical solution is 195mm or more.

[0019] (5) In the SiC epitaxial wafer involved in the above technical solution, the radial thickness deviation of the SiC epitaxial layer may also be less than 5%. The radial thickness deviation is obtained by dividing the difference between the maximum and minimum thickness of the SiC epitaxial layer measured along a straight line passing through the center of the SiC epitaxial layer and extending in the <11-20> direction by twice the average value.

[0020] (6) In the SiC epitaxial wafer involved in the above technical solution, the circumferential thickness deviation of the SiC epitaxial layer may also be less than 5%. The circumferential thickness deviation is obtained by dividing the difference between the maximum and minimum film thickness of the SiC epitaxial layer at a total of four points by twice the average value. The four points are: two points obtained by advancing half the radius in the <11-20> direction from the center of the SiC epitaxial layer, and two points obtained by advancing half the radius in the <-1-100> direction from the center of the SiC epitaxial layer.

[0021] Invention Effects

[0022] The above-mentioned technical solution involves a small thickness deviation of the SiC epitaxial layer near the positioning groove of the SiC epitaxial wafer. Attached Figure Description

[0023] Figure 1 This is a cross-sectional view of the SiC epitaxial wafer involved in this embodiment.

[0024] Figure 2 This is a top view of the SiC epitaxial wafer involved in this embodiment.

[0025] Figure 3 This is an enlarged view of the area near the positioning groove of the SiC epitaxial wafer involved in this embodiment.

[0026] Figure 4 This is a cross-sectional view of the SiC epitaxial wafer manufacturing apparatus according to this embodiment.

[0027] Figure 5 This is a cross-sectional view of a SiC substrate placed on a base.

[0028] Figure 6 This is a top view showing the positional relationship between the slit of the base and the positioning groove.

[0029] Figure 7 This is the simulation result of Comparative Example 1.

[0030] Figure 8 This indicates the amount of feed gas supplied along the baseline, the first measurement line, and the second measurement line, respectively, in the simulation results of Comparative Example 1.

[0031] Figure 9 This is a diagram showing the positional relationship of the slits in Example 1 and Comparative Examples 2-4.

[0032] Figure 10 This indicates the amount of raw material gas supplied along the first measurement line in the simulation results of Examples 1 and Comparative Examples 1 to 4.

[0033] Figure 11 This indicates the amount of raw material gas supplied along the second measurement line in the simulation results of Examples 1 and Comparative Examples 1 to 4.

[0034] Label Explanation

[0035] 1. SiC epitaxial wafer; 2. SiC substrate; 3. SiC epitaxial layer; 4. Positioning groove; 5. Innermost points of 5'; 6. First measurement point; 7. Second measurement point; 10. Chamber; 11. Main body; 12. Gas supply port; 13. Gas exhaust port; 20. Support; 30. Lower heater; 40. Upper heater; 50. Base; 51. Main body; 52. Frame; C1. First point; C2. Second point; L0. Reference line; L1. First measurement line; L2. Second measurement line; s1. First side; s2. Second side; SL1, SL2, SL3, SL4. Slits Detailed Implementation

[0036] Hereinafter, the SiC epitaxial wafer and the like according to this embodiment will be described in detail with appropriate reference to the accompanying drawings. In the drawings used in the following description, some characteristic parts are shown enlarged for convenience in making the features of this embodiment easier to understand, and the size ratios of the constituent elements may sometimes differ from the actual dimensions. The materials, dimensions, etc., illustrated in the following description are examples only, and the present invention is not limited to those materials, dimensions, etc., and can be appropriately modified within the scope of its spirit.

[0037] In this specification, [] is used to indicate individual orientations, and <> is used to indicate group orientations. Regarding negative exponents, in crystallography, a "-" (hyphen) is marked above the number, but in this specification, a negative sign is marked before the number.

[0038] Figure 1 This is a cross-sectional view of the SiC epitaxial wafer 1 according to this embodiment. The SiC epitaxial wafer 1 includes a SiC substrate 2 and a SiC epitaxial layer 3. The top view of the SiC epitaxial wafer 1 is approximately circular.

[0039] The diameter of the SiC epitaxial wafer 1 is, for example, 6 inches or more, preferably 8 inches or more, more preferably 10 inches or more, and even more preferably 12 inches or more.

[0040] The diameter of the SiC epitaxial wafer 1 is, for example, 145 mm or more, preferably 149 mm or more. The diameter of the SiC epitaxial wafer 1 is, for example, 155 mm or less, preferably 151 mm or less. The diameter of the SiC epitaxial wafer 1 is, for example, 195 mm or more, preferably 199 mm or more. The diameter of the SiC epitaxial wafer 1 is, for example, 205 mm or less, preferably 201 mm or less. The diameter of the SiC epitaxial wafer 1 is, for example, 245 mm or more, preferably 249 mm or more. The diameter of the SiC epitaxial wafer 1 is, for example, 255 mm or less, preferably 251 mm or less. The diameter of the SiC epitaxial wafer 1 is, for example, 295 mm or more, preferably 299 mm or more. The diameter of the SiC epitaxial wafer 1 is, for example, 305 mm or less, preferably 301 mm or less.

[0041] The SiC substrate 2 is formed, for example, from n-type SiC. The conductivity type of the SiC substrate 2 can also be p-type or semi-insulating. There is no particular limitation on the type of the SiC substrate 2; it can be any of 2H, 3C, 4H, or 6H. For example, the SiC substrate 2 is 4H-SiC. The diameter of the SiC substrate 2 is the same as the diameter of the SiC epitaxial wafer 1.

[0042] The SiC epitaxial layer 3 is stacked on one side of the SiC substrate 2. The SiC epitaxial layer 3 is formed of SiC.

[0043] Figure 2 This is a top view of the SiC epitaxial wafer 1 involved in this embodiment. Figure 2 The upper surface is configured as the Si surface. The upper surface of the SiC epitaxial wafer 1 can be either the (0001) surface or a surface tilted at an offset angle from the (0001) surface. The offset angle is, for example, 3.5° or more and 4.5° or less, preferably 4°. The offset angle is, for example, 0° or more and 10° or less, and can be greater than 0° and less than 10°, or 7.5° or more and 8.5° or less, or 8°.

[0044] Viewed from the stacking direction, the SiC epitaxial wafer 1 has a positioning groove 4 for guiding the direction of the crystal axis. Here, the stacking direction is the stacking direction of the SiC epitaxial layer 3. The positioning groove 4 is a groove obtained by cutting a portion of the wafer from the outer periphery of the SiC epitaxial wafer 1 toward the inward side. The positioning groove 4 is located, for example, in the [1-100] direction relative to the center of the SiC epitaxial wafer 1.

[0045] Figure 3This is an enlarged view of the vicinity of the positioning groove 4 of the SiC epitaxial wafer 1 according to this embodiment. The positioning groove 4 is, for example, a V-shaped groove. The positioning groove 4 exists throughout the SiC substrate 2 and the SiC epitaxial layer 3. The groove depth of the positioning groove 4 can be, for example, 2 mm or 1 mm. The groove depth of the positioning groove 4 is the shortest distance between the innermost point 5 of the positioning groove 4 and the imaginary circle along the outer periphery of the SiC epitaxial wafer 1, and is the distance of the perpendicular line drawn from the innermost point 5 toward the imaginary circle in the [1-100] direction.

[0046] The positioning groove 4 has a first side s1 and a second side s2. Each of the first and second sides s2 is a side connecting the innermost point 5 of the positioning groove 4 to the outer periphery of the SiC epitaxial wafer 1. The first and second sides s1 can be straight lines or curves. The first side s1 is located in the [-1-120] direction relative to the innermost point 5, and the second side s2 is located in the [11-20] direction relative to the innermost point 5. When the positioning groove 4 is positioned at the front and viewed from the upper surface of the SiC epitaxial wafer 1, the first side s1 is located to the left of the innermost point 5, and the second side s2 is located to the right of the innermost point 5. Hereinafter, the [-1-120] direction side will be referred to as the left side and the [11-20] direction side as the right side, relative to the reference line L0 extending in the <1-100> direction passing through the innermost point 5.

[0047] In the SiC epitaxial wafer 1 according to this embodiment, the thickness deviation between the first film thickness of the SiC epitaxial layer 3 at the first measurement point 6 and the second film thickness of the SiC epitaxial layer 3 at the second measurement point 7 is less than 10%. The thickness deviation of the SiC epitaxial layer 3 is preferably 5% or less, preferably 2% or less, preferably 1.5% or less, more preferably 1% or less, and even more preferably 0.5% or less. Here, the thickness deviation of the SiC epitaxial layer 3 is obtained by dividing the absolute value of the difference between the first film thickness and the second film thickness by twice the average film thickness of the first film thickness and the second film thickness.

[0048] The first measurement point 6 is located at a position 0.5 mm displaced along the first measurement line L1 in the [-1100] direction from the first point C1, which is the midpoint of the first side s1. The first measurement line L1 is an imaginary line passing through the first point C1 and extending in the <1-100> direction. The second measurement point 7 is located at a position 0.5 mm displaced along the second measurement line L2 in the [-1100] direction from the second point C2, which is the midpoint of the second side s2. The second measurement line L2 is an imaginary line passing through the second point C2 and extending in the <1-100> direction.

[0049] For the SiC epitaxial wafer 1 involved in this embodiment, the thickness deviation of the SiC epitaxial layer 3 at the first measurement point 6 and the second measurement point 7 is small, and the left-right symmetry is high relative to the reference line L0 that passes through the innermost point 5 and extends in the <1-100> direction.

[0050] For the SiC epitaxial wafer 1 according to this embodiment, it is preferable that |(L(x)-R(x))| / (2×Ave(L(x), R(x)))<10% when 0≤x≤3, and more preferably that |(L(x)-R(x))| / (2×Ave(L(x), R(x)))<10% when x≤5. When 0≤x≤3, |(L(x)-R(x))| / (2×Ave(L(x), R(x))) is preferably 5% or less, preferably 2% or less, preferably 1.5% or less, more preferably 1% or less, and even more preferably 0.5% or less. In addition, when x≤5, |(L(x)-R(x))| / (2×Ave(L(x), R(x))) is preferably 5% or less, preferably 2% or less, preferably 1.5% or less, more preferably 1% or less, and even more preferably 0.5% or less.

[0051] L(x) is the thickness of the SiC epitaxial layer 3 at the measurement point x mm from point C1 in the [-1100] direction. L(0.5) corresponds to the thickness of the SiC epitaxial layer 3 at the first measurement point 6. R(x) is the thickness of the SiC epitaxial layer 3 at the measurement point x mm from point C2 in the [-1100] direction. R(0.5) corresponds to the thickness of the SiC epitaxial layer 3 at the second measurement point 7. Ave(L(x), R(x)) is the average value of L(x) and R(x).

[0052] Here, micro-FTIR is used to determine the thickness of the SiC epitaxial layer 3 near the positioning groove 4. Micro-FTIR can be performed using, for example, a Vertex HYPERION manufactured by Bruker. The FTIR spot size is set to 300 μm × 300 μm. Light scattering is easily observed near the positioning groove 4; therefore, FTIR (Fourier Transform Infrared Spectrometer) can also be used for measurement, but micro-FTIR allows for a more accurate determination of the SiC epitaxial layer 3 thickness.

[0053] The average thickness of the SiC epitaxial layer 3 is, for example, 3 μm or more, preferably 5 μm or more, more preferably 10 μm or more, and even more preferably 15 μm or more. The average thickness of the SiC epitaxial layer 3 may also be, for example, 200 μm or less. This average thickness of the SiC epitaxial layer 3 is the average value of the thickness of the SiC epitaxial layer 3 measured at different points in the radial direction of the SiC epitaxial layer 3. The average thickness in the radial direction is measured, for example, along a straight line extending in the <11-20> direction. The location of the measurement points will be described later.

[0054] The radial thickness deviation of the SiC epitaxial layer 3 is, for example, 5% or less, preferably 4% or less, more preferably 3% or less, even more preferably 2% or less, and particularly preferably 1% or less.

[0055] The radial thickness deviation is calculated by dividing the difference between the maximum and minimum thicknesses of the SiC epitaxial layer 3, measured along a straight line passing through the center of the SiC epitaxial layer 3 and extending in the <11-20> direction, by twice the average value. The thickness of the SiC epitaxial layer 3 is determined by optical interference analysis using FTIR (Fourier Transform Infrared Spectroscopy).

[0056] The thickness of the SiC epitaxial layer 3 can be measured at intervals of 10 mm, 15 mm, 20 mm, 25 mm, or even 30 mm. While measuring the average thickness of the SiC epitaxial layer 3 and determining the radial thickness deviation, the thickness of the SiC epitaxial layer 3 is also measured at the same measurement location.

[0057] For example, with a SiC epitaxial wafer 1 having a diameter of 150 mm (6 inches), the film thickness of the SiC epitaxial layer 3 is measured along a straight line extending in the <11-20> direction with the center as the reference, at the center and at various locations at a distance of ±15 mm, ±30 mm, ±45 mm, ±60 mm, and ±70 mm from the center. Furthermore, the [11-20] direction or the [-1100] direction is denoted as "+". Using the film thickness at these measurement points, the radial thickness deviation of the SiC epitaxial layer 3 and the average film thickness of the SiC epitaxial layer 3 are calculated.

[0058] For example, with a SiC epitaxial wafer 1 having a diameter of 200 mm (8 inches), the film thickness of the SiC epitaxial layer 3 is measured along a straight line extending in the <11-20> direction with the center as the reference, at the center and at various locations at a distance of ±20 mm, ±40 mm, ±60 mm, ±80 mm, and ±95 mm from the center. Using the film thickness at these measurement points, the radial thickness deviation of the SiC epitaxial layer 3 and the average film thickness of the SiC epitaxial layer 3 are determined.

[0059] Furthermore, for example, when the diameter of the SiC epitaxial wafer 1 is 250 mm (10 inches), the film thickness of the SiC epitaxial layer 3 is measured along a straight line in the <11-20> direction with the center as the reference, at the center and at various locations at a distance of ±25 mm, ±50 mm, ±75 mm, ±100 mm, and ±120 mm from the center. Using the film thickness at these measurement points, the radial thickness deviation of the SiC epitaxial layer 3 and the average film thickness of the SiC epitaxial layer 3 are determined.

[0060] Furthermore, for example, when the diameter of the SiC epitaxial wafer 1 is 300 mm (12 inches), the carrier concentration is measured at the center and at various locations at a distance of ±30 mm, ±60 mm, ±90 mm, ±120 mm, and ±145 mm from the center along a straight line extending in the <11-20> direction with the center as the reference. Using the film thickness at these measurement points, the radial thickness deviation of the SiC epitaxial layer 3 and the average film thickness of the SiC epitaxial layer 3 are determined.

[0061] The circumferential thickness deviation of the SiC epitaxial layer 3 is, for example, 5% or less, preferably 4% or less, more preferably 3% or less, even more preferably 2% or less, and particularly preferably 1% or less.

[0062] The circumferential thickness deviation is calculated by dividing the difference between the maximum and minimum thicknesses of the SiC epitaxial layer 3 measured at four points symmetrically positioned with the center of the SiC epitaxial layer 3 as a reference, viewed from the stacking direction, by twice the average value. The four measurement points are, for example, two points obtained by advancing half the radius in the <11-20> direction from the center of the SiC epitaxial layer 3, and two points obtained by advancing half the radius in the <-1-100> direction from the center of the SiC epitaxial layer 3. The thickness of the SiC epitaxial layer 3 is determined by optical interference analysis using FTIR (Fourier Transform Infrared Spectroscopy).

[0063] Furthermore, the radial deviation of the carrier concentration in the SiC epitaxial layer 3 is preferably 20% or less, more preferably 15% or less, even more preferably 12% or less, even more preferably 10% or less, particularly preferably 5% or less, and even more particularly preferably 2% or less. The measurement point for measuring the radial deviation of the carrier concentration is the same as the measurement point for measuring the radial deviation of the SiC epitaxial layer 3. The radial deviation of the carrier concentration is calculated by dividing the difference between the maximum and minimum values ​​of the carrier concentration in the SiC epitaxial layer 3 measured along a straight line passing through the center of the SiC epitaxial layer 3 and extending in the <11-20> direction by twice the average value.

[0064] Furthermore, the deviation of the circumferential carrier concentration of the SiC epitaxial layer 3 is preferably 20% or less, more preferably 15% or less, even more preferably 12% or less, even more preferably 10% or less, particularly preferably 5% or less, and even more particularly preferably 2% or less. The measurement points for measuring the deviation of the circumferential carrier concentration are the same as the measurement points for measuring the deviation of the circumferential film thickness of the SiC epitaxial layer 3. The depth positions for measuring the deviation of the carrier concentration are set to be approximately the same at each measurement point. Here, for example, if the absolute value of the difference between the maximum and minimum values ​​of the depth positions of each measurement point is within ±5% of the thickness of the center of the SiC epitaxial layer 3, it can be said to be approximately the same. The deviation of the circumferential carrier concentration is obtained by dividing the difference between the maximum and minimum values ​​of the carrier concentration of the SiC epitaxial layer 3 measured at four points symmetrically positioned with the center of the SiC epitaxial layer 3 as a reference, when viewed from the stacking direction, by twice the average value.

[0065] Here, the carrier concentration is the effective carrier concentration. The effective carrier concentration is the absolute value of the difference between the donor concentration and the acceptor concentration. For the carrier concentration of the SiC epitaxial layer 3, it can be determined, for example, by mercury probe microanalysis (Hg-CV) or secondary ion mass spectrometry (SIMS). Hg-CV measures the effective carrier concentration as the difference between the donor and acceptor concentrations. Secondary ion mass spectrometry (SIMS) is a method of mass spectrometry analysis of secondary ions emitted while scraping the layer in the thickness direction. It can determine the doping concentration based on mass spectrometry. SIMS can determine the actual values ​​of both the donor and acceptor concentrations, and the effective carrier concentration can be calculated by finding the difference between the actual values ​​of the donor and acceptor concentrations at the same depth position (measuring a specified position).

[0066] Next, the manufacturing method of the SiC epitaxial wafer 1 according to this embodiment will be described.

[0067] Figure 4This is a cross-sectional schematic diagram of an example of a SiC epitaxial wafer deposition apparatus according to this embodiment. The deposition apparatus 100 includes, for example, a chamber 10, a support 20, a lower heater 30, and an upper heater 40. The SiC substrate 2 is placed on a base 50 and transported into the deposition apparatus 100.

[0068] The support body 20 supports the base 50. The SiC substrate 2 is disposed on the support body 20, for example, while being placed on the base 50. The support body 20 is, for example, rotatable about a central axis. When the support body 20 rotates, the base 50 and the SiC substrate 2 rotate together with the support body 20.

[0069] The support 20 is configured to supply purge gas to the rear side of the base 50. The support 20, for example, has a supply port for supplying purge gas to the rear side of the base 50 and a gas flow path for delivering the purge gas to the supply port. The purge gas is, for example, an inert gas such as nitrogen or argon.

[0070] The lower heater 30 is located, for example, inside the support 20, and heats the SiC substrate 2. The upper heater 40 heats the upper part of the chamber 10.

[0071] The chamber 10, for example, includes a main body 11, a gas supply port 12, and a gas exhaust port 13. The main body 11 surrounds the film deposition space S. The gas supply port 12 is the inlet for supplying gas G to the film deposition space S. Multiple gas supply ports 12 are, for example, located above the mounting surface of the SiC substrate 2. A film deposition apparatus with gas supply ports 12 located above the mounting surface of the SiC substrate 2 is called a vertical furnace. The gas exhaust port 13 is the outlet for discharging gas G and the like that retained in the film deposition space S. The gas exhaust port 13 is, for example, located below the mounting surface of the SiC substrate 2.

[0072] Gas G can be, for example, raw material gas, carrier gas, doping gas, or etching gas. Raw material gases include Si-based raw material gases and C-based raw material gases.

[0073] Si-based feed gases are feed gases containing Si molecules. Examples of Si-based feed gases include silane (SiH4), dichlorosilane (SiH2Cl2), trichlorosilane (SiHCl3), and tetrachlorosilane (SiCl4). Preferably, the Si-based feed gas includes at least one selected from SiH3Cl, SiH2Cl2, and SiHCl3.

[0074] C-series feed gases are feed gases that contain carbon atoms within their molecules. Examples of C-series feed gases include propane (C3H8) and ethylene (C2H4). Preferably, C-series feed gases include at least one selected from CH4, C2H6, and C3H8.

[0075] The doping gas is a gas containing elements that act as charge carriers. An example of a doping gas is nitrogen (N2).

[0076] The carrier gas is the gas that transports the raw material gas to the SiC substrate 2, and is an inert gas relative to SiC. Preferred carrier gases include, for example, Ar.

[0077] Etching gas is a gas that reacts with SiC at high temperatures to etch SiC. Preferred etching gases include, for example, hydrogen chloride (HCl).

[0078] The base 50 supports the SiC substrate 2. Figure 5 This is a cross-sectional view of the SiC substrate 2 placed on the base 50. The base 50 has a main body 51 and a frame 52 protruding from the main body 51. The frame 52 prevents the rotating SiC substrate 2 from flying outward during film deposition.

[0079] The main body 51 has a slit SL1. Purge gas is supplied to the back side of the SiC substrate 2 through the slit SL1. Figure 6 This is a top view showing the positional relationship between the slit SL1 and the positioning groove 4. The base 50 and the SiC substrate 2 rotate as a single unit, therefore, the positional relationship between the slit SL1 and the positioning groove 4 does not change during film formation.

[0080] The shape of slit SL1 is approximately the same as that of positioning groove 4. Slit SL1 is located in the [-1100] direction relative to positioning groove 4. Slit SL1 is located in a position that does not overlap with positioning groove 4. For example, the distance between the innermost point 5 of positioning groove 4 and the innermost point 5' of slit SL1 is 2 mm.

[0081] The SiC epitaxial wafer 1 in this embodiment is obtained, for example, by forming a SiC epitaxial layer 3 on a SiC substrate 2 using the aforementioned SiC epitaxial wafer film forming apparatus.

[0082] In the film formation process, firstly, the SiC substrate 2, which is placed on the substrate 50, is placed inside the chamber 10. After the chamber 10 is evacuated, the SiC epitaxial layer 3 is formed on the SiC substrate 2.

[0083] While rotating the SiC substrate 2, the SiC epitaxial layer 3 is formed. The rotation direction of the SiC substrate 2 is set such that the positioning groove 4 rotates clockwise. The rotation direction of the SiC substrate 2 can also be opposite to this rotation direction.

[0084] The SiC epitaxial layer 3 is formed by supplying a mixed gas, including Si-based raw material gas, C-based raw material gas, etching gas, carrier gas and doping gas, to one surface of the SiC substrate 2.

[0085] Furthermore, during the deposition of the SiC epitaxial layer 3, a purge gas is supplied to the back side of the SiC substrate 2 via the slit SL1. The purge gas is, for example, Ar. The flow rate of the purge gas is, for example, set to 5 sccm or more and 50 sccm or less. By supplying the purge gas from the slit SL1, the deviation in the distribution of the raw material gas supplied to the right and left sides of the positioning groove 4 is reduced. As a result, it is possible to fabricate the SiC epitaxial wafer 1 according to this embodiment, which has a small thickness deviation on the right and left sides of the positioning groove 4.

[0086] Here, with Figure 4 The method for manufacturing a SiC epitaxial wafer 1 according to this embodiment has been described using the film deposition apparatus 100 shown as an example, but the film deposition apparatus is not limited to this example. The shape of the film deposition apparatus is not limited as long as it can supply purge gas to a predetermined position on the back side of the SiC substrate 2. For example, it can also be a horizontal furnace with the gas supply port 12 located on the side of the mounting surface of the SiC substrate 2.

[0087] In this embodiment, the SiC epitaxial wafer 1 has a small thickness deviation of the SiC epitaxial layer 3 on the right and left sides of the positioning groove 4, and the thickness uniformity of the SiC epitaxial layer 3 near the positioning groove 4 is high. The positioning groove 4 is used to control the position and orientation during SiC device fabrication. When the thickness uniformity near the positioning groove 4 is low, it may become a cause of defects when reading the positioning groove 4 by means of lasers or the like. The SiC epitaxial wafer 1 in this embodiment has high thickness uniformity of the SiC epitaxial layer 3 near the positioning groove 4, therefore, precise control of position and orientation can be performed, and defects during SiC device fabrication can be suppressed.

[0088] The preferred embodiments of the present invention have been described in detail above, but the present invention is not limited to specific embodiments, and various modifications and alterations can be made within the scope of the spirit of the present invention as set forth in the claims.

[0089]

Example

[0090] Comparative Example 1

[0091] In Comparative Example 1, the flow distribution of the raw material gas near the positioning groove was measured using a simulation when forming a SiC epitaxial wafer using a slitless substrate. Because the substrate lacked slits, a sufficient amount of purge gas was not supplied to the back side of the SiC substrate. The simulation was performed using the general-purpose fluid analysis software ANSYS Fluent. The diameter of the SiC substrate was set to 200 mm, and the depth of the positioning groove was set to 2 mm. The rotation direction of the SiC substrate was set to clockwise rotation of the positioning groove. Furthermore, the simulation conditions were set such that the furnace wall boundary was adiabatic.

[0092] Figure 7 This is the simulation result for Comparative Example 1. Figure 7 The diagram shows that the closer the color is to black, the greater the amount of raw material supplied. The simulation results of Comparative Example 1 show that the amount of raw material supplied deviates between the right and left sides of the positioning slot.

[0093] Figure 8 This indicates the amount of feed gas supplied along the baseline L0, the first measurement line L1, and the second measurement line L2, respectively, in the simulation results of Comparative Example 1. Figure 8 The horizontal axis represents the distance l from the reference axis that passes through the center of the SiC substrate and extends in the <11-20> direction. Figure 8 On the horizontal axis, the [-1100] direction is taken as positive. Due to the positioning groove, the absolute value of the distance l between the datum line L0 and the datum axis is at most 98.0 mm. Figure 8 The vertical axis represents the amount of raw material gas supplied to the SiC substrate.

[0094] like Figure 8 As shown, it can be confirmed that there is a difference in the supply of raw material gas on the left side of the positioning groove (first measuring line L1) and the right side of the positioning groove (second measuring line L2).

[0095] Furthermore, when an actual SiC epitaxial wafer was fabricated under the same conditions as Comparative Example 1, the SiC epitaxial layer thickness at the measurement point of x = 500 μm (0.5 mm) on the first measurement line L1 was 3.36 μm, and the SiC epitaxial layer thickness at the measurement point of x = 500 μm (0.5 mm) on the second measurement line L2 was 4.27 μm. The thickness deviation of the SiC epitaxial layer in Comparative Example 1 was 11.9%.

[0096] Example 1

[0097] In Example 1, a base with a slit SL1 was used, which differs from Comparative Example 1. A purge gas of 25 sccm was supplied to the back side of the SiC substrate from the slit SL1. Other conditions were set the same as in Comparative Example 1, and the supply rates of the raw material gas to the left side (first measurement line L1) and the right side (second measurement line L2) of the positioning groove were simulated.

[0098] Comparative Example 2

[0099] In Comparative Example 2, a base with a slit SL2 was used, which differs from Comparative Example 1. A purge gas flow rate of 25 sccm was supplied to the back side of the SiC substrate from the slit SL2. The slit SL2 has the same shape as the slit SL1. Viewed from above, the slit SL2 is positioned overlapping the positioning groove 4. With other conditions set the same as in Comparative Example 1, the supply rates of the raw material gas to the left side (first measurement line L1) and the right side (second measurement line L2) of the positioning groove were simulated.

[0100] Comparative Example 3

[0101] In Comparative Example 3, a base with a slit SL3 was used, which differs from Comparative Example 1. A purge gas of 25 sccm was supplied to the back side of the SiC substrate from the slit SL3. The slit SL3 has the same shape as the slit SL1. The slit SL3 is located at a position shifted to the right from the positioning groove 4. One corner of the slit SL3 is located in the [1-100] direction relative to the innermost point 5 of the positioning groove 4. With other conditions set the same as in Comparative Example 1, the supply rates of the raw material gas to the left side (first measurement line L1) and the right side (second measurement line L2) of the positioning groove were simulated.

[0102] Comparative Example 4

[0103] In Comparative Example 4, a base with a slit SL4 was used, which differs from Comparative Example 1. A purge gas of 25 sccm was supplied to the back side of the SiC substrate from the slit SL4. The slit SL4 has the same shape as the slit SL1. The slit SL4 is located at a position shifted to the left from the positioning groove 4. One corner of the slit SL4 is located in the [1-100] direction relative to the innermost point 5 of the positioning groove 4. With other conditions set the same as in Comparative Example 1, the supply rates of the raw material gas to the left side (first measurement line L1) and the right side (second measurement line L2) of the positioning groove were simulated.

[0104] Figure 9 This is a diagram showing the positional relationship of slits SL1 to SL4 in Example 1 and Comparative Examples 2 to 4.

[0105] Figure 10 This indicates the amount of raw material gas supplied along the first measurement line L1 in the simulation results of Examples 1 and Comparative Examples 1 to 4. Figure 10 The horizontal axis represents the distance l from the reference axis that passes through the center of the SiC substrate and extends in the <11-20> direction. Figure 10 On the horizontal axis, the direction [-1100] is taken as positive. Figure 10 The vertical axis represents the amount of raw material gas supplied to the SiC substrate.

[0106] Figure 11 This indicates the amount of raw material gas supplied along the second measurement line L2 in the simulation results of Examples 1 and Comparative Examples 1 to 4. Figure 11 The horizontal axis represents the distance l from the reference axis that passes through the center of the SiC substrate and extends in the <11-20> direction. Figure 11 On the horizontal axis, the direction [-1100] is taken as positive. Figure 11 The vertical axis represents the amount of raw material gas supplied to the SiC substrate.

[0107] like Figure 10and Figure 11 As shown, in Example 1, the radial thickness deviation of the SiC epitaxial layer is smaller compared to Comparative Examples 1-4. Comparative Examples 2-4, like Example 1, supplied purge gas to the back side of the SiC substrate, but the deviation in the amount of raw material gas supplied was larger than in Comparative Example 1. Furthermore, as... Figure 10 and Figure 11 As shown, in Example 1, compared with Comparative Examples 1 to 4, the difference in the supply of raw material gas between the left and right sides of the positioning groove at the same distance l from the reference axis is small.

[0108] When an actual SiC epitaxial wafer was fabricated under the same conditions as in Example 1, the SiC epitaxial layer thickness at the measurement point of x = 500 μm (0.5 mm) on the first measurement line L1 was 9.63 μm, and the SiC epitaxial layer thickness at the measurement point of x = 500 μm (0.5 mm) on the second measurement line L2 was 8.87 μm. The thickness deviation of the SiC epitaxial layer in Example 1 was 4.10%.

Claims

1. A SiC epitaxial wafer, It has a SiC substrate and a SiC epitaxial layer. Viewed from above in the stacking direction, it has a positioning groove that cuts a portion of the wafer from the outer periphery toward the inner side. The positioning groove has a first side and a second side that connect the innermost point of the positioning groove to the outer periphery of the wafer. The first side is located in the [-1-120] direction relative to the innermost point. The second side is located in the [11-20] direction relative to the innermost point. When the first measuring point is set at a position 0.5 mm away from the first point, which is the midpoint of the first side, in the direction of [-1100], and the second measuring point is set at a position 0.5 mm away from the second point, which is the midpoint of the second side, in the direction of [-1100], The thickness deviation between the first film thickness of the SiC epitaxial layer at the first measurement point and the second film thickness of the SiC epitaxial layer at the second measurement point is less than 10%. The film thickness deviation is calculated by dividing the absolute value of the difference between the first film thickness and the second film thickness by twice the average film thickness of the first film thickness and the second film thickness.

2. The SiC epitaxial wafer according to claim 1, Let L(x) be the thickness of the SiC epitaxial layer at a position x mm from the first point in the [-1100] direction, and let R(x) be the thickness of the SiC epitaxial layer at a position x mm from the second point in the [-1100] direction. When the average value of L(x) and R(x) is set as Ave(L(x), R(x)), if x ≤ 5, then |(L(x) - R(x))| / (2×Ave(L(x), R(x))) < 10%.

3. The SiC epitaxial wafer according to claim 1, The diameter is 145mm or more.

4. The SiC epitaxial wafer according to claim 1, The diameter is 195mm or more.

5. The SiC epitaxial wafer according to claim 1, The radial thickness deviation of the SiC epitaxial layer is less than 5%. The deviation of the film thickness in the radial direction is obtained by dividing the difference between the maximum and minimum film thickness of the SiC epitaxial layer, measured along a straight line passing through the center of the SiC epitaxial layer and extending in the <11-20> direction, by twice the average value.

6. The SiC epitaxial wafer according to claim 1, The circumferential thickness deviation of the SiC epitaxial layer is less than 5%. The circumferential thickness deviation is calculated by dividing the difference between the maximum and minimum film thicknesses of the SiC epitaxial layer measured at four points by twice the average value. These four points are: two points obtained by advancing half the radius in the <11-20> direction from the center of the SiC epitaxial layer, and two points obtained by advancing half the radius in the <-1-100> direction from the center of the SiC epitaxial layer.

Images