A manufacturing method of a through-type double-sided V groove

Abstract

The application discloses a manufacturing method of a through-type double-face V groove, and specifically comprises the following steps: S1, selecting a substrate and performing front surface processing; S2, depositing a composite film layer; and S3, performing back surface processing. The application is designed by standardizing equipment parameters and a process linkage, reduces process redundancy, and improves the yield rate to more than 90%, and can be directly adapted to industrial mass production. The composite film layer has passivation, corrosion prevention and mechanical protection functions, and is suitable for application requirements in multiple scenes such as MEMS.

Description

Technical Field

[0001] This invention relates to the field of suspended membrane structure technology, specifically a method for manufacturing a through-type double-sided V-groove. Background Technology

[0002] Single-sided V-grooves are based on the anisotropy of crystal structures. A silicon substrate with a crystal orientation of 100° conforms to the crystal structure, forming a fixed 57.74° V-groove. Through-type double-sided V-grooves are based on the fabrication of single-sided V-grooves. A specific film layer is then applied to the bottom of the structure as a support layer. Alignment photolithography is then performed on the other side, and finally, an etching process is used to etch down to the support layer, controlling the crystal orientation morphology to form a beam-and-gap-wide hollow structure.

[0003] The shortcomings of existing technology: Currently, single-sided V-grooves can only be used for deep etching. Due to the influence of crystal orientation, a through-type V-groove structure cannot be formed. In addition, unreasonable design of the support layer film, such as failure to consider stress balance, can lead to support film rupture and abnormal V-groove etching angle, thereby affecting the structure and reliability of the device, resulting in a yield of less than 60%. At the same time, traditional film layers mostly use single deposition technology, which makes it difficult to simultaneously achieve the functions of density, stress regulation and mechanical protection. Summary of the Invention

[0004] The purpose of this invention is to provide a method for manufacturing a through-type double-sided V-groove to solve the problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: a method for manufacturing a through-type double-sided V-groove, the method specifically comprising: S1. Select the substrate and perform front-side processing; S2, composite film deposition; S3. Perform backside processing.

[0006] Preferably, step S1 specifically includes: a1. Select a substrate with a silicon nitride layer of 100-300nm deposited on a silicon substrate with crystal orientation 100, and the surface roughness Ra of the silicon nitride layer is ≤0.5nm; a2. Pre-treat the surface of the 100-300nm silicon nitride layer; a3. 100-300nm silicon nitride is etched by reactive ion etching process to form a silicon nitride mask pattern with V-groove on the front side. F-based reactive gas decomposes under the action of radio frequency source to produce active reactive components. Under the action of self-biased electric field, it reacts with the etched material to produce gas volatilization. a4. Use a 3:1 SPM solution to rinse and remove metallic impurities from the silicon nitride surface. Set the water flow rate to 3~5L / min and the rinsing time to 2~3min. a5. Use 20~30wt% KOH solution to etch at 80℃ to form a front V-groove structure. Through temperature control system and operation temperature control equipment, time control and batch quantity management, the etching depth error is set within ±3um. a6. Use a 40% HF solution to remove the silicon nitride layer.

[0007] Preferably, step S2 specifically includes: b1. Deposit a 100-300 nm silicon nitride layer using a low-pressure chemical vapor deposition process; b2. Depositing the intermediate layer using plasma-enhanced chemical vapor deposition (PECVD) process. The top-layer PECVD silicon nitride is used to support and protect the V-groove film layer on the front side. The composite film layer is designed as LPCVD SiN+PECVD. +PECVD SiN.

[0008] Preferably, step S3 specifically includes: c1. Spin-coating photoresist on the back side, repeatedly exposing and developing to form a photoresist mask pattern for V-groove processing on the back side; c2. The silicon nitride layer without photoresist protection on the back is etched using the RIE process to expose the silicon substrate; c3. Use a 3:1 SPM solution to rinse and remove metallic impurities from the silicon nitride surface. Set the water flow rate to 3~5L / min and the rinsing time to 2~3min. c4. Corrosion was carried out using 25wt% KOH solution at 80℃, with a corrosion rate of 1.5~2.0μm / min; c5. Remove the silicon nitride mask using a 40% HF solution.

[0009] Preferably, step a2 specifically includes: a21. Use oxygen plasma cleaning to remove organic contaminants from the surface. Set the cleaning power to 100-150W, the oxygen flow rate to 20-30sccm, and the treatment time to 60-90s. a22. Place the silicon nitride layer on the chuck of a spin coater and drop-coat positive photoresist. The photoresist model used is AZ5214E. First, spin coat at a low speed to evenly cover the silicon nitride surface with photoresist. The rotation speed is set to 500-800 rpm and the time is set to 5-10s. Then, spin coat at a high speed to control the dry film thickness of the photoresist to 1.0-1.5μm. The rotation speed is set to 3000-4000 rpm and the time is set to 30-45s. a23. Use hot plate baking to remove solvent from photoresist, with the temperature set to 90-100℃ and the time set to 60-90s; a24. Form a mask with a front V-groove pattern on the photoresist to expose the silicon nitride area to be etched. Set the exposure dose to 120mJ / cm², the development time to 120s, the opening width of the photoresist pattern to within ±0.1μm, and the angle accuracy of the photoresist pattern to within ±1°.

[0010] Preferably, in step a3: the reaction gas includes , And Ar, , Ar = 30~50 sccm; ; , Ar purity is ≥99.999%, and moisture content is ≤5ppm; RF power parameters: source power is set to 250~300W, bias power is set to 60~80W; source power to bias power ratio is 3.5:1~4:1; pressure and temperature control: etching pressure is set to 150~200mTorr; sample stage temperature is set to 23±2℃; basic etching time is set to 7~10min, and over-etching time is set to 1~1.5min.

[0011] Preferably, step a5 specifically includes: a51. A high-precision constant temperature water bath and a PT100 temperature sensor are used. During the corrosion process, magnetic stirring is performed. The distance between the stirring paddle and the silicon substrate is set to ≥3cm. Temperature data is recorded every 1 minute. If the temperature deviates from 80℃±1℃, the constant temperature compensation program is immediately started. a52. The standard is that the silicon substrate is completely immersed in 80℃ KOH solution. The basic etching time is set to 3~8 minutes. The first 3 silicon substrates of each batch are taken out after etching for 3 minutes, 5 minutes and 7 minutes respectively. The depth of the V groove is measured by a step meter. If the target depth is not reached, the measurement is repeated every 0.5 minutes to determine the optimal etching time. After the set time is reached, the silicon substrate is quickly taken out and immediately immersed in ice bath DI water for 30 seconds to stop the etching reaction.

[0012] Preferably, step b1 specifically includes: b11. Push in the quartz holder, close the furnace door, and evacuate to a vacuum level of less than 0.5 Torr; b12. Purge the furnace tubes with 300 sccm of nitrogen for 10 minutes to remove oxygen and water vapor. b13. Increase the temperature to 880~900℃ at 5℃ / min, hold for 30min to stabilize the temperature field, then reduce the nitrogen gas pressure to 250sccm and introduce nitrogen gas at a rate of 5sccm / min. and ; b14. Adjust the gas flow rate to stabilize the furnace tube pressure at 2~3 Torr, and maintain it for 5 minutes; b15. Record parameters every 5 minutes. The equipment will automatically alarm and adjust when the deviation exceeds ±5%. b16. After the time is reached, turn off the reaction gas, maintain 250 sccm of nitrogen, cool down to 400℃ at 3℃ / min, and allow to cool naturally to room temperature before breaking the vacuum and taking out the slide.

[0013] Preferably, b2 specifically includes: b21. Place the LPSiN-deposited substrate into the PECVD sample stage, with an adsorption vacuum ≥ -90kPa and a wafer spacing ≥ 8mm. b22. Close the chamber, start the turbomolecular pump to evacuate to ≤10mTorr, heat to 350℃ and hold for 10min, purge with 200sccm of nitrogen for 5min to remove residual impurities from the chamber. b23, sequentially insert , , and And increase to the target value at the specified rate; b24. Stabilize the pressure at 350~400mTorr using the throttle valve, and set the maintenance time to 3min; b25. Turn on the RF power supply to 380W, observe the uniform blue-purple glow, and record the parameter data every 3 minutes to monitor the process. flow; b26. After deposition is complete, turn off the reaction gas, maintain nitrogen at 150 sccm, and then turn on... Plasma treatment, in which The power was set to 250W, the pressure to 300mTorr, and the time to 10min. The temperature was then lowered to below 100℃ to break the vacuum and remove the tablet. b27. Set the V-groove opening to face upwards, and ensure the sample stage adsorption vacuum is ≥-95kPa; b28. Evacuate to a vacuum of 10 mTorr or less, purge with 200 sccm of nitrogen for 5 minutes, raise the temperature to 380℃ and hold for 0 minutes, then purge with 100 sccm of nitrogen according to the specified ratio. and The rate was set to 5 sccm / min; b29. Adjust the throttle valve to stabilize the pressure to 250~300mTorr, and maintain the pressure for 3 minutes. b211. Record parameters and in-situ stress every 5 minutes. If the superimposed stress of the first two layers is +80MPa, adjust the top layer compressive stress to 280~330MPa and set the total stress to less than or equal to ±50MPa.

[0014] Preferably, step c2 specifically includes: c21. Place the pretreated substrate with the back side facing up into the sample stage. The adsorption vacuum is ≥-95kPa and the distance between the sample stage and the cavity wall is ≥3cm. Close the cavity and start the turbomolecular pump to evacuate to the ultimate vacuum ≤5mTorr. c22. Purge with 50 sccm of Ar gas and maintain a pressure of 100 mTorr for 5 minutes to remove residual air and impurities from the chamber. c23. Adjust the Ar gas flow to the target flow rate and introduce it. and Hold for 3 minutes; c24. Turn on the ICP power and RF bias power, increase them to the target value, set the rate to 50W / min, and observe that the cavity glow is a uniform light yellow-green. c25. Main etching stage: Remove the silicon nitride layer, control the etching rate to stabilize, and avoid premature exposure of the silicon substrate. Record the etching rate every 60 seconds. The main etching ends when the characteristic peak intensity drops to 10% of the initial value. c26. Over-etching stage: Maintain The flow rate remains unchanged, The flow rate is reduced by 20%, the RF bias power is reduced by 10%, and the over-etching time is 15%~20% of the main etching time; c27, Close and Purge the chamber with Ar gas at 50 sccm for 8 minutes to remove residual fluoride free radicals. c28. Turn off the ICP and RF power supplies, allow the temperature to cool naturally to below 80°C, then break the vacuum and remove the wafer.

[0015] Compared with the prior art, the beneficial effects of the present invention are: 1. This method for manufacturing a through-type double-sided V-groove reduces process redundancy through standardized equipment parameters and process linkage design, increasing the yield to over 90%, and can be directly adapted to industrial mass production; the composite film layer takes into account passivation, corrosion prevention, and mechanical protection functions, and is suitable for the application needs of MEMS and other scenarios.

[0016] 2. The method for fabricating a through-type double-sided V-groove allows the depth error of the double-sided V-groove to be controlled within ±3µm, meeting the requirements of high-precision devices. The stress balance design of the composite film layer, combined with process protection measures, reduces the back film layer damage rate to below 5%, eliminating wafer warping and thin film cracking issues. Attached Figure Description

[0017] Figure 1 This is a detailed process flow diagram of the present invention; Figure 2 This is a planar view of the chip of the present invention; Figure 3 This is a schematic cross-sectional view of the chip of the present invention. Detailed Implementation

[0018] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0019] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0020] In the description of this patent, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection or setting, a detachable connection or setting, or an integrated connection or setting. Those skilled in the art can understand the specific meaning of the above terms in this patent according to the specific circumstances.

[0021] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a number" means two or more, unless otherwise explicitly specified.

[0022] Example Please see Figure 1-3 As shown, the present invention provides a technical solution for manufacturing a through-type double-sided V-groove: the manufacturing method specifically includes: S1. Select the substrate and perform front-side processing; a1. Select a substrate with a 200nm silicon nitride layer deposited on a silicon substrate with crystal orientation 100, and the surface roughness Ra of the silicon nitride layer is ≤0.5nm; a2. Pretreatment of the surface of the 200nm silicon nitride layer; a21. Use oxygen plasma cleaning to remove organic contaminants from the surface. Set the cleaning power to 100-150W, the oxygen flow rate to 20-30sccm, and the treatment time to 60-90s. a22. Place the silicon nitride layer on the chuck of a spin coater and drop-coat positive photoresist. The photoresist model used is AZ5214E. First, spin coat at a low speed to evenly cover the silicon nitride surface with photoresist. The rotation speed is set to 500-800 rpm and the time is set to 5-10s. Then, spin coat at a high speed to control the dry film thickness of the photoresist to 1.0-1.5μm. The rotation speed is set to 3000-4000 rpm and the time is set to 30-45s. a23. Use hot plate baking to remove solvent from photoresist, with the temperature set to 90-100℃ and the time set to 60-90s; a24. A mask forming a front V-groove pattern on the photoresist exposes the silicon nitride area to be etched. The exposure dose is set to 120 mJ / cm², the development time is set to 120 s, the opening width of the photoresist pattern is set to within ±0.1 μm, and the angle accuracy of the photoresist pattern is set to within ±1°. a3. A 200nm silicon nitride layer is etched using reactive ion etching (RIE) to form a front-side V-groove silicon nitride mask pattern. F-based reactive gases decompose under the influence of an RF source to generate active reactive components. Under a self-biased electric field, these components react physically and chemically with the etched material, causing gas volatilization. This process etches the unprotected silicon nitride layer, forming the front-side V-groove silicon nitride mask pattern. The reactive gases include... , And Ar, , Ar = 30~50 sccm; ; , Ar purity ≥99.999%, moisture content ≤5ppm; RF power parameters: source power set to 250~300W, bias power set to 60~80W; source power to bias power ratio 3.5:1~4:1; pressure and temperature control: etching pressure set to 150~200mTorr; sample stage temperature set to 23±2℃; basic etching time set to 7~10min, over-etching time set to 1~1.5min; a4. Use a 3:1 SPM solution to rinse and remove metallic impurities from the silicon nitride surface. Set the water flow rate to 3~5L / min and the rinsing time to 2~3min. a5. Use 20~30wt% KOH solution to etch at 80℃ to form a front V-groove structure. Through temperature control system and operation temperature control equipment, time control and batch quantity management, the etching depth error is set within ±3um to ensure that there is no residue on the silicon nitride surface and avoid the subsequent etching process from being interfered with by impurities. a51. A high-precision constant temperature water bath and a PT100 temperature sensor are used. During the corrosion process, magnetic stirring is performed. The distance between the stirring paddle and the silicon substrate is set to ≥3cm. Temperature data is recorded every 1 minute. If the temperature deviates from 80℃±1℃, the constant temperature compensation program is immediately started. a52. The standard is that the silicon substrate is completely immersed in 80℃ KOH solution. The basic etching time is set to 3~8 minutes. The first 3 silicon substrates of each batch are taken out after etching for 3 minutes, 5 minutes and 7 minutes respectively. The depth of the V-groove is measured with a step meter. If the target depth is not reached, the measurement is repeated every 0.5 minutes to determine the optimal etching time. After the set time is reached, the silicon substrate is quickly taken out and immediately immersed in ice bath DI water for 30 seconds to stop the etching reaction. a6. Using a 40% HF solution to remove the silicon nitride layer, the complete etching of the silicon nitride can be quickly verified by the visual changes in color and hydrophobicity. No complex equipment is required. Color change assessment: Before etching: The silicon nitride layer is a uniform light yellow / pale blue with no obvious color difference; After complete etching: After the silicon nitride is completely removed, the silicon substrate or SiO2 layer is exposed, with a uniform surface color and no residual yellow / blue patches corresponding to silicon nitride. Hydrophobicity assessment: Before etching: The silicon nitride layer surface is hydrophobic, forming water droplets after adding deionized water, and is not easily spread; After complete etching: The substrate is hydrophilic, quickly spreading to form a continuous water film after adding deionized water, without condensation water droplets, and the water film does not break when tilted at 45°, ensuring that the silicon nitride layer is completely removed without damaging the silicon substrate V-groove structure. S2. Composite film deposition: Low-stress LPCVD SiN low-pressure chemical vapor deposition + PECVD plasma-enhanced chemical vapor deposition. +PECVD SiN three-layer stacked structure, through material stress simulation, calculates the relationship between the thickness and stress between the three layers, so that the comprehensive stress of the three-layer film is controlled within 100Mpa; b1. A 200nm silicon nitride layer was deposited using a low-pressure chemical vapor deposition process; b11. Push in the quartz holder, close the furnace door, and evacuate to a vacuum level of less than 0.5 Torr; b12. Purge the furnace tubes with 300 sccm of nitrogen for 10 minutes to remove oxygen and water vapor. b13. Increase the temperature to 880~900℃ at 5℃ / min, hold for 30min to stabilize the temperature field, then reduce the nitrogen gas pressure to 250sccm and introduce nitrogen gas at a rate of 5sccm / min. and ; b14. Adjust the gas flow rate to stabilize the furnace tube pressure at 2~3 Torr, and maintain it for 5 minutes; b15. Record parameters every 5 minutes. The equipment will automatically alarm and adjust when the deviation exceeds ±5%. b16. After the time is reached, turn off the reaction gas, maintain 250 sccm of nitrogen, cool down to 400℃ at 3℃ / min, and let it cool naturally to room temperature before breaking the vacuum and taking out the slide. b2. Depositing the intermediate layer using plasma-enhanced chemical vapor deposition (PECVD) process. The top-layer PECVD silicon nitride is used to support and protect the V-groove film layer on the front side. The composite film layer is designed as LPCVD SiN+PECVD. +PECVD SiN; b21. Place the LPSiN-deposited substrate into the PECVD sample stage, with an adsorption vacuum ≥ -90kPa and a wafer spacing ≥ 8mm. b22. Close the chamber, start the turbomolecular pump to evacuate to ≤10mTorr, heat to 350℃ and hold for 10min, purge with 200sccm of nitrogen for 5min to remove residual impurities from the chamber. b23, sequentially insert , , and And increase to the target value at the specified rate; b24. Stabilize the pressure at 350~400mTorr using the throttle valve, and set the maintenance time to 3min; b25. Turn on the RF power supply to 380W, observe the uniform blue-purple glow, and record the parameter data every 3 minutes to monitor the process. flow; b26. After deposition is complete, turn off the reaction gas, maintain nitrogen at 150 sccm, and then turn on... Plasma treatment, in which The power was set to 250W, the pressure to 300mTorr, and the time to 10min. The temperature was then lowered to below 100℃ to break the vacuum and remove the tablet. b27. Set the V-groove opening to face upwards, and ensure the sample stage adsorption vacuum is ≥-95kPa; b28. Evacuate to a vacuum of 10 mTorr or less, purge with 200 sccm of nitrogen for 5 minutes, raise the temperature to 380℃ and hold for 0 minutes, then purge with 100 sccm of nitrogen according to the specified ratio. and The rate was set to 5 sccm / min; b29. Adjust the throttle valve to stabilize the pressure to 250~300mTorr, and maintain the pressure for 3 minutes. b211. Record parameters and in-situ stress every 5 minutes. If the superimposed stress of the first two layers is +80MPa, adjust the top layer compressive stress to 280~330MPa and set the total stress to less than or equal to ±50MPa. S3. Perform backside processing; c1. Spin-coating photoresist on the back side, repeatedly exposing and developing to form a photoresist mask pattern for V-groove processing on the back side; c2. The silicon nitride layer without photoresist protection on the back is etched using the RIE process to expose the silicon substrate; c21. Place the pretreated substrate with the back side facing up into the sample stage. The adsorption vacuum is ≥-95kPa and the distance between the sample stage and the cavity wall is ≥3cm. Close the cavity and start the turbomolecular pump to evacuate to the ultimate vacuum ≤5mTorr. c22. Purge with 50 sccm of Ar gas and maintain a pressure of 100 mTorr for 5 minutes to remove residual air and impurities from the chamber. c23. Adjust the Ar gas flow to the target flow rate and introduce it. and Hold for 3 minutes; c24. Turn on the ICP power and RF bias power, increase them to the target value, set the rate to 50W / min, and observe that the cavity glow is a uniform light yellow-green. c25. Main etching stage: Remove the silicon nitride layer, control the etching rate to stabilize, and avoid premature exposure of the silicon substrate. Record the etching rate every 60 seconds. The main etching ends when the characteristic peak intensity drops to 10% of the initial value. c26. Over-etching stage: Maintain The flow rate remains unchanged, The flow rate is reduced by 20%, the RF bias power is reduced by 10%, and the over-etching time is 15%~20% of the main etching time; c27, Close and Purge the chamber with Ar gas at 50 sccm for 8 minutes to remove residual fluoride free radicals. c28. Turn off the ICP and RF power supplies, allow the temperature to cool naturally to below 80°C, then break the vacuum and remove the wafer; c3. Use a 3:1 SPM solution to rinse and remove metallic impurities from the silicon nitride surface. Set the water flow rate to 3~5L / min and the rinsing time to 2~3min. c4. Corrosion was carried out using 25wt% KOH solution at 80℃, with a corrosion rate of 1.5~2.0μm / min; c5. Remove the silicon nitride mask layer using a 40% HF solution; The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for manufacturing a through-type double-sided V-groove, characterized in that: The manufacturing method specifically includes: S1. Select the substrate and perform front-side processing: a1. Select a substrate with a silicon nitride layer of 100-300nm deposited on a silicon substrate with crystal orientation 100, and the surface roughness Ra of the silicon nitride layer is ≤0.5nm; a2. Pre-treat the surface of the 100-300nm silicon nitride layer; a3. 100-300nm silicon nitride is etched by reactive ion etching process to form a silicon nitride mask pattern with V-groove on the front side. F-based reactive gas decomposes under the action of radio frequency source to produce active reactive components. Under the action of self-biased electric field, it reacts with the etched material to produce gas volatilization. a4. Use a 3:1 SPM solution to rinse and remove metallic impurities from the silicon nitride surface. Set the water flow rate to 3~5L / min and the rinsing time to 2~3min. a5. Use 20~30wt% KOH solution to etch at 80℃ to form a front V-groove structure. Through temperature control system and operation temperature control equipment, time control and batch quantity management, the etching depth error is set within ±3um. a6. Remove the silicon nitride layer using a 40% HF solution; S2, Composite film deposition: b1. Deposit a 100-300 nm silicon nitride layer using a low-pressure chemical vapor deposition process; b2. Depositing the intermediate layer using plasma-enhanced chemical vapor deposition (PECVD) process. The top-layer PECVD silicon nitride is used to support and protect the V-groove film layer on the front side. The composite film layer is designed as LPCVD SiN+PECVD. +PECVD SiN; S3. Perform backside processing: c1. Spin-coating photoresist on the back side, repeatedly exposing and developing to form a photoresist mask pattern for V-groove processing on the back side; c2. The silicon nitride layer without photoresist protection on the back is etched using the RIE process to expose the silicon substrate; c3. Use a 3:1 SPM solution to rinse and remove metallic impurities from the silicon nitride surface. Set the water flow rate to 3~5L / min and the rinsing time to 2~3min. c4. Corrosion was carried out using 25wt% KOH solution at 80℃, with a corrosion rate of 1.5~2.0μm / min; c5. Remove the silicon nitride mask layer using a 40% HF solution.

2. The method for manufacturing a through-type double-sided V-groove according to claim 1, characterized in that: Step a2 specifically includes: a21. Use oxygen plasma cleaning to remove organic contaminants from the surface. Set the cleaning power to 100-150W, the oxygen flow rate to 20-30sccm, and the treatment time to 60-90s. a22. Place the silicon nitride layer on the chuck of a spin coater and drop-coat positive photoresist. The photoresist model used is AZ5214E. First, spin coat at a low speed to evenly cover the silicon nitride surface with photoresist. The rotation speed is set to 500-800 rpm and the time is set to 5-10s. Then, spin coat at a high speed to control the dry film thickness of the photoresist to 1.0-1.5μm. The rotation speed is set to 3000-4000 rpm and the time is set to 30-45s. a23. Use hot plate baking to remove solvent from photoresist, with the temperature set to 90-100℃ and the time set to 60-90s; a24. Form a mask with a front V-groove pattern on the photoresist to expose the silicon nitride area to be etched. Set the exposure dose to 120mJ / cm², the development time to 120s, the opening width of the photoresist pattern to within ±0.1μm, and the angle accuracy of the photoresist pattern to within ±1°.

3. The method for manufacturing a through-type double-sided V-groove according to claim 1, characterized in that: In step a3: the reaction gas includes , And Ar, =60~80sccm, =15~25sccm, Ar=30~50sccm; : =3:1~4:1; , Ar purity is ≥99.999%, and moisture content is ≤5ppm; RF power parameters: source power is set to 250~300W, bias power is set to 60~80W; source power to bias power ratio is 3.5:1~4:1; pressure and temperature control: etching pressure is set to 150~200mTorr; sample stage temperature is set to 23±2℃; basic etching time is set to 7~10min, and over-etching time is set to 1~1.5min.

4. The method for manufacturing a through-type double-sided V-groove according to claim 1, characterized in that: Step a5 specifically includes: a51. A high-precision constant temperature water bath and a PT100 temperature sensor are used. During the corrosion process, magnetic stirring is performed. The distance between the stirring paddle and the silicon substrate is set to ≥3cm. Temperature data is recorded every 1 minute. If the temperature deviates from 80℃±1℃, the constant temperature compensation program is immediately started. a52. The standard is that the silicon substrate is completely immersed in 80℃ KOH solution. The basic etching time is set to 3~8 minutes. The first 3 silicon substrates of each batch are taken out after etching for 3 minutes, 5 minutes and 7 minutes respectively. The depth of the V groove is measured by a step meter. If the target depth is not reached, the measurement is repeated every 0.5 minutes to determine the optimal etching time. After the set time is reached, the silicon substrate is quickly taken out and immediately immersed in ice bath DI water for 30 seconds to stop the etching reaction.

5. The method for manufacturing a through-type double-sided V-groove according to claim 1, characterized in that: Step b1 specifically includes: b11. Push in the quartz holder, close the furnace door, and evacuate to a vacuum level of less than 0.5 Torr; b12. Purge the furnace tubes with 300 sccm of nitrogen for 10 minutes to remove oxygen and water vapor. b13. Increase the temperature to 880~900℃ at 5℃ / min, hold for 30min to stabilize the temperature field, then reduce the nitrogen gas pressure to 250sccm and introduce nitrogen gas at a rate of 5sccm / min. and ; b14. Adjust the gas flow rate to stabilize the furnace tube pressure at 2~3 Torr, and maintain it for 5 minutes; b15. Record parameters every 5 minutes. The equipment will automatically alarm and adjust when the deviation exceeds ±5%. b16. After the time is reached, turn off the reaction gas, maintain 250 sccm of nitrogen, cool down to 400℃ at 3℃ / min, and allow to cool naturally to room temperature before breaking the vacuum and taking out the slide.

6. The method for manufacturing a through-type double-sided V-groove according to claim 1, characterized in that: Specifically, b2 includes: b21. Place the LPSiN-deposited substrate into the PECVD sample stage, with an adsorption vacuum ≥ -90kPa and a wafer spacing ≥ 8mm. b22. Close the chamber, start the turbomolecular pump to evacuate to ≤10mTorr, heat to 350℃ and hold for 10min, purge with 200sccm of nitrogen for 5min to remove residual impurities from the chamber. b23, sequentially insert , , and And increase to the target value at the specified rate; b24. Stabilize the pressure at 350~400mTorr using the throttle valve, and set the maintenance time to 3min; b25. Turn on the RF power supply to 380W, observe the uniform blue-purple glow, and record the parameter data every 3 minutes to monitor the process. flow; b26. After deposition is complete, turn off the reaction gas, maintain nitrogen at 150 sccm, and then turn on... Plasma treatment, in which =50sccm, power set to 250W, pressure set to 300mTorr, time set to 10min, and then cool down to below 100℃ to break the vacuum and remove the film; b27. Set the V-groove opening to face upwards, and ensure the sample stage adsorption vacuum is ≥-95kPa; b28. Evacuate to a vacuum of 10 mTorr or less, purge with 200 sccm of nitrogen for 5 minutes, raise the temperature to 380℃ and hold for 0 minutes, then purge with 100 sccm of nitrogen according to the specified ratio. and The rate was set to 5 sccm / min; b29. Adjust the throttle valve to stabilize the pressure to 250~300mTorr, and maintain the pressure for 3 minutes. b211. Record parameters and in-situ stress every 5 minutes. If the superimposed stress of the first two layers is +80MPa, adjust the top layer compressive stress to 280~330MPa and set the total stress to less than or equal to ±50MPa.

7. The method for manufacturing a through-type double-sided V-groove according to claim 1, characterized in that: Step c2 specifically includes: c21. Place the pretreated substrate with the back side facing up into the sample stage. The adsorption vacuum is ≥-95kPa and the distance between the sample stage and the cavity wall is ≥3cm. Close the cavity and start the turbomolecular pump to evacuate to the ultimate vacuum ≤5mTorr. c22. Purge with 50 sccm of Ar gas and maintain a pressure of 100 mTorr for 5 minutes to remove residual air and impurities from the chamber. c23. Adjust the Ar gas flow to the target flow rate and introduce it. and Hold for 3 minutes; c24. Turn on the ICP power and RF bias power, increase them to the target value, set the rate to 50W / min, and observe that the cavity glow is a uniform light yellow-green. c25. Main etching stage: Remove the silicon nitride layer, control the etching rate to stabilize, and avoid premature exposure of the silicon substrate. Record the etching rate every 60 seconds. The main etching ends when the characteristic peak intensity drops to 10% of the initial value. c26. Over-etching stage: Maintain The flow rate remains unchanged, The flow rate is reduced by 20%, the RF bias power is reduced by 10%, and the over-etching time is 15%~20% of the main etching time; c27, Close and Purge the chamber with Ar gas at 50 sccm for 8 minutes to remove residual fluoride free radicals. c28. Turn off the ICP and RF power supplies, allow the temperature to cool naturally to below 80°C, then break the vacuum and remove the wafer.

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