MTP burning method based on serial communication
The MTP programming method using two-wire serial communication, which utilizes an external programmer to control the MTP programming timing, solves the problems of high power consumption, large area, and low efficiency in traditional MTP programming, and achieves low-power and high-efficiency MTP programming.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-22
- Publication Date
- 2026-03-27
AI Technical Summary
Traditional MTP programming technology struggles to achieve optimal power consumption, area, and time efficiency. The internal high-speed oscillator HSI remains continuously active, resulting in high dynamic power consumption. The counting resources occupy a large chip area, and the programming efficiency is low.
It adopts two-wire serial communication, and generates MTP erase and programming timing through software control of the external programmer. It uses the serial clock pin SCLK and the bidirectional serial data pin SDIO for communication, replacing the internal HSI counter, to achieve continuous programming of MTP and low power consumption.
It reduces reliance on internal chip counting resources, saves chip area, reduces dynamic power consumption, and shortens programming time through continuous programming.
Smart Images
Figure CN121747653A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of integrated circuit technology, and in particular to an MTP programming method based on serial communication. Background Technology
[0002] MTP (Multiple-Time Programmable) is a type of non-volatile memory (NVM) that can be programmed multiple times. Traditional MTP programming typically involves sector erasure and programming operations via the SWD (Serial Wire Debug) interface. During this process, the chip's internal high-speed oscillator (HSI) must remain on, using the clock provided by the HSI for timing or counting to generate timing sequences that meet the requirements of MTP erasure and programming.
[0003] Furthermore, traditional MTP programming typically uses the SWD interface to perform full chip erasure, sector erasure, and programming of the MTP, and utilizes the chip's internal oscillator HSI to perform counting to generate the corresponding timing sequence. This process often requires the assistance of debug emulators such as JLINK, ULINK, and ST-LINK to complete the MTP programming.
[0004] In traditional solutions, HSI needs to be continuously enabled and uses the DAP (Debug Access Port) submodule of the CPUCore (Central Processing Unit Core) to complete the conversion from SWD protocol to AHB-Lite3 (Advanced High-performance Bus Lite 3) protocol. Registers are configured through the AHB-Lite3 bus interface. At the same time, the HSI clock is used to generate timing that satisfies the MTP programming and erasing operations, thereby realizing the erasure and programming control of the MTP.
[0005] As process nodes continue to shrink, traditional MTP programming technology struggles to achieve optimal PPA (Power, Performance, Area) comprehensive optimization. Therefore, completing MTP programming with smaller area, lower power consumption, and shorter time has become a critical objective that urgently needs to be addressed. Summary of the Invention
[0006] To address this, the present invention provides an MTP programming method based on serial communication. By utilizing two-wire serial communication, the underlying software control of the peripheral programmer generates timing sequences that satisfy MTP erasure and programming, thus solving the problems of slow programming speed, high power consumption, and large chip area encountered in traditional MTP programming.
[0007] To address the aforementioned technical problems, this invention provides an MTP programming method based on serial communication, applied to a target chip containing MTP memory. The target chip communicates with an external programmer via a serial clock pin SCLK and a bidirectional serial data pin SDIO. The method includes: The peripheral programmer outputs the serial clock pin SCLK as the working clock and sends an 8-bit data byte to the target chip through the bidirectional serial data pin SDIO. The target chip receives the 8-bit data byte and parses it into instruction codes and operands within a preset serial instruction set; According to the instruction code and its operands, an erase operation, a write operation or a read operation is performed on the MTP memory; The preset serial instruction set includes: The first read instruction SLD_MAIN is used to read data from the MAIN space of the MTP memory; A second read instruction SLD_NVR is used to read data from the NVR space of the MTP memory; The first write instruction SST_MAIN is used to write data to the MAIN space of the MTP memory; The second write instruction SST_NVR is used to write data to the NVR space of the MTP memory; The SSTAR instruction is used to write a target address to the MTP operation address register to specify the target address for subsequent erase, write, or read operations. The control command instruction SSTCMD is used to write an 8-bit control word to the MTP control register to trigger the erase or write operation. And the unlock command SKEY.
[0008] In one embodiment of the present invention, the falling edge of the serial clock pin SCLK output by the peripheral programmer is used to prepare data on the bidirectional serial data pin SDIO, the rising edge of the serial clock pin SCLK is used to sample the data on the bidirectional serial data pin SDIO, and the 8-bit data bytes are transmitted in the order of sending the high bit first and then the low bit.
[0009] In one embodiment of the present invention, the first read instruction SLD_MAIN and the second read instruction SLD_NVR are followed by four 8-bit operands to form 32-bit data to be written, and the order of sending the four 8-bit operands is data[7:0], data[15:8], data[23:16], and data[31:24].
[0010] In one embodiment of the present invention, the first write instruction SST_MAIN and the second write instruction SST_NVR are followed by four 8-bit operands to form 32-bit data to be written, and the order of sending the four 8-bit operands is data[7:0], data[15:8], data[23:16], and data[31:24].
[0011] In one embodiment of the present invention, the address setting instruction SSTAR is followed by two 8-bit operands, and the target address is a 16-bit address, wherein the lower 8 bits of the 16-bit address are sent first, and the higher 8 bits of the 16-bit address are sent later.
[0012] In one embodiment of the present invention, the 8-bit control word written by the control command instruction SSTCMD includes: a first control word for full-chip erasure, a second control word for MAIN sector erasure, and a third control word for NVR sector erasure.
[0013] In one embodiment of the present invention, the unlock instruction SKEY is followed by eight 8-bit operands. After receiving the eight 8-bit operands and satisfying the preset unlock rules, the target chip releases the erase and write restrictions on the MTP memory.
[0014] In one embodiment of the present invention, it further includes: The peripheral programmer controls the transmission timing of the 8-bit data bytes based on the MTP programming timing parameters, enabling the target chip to latch the corresponding 8-bit data and trigger the write enable signal under the conditions of address setup time Tads and write pulse width correlation time Twpw, so as to form the 32-bit write data of the next target address byte by byte; and the peripheral programmer prepares the next set of data to be programmed while sending the 8-bit data bytes used to control the programming timing, so that the write data of the next physical address is ready when the programming of one physical address is completed, thereby realizing continuous programming of the same row; wherein, the serial clock pin SCLK is output only when data bytes need to be sent, and is turned off during non-data transmission phases to reduce dynamic power consumption.
[0015] The technical solution of the present invention has the following advantages compared with the prior art: This invention discloses an MTP programming method based on serial communication, addressing the following shortcomings of existing solutions: the internal high-speed oscillator (HSI) must be continuously powered on, making clock gating difficult and resulting in high dynamic power consumption; it relies on HSI clock counting to generate the timing required for MTP operation, with the counting duration reaching tens of milliseconds, leading to a large chip area occupied by the internal counter resources; and it can only achieve single-time programming of MTP, making continuous programming difficult and resulting in low programming efficiency. This invention employs two-wire serial communication, requiring only two pins: SCLK (Serial Clock) and SDIO (Serial Data I / O). The MTP operation timing is generated by software control of the external programmer, replacing the clock counting method of the internal HSI oscillator, thereby reducing dependence on on-chip counting resources and saving chip area.
[0016] Furthermore, this invention allows for the simultaneous preparation of the next set of data to be programmed while the programmer sends 8 bits of data to control the MTP programming timing, thereby enabling continuous programming of the MTP and shortening the overall programming time. Only one operating clock exists throughout the entire process, namely SCLK, provided and input by the external programmer; and SCLK is only output when data transmission is required, and can be turned off during non-data transmission phases, thus reducing power consumption. Attached Figure Description
[0017] To make the content of this invention easier to understand, the invention will be further described in detail below with reference to specific embodiments and accompanying drawings.
[0018] Figure 1 This is a flowchart of the MTP programming method based on serial communication according to the present invention.
[0019] Figure 2 This is a schematic diagram of the MTP programming system based on serial communication according to the present invention.
[0020] Figure 3 This is a diagram of the data format of the present invention. Detailed Implementation
[0021] The present invention will be further described below with reference to the accompanying drawings and specific embodiments, so that those skilled in the art can better understand and implement the present invention. However, the embodiments described are not intended to limit the present invention.
[0022] In this invention, "several" means one or more, "multiple" means two or more, "greater than," "less than," "exceeding," etc., are understood to exclude the stated number; "above," "below," "within," etc., are understood to include the stated number. In the description of this invention, the terms "first" and "second" are used only to distinguish technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.
[0023] In this invention, unless otherwise explicitly defined, the terms "setting," "installing," and "connecting" should be interpreted broadly. For example, they can refer to a direct connection or an indirect connection through an intermediate medium; a fixed connection, a detachable connection, or an integrally formed connection; a mechanical connection, an electrical connection, or a connection capable of mutual communication; or the internal connection of two components or the interaction between two components. Those skilled in the art can reasonably determine the specific meaning of the above terms in this invention based on the specific content of the technical solution.
[0024] Example 1 Reference Figure 1 As shown, this embodiment provides an MTP programming method based on serial communication, which is applied to a target chip containing an MTP memory. The target chip communicates with the external programmer through the serial clock pin SCLK and the bidirectional serial data pin SDIO.
[0025] The method includes: S1. The peripheral programmer outputs the serial clock pin SCLK as the working clock and sends an 8-bit data byte (data[7:0]) to the target chip through the bidirectional serial data pin SDIO. S2. The target chip receives the 8-bit data byte and parses it into instruction code and operands in a preset serial instruction set inside the target chip; S3. Perform an erase operation, write operation, or read operation on the MTP memory according to the instruction code and its operands; As shown in Table 1, the preset serial instruction set includes: The first read instruction SLD_MAIN is used to read data from the MAIN space of the MTP memory; A second read instruction SLD_NVR is used to read data from the NVR space of the MTP memory; The first write instruction SST_MAIN is used to write data to the MAIN space of the MTP memory; The second write instruction SST_NVR is used to write data to the NVR space of the MTP memory; The SSTAR instruction is used to write a target address to the MTP operation address register to specify the target address for subsequent erase, write, or read operations. The control command instruction SSTCMD is used to write an 8-bit control word to the MTP control register to trigger the erase or write operation. And the unlock command SKEY.
[0026] Among them, "Data<- mtp_dout[31:0]" means reading 32 bits of data from the MTP read data output port and then sending it to the serial output path for return; "Data ->mtp_din[31:0]" means loading the data sent from the outside into the MTP write data input port; “Data ->mtp_ar[15:0]” means loading the address sent from the outside into the MTP operation address register; “Data ->mtp_cmd[7:0]” means loading the externally sent control word into the MTP control register; "Key<- {8{data}}" means receiving 8 bytes of data to form the unlock key.
[0027] Table 1: Preset Serial Instruction Set
[0028] Reference Figure 2 As shown, the MTP programming scheme based on serial communication of this invention is implemented collaboratively by an external programmer and the target chip. The external programmer establishes two-wire serial communication with the target chip through the serial clock signal SCLK and the bidirectional serial data line SDIO, and the programmer-side software generates the operation timing required for MTP erasure and programming. The target chip internally includes a transmit / receive engine, an MTP controller, and an MTP memory sequentially along the data and control links. The transmit / receive engine is used to complete the serial-to-parallel conversion and buffer management of the SDIO bitstream, forming an 8-bit data byte and outputting it to the MTP controller. The MTP controller is used to decode the opcode in the 8-bit data byte and organizes the instruction execution flow through its internal state machine, generating read, write, and erase control signals for the MTP memory. The MTP memory is used to complete the actual non-volatile memory read, programming, and erase operations and feeds back the execution status to the MTP controller. The power-on reset signal is used to initialize the transmit / receive engine, the MTP controller, its internal registers, and the state machine to ensure that the system enters a defined initial state after power-on.
[0029] In one embodiment, refer to Figure 3As shown, the waveform at the top is the serial clock signal SCLK. The waveforms D7, D6...D0 at the bottom are the eight data bits transmitted sequentially on the bidirectional serial data pin SDIO, forming an 8-bit data byte.
[0030] The falling edge of the serial clock pin SCLK output by the peripheral programmer is used to prepare data on the bidirectional serial data pin SDIO, and the rising edge of the serial clock pin SCLK is used to sample the data on the bidirectional serial data pin SDIO. The 8-bit data byte is transmitted in the order of sending the most significant bit first, followed by the least significant bit. Each data bit remains stable between adjacent rising edges of sampling, thereby achieving reliable serial byte transmission.
[0031] In one embodiment, the first read instruction SLD_MAIN and the second read instruction SLD_NVR are followed by four 8-bit operands to form 32 bits of data to be written, and the order in which the four 8-bit operands are sent is data[7:0], data[15:8], data[23:16], and data[31:24].
[0032] In one embodiment, the first write instruction SST_MAIN and the second write instruction SST_NVR are followed by four 8-bit operands to form 32 bits of data to be written, and the order in which the four 8-bit operands are sent is data[7:0], data[15:8], data[23:16], and data[31:24].
[0033] In one embodiment, the address setting instruction SSTAR is followed by two 8-bit operands, and the target address is a 16-bit address, with the lower 8 bits of the 16-bit address sent first and the higher 8 bits of the 16-bit address sent later.
[0034] In one embodiment, the 8-bit control word written by the control command instruction SSTCMD includes: The first control word used for full-chip erasure, such as 8'h10; The second control word used for erasing the MAIN sector, such as 8'h12; And a third control word, such as 8'h14, used for NVR sector erasure.
[0035] In one embodiment, the unlock instruction SKEY is followed by eight 8-bit operands. After receiving the eight 8-bit operands and satisfying the preset unlock rules, the target chip removes the erase and write restrictions on the MTP memory.
[0036] In one embodiment, it also includes: The peripheral programmer controls the transmission timing of the 8-bit data bytes based on the MTP programming timing parameters, enabling the target chip to latch the corresponding 8-bit data and trigger the write enable signal under the conditions of address setup time Tads and write pulse width correlation time Twpw, so as to form the 32-bit write data of the next target address byte by byte; and the peripheral programmer prepares the next set of data to be programmed while sending the 8-bit data bytes used to control the programming timing, so that the write data of the next physical address is ready when the programming of one physical address is completed, thereby realizing continuous programming of the same row; wherein, the serial clock pin SCLK is output only when data bytes need to be sent, and is turned off during non-data transmission phases to reduce dynamic power consumption.
[0037] MTP programming and erase operations have timing requirements. Taking programming as an example: The MTP programming timing is controlled by an external programmer, replacing the internal HSI timing of the chip. Specifically, when the address setup time Tads is met, the programmer sends 8 bits of data (data). The chip hardware logic pulls the write enable signal WR high at the corresponding moment and latches the 8 bits of data (data) as the lower 8 bits of the 32-bit write data for the next programming address [7:0]. When the write pulse width correlation time Twpw is met, the programmer sends another 8 bits of data (data). The chip hardware logic similarly pulls WR high and latches the 8 bits of data (data) as the middle 8 bits of the 32-bit write data for the next programming address [15:8]. Subsequently, data continues to be sent and latched according to the preset timing interval until the remaining bytes of the 32-bit write data are loaded. Through the above byte-level latching and timing control mechanism, when the programming operation of one physical address is completed, the 32 bits of data to be programmed for the next physical address are ready in advance, thereby enabling continuous programming on the same line and significantly shortening the overall programming time.
[0038] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.
[0039] This invention is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.
[0040] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.
[0041] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.
[0042] Finally, it should be noted that the above specific embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to examples, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.
Claims
1. A method for programming MTP based on serial communication, characterized in that, Applied to a target chip containing MTP memory, the target chip communicates with an external programmer via a serial clock pin SCLK and a bidirectional serial data pin SDIO. The method includes: The peripheral programmer outputs the serial clock pin SCLK as the working clock and sends an 8-bit data byte to the target chip through the bidirectional serial data pin SDIO. The target chip receives the 8-bit data byte and parses it into instruction codes and operands within a preset serial instruction set; According to the instruction code and its operands, an erase operation, a write operation or a read operation is performed on the MTP memory; The preset serial instruction set includes: The first read instruction SLD_MAIN is used to read data from the MAIN space of the MTP memory; A second read instruction SLD_NVR is used to read data from the NVR space of the MTP memory; The first write instruction SST_MAIN is used to write data to the MAIN space of the MTP memory; The second write instruction SST_NVR is used to write data to the NVR space of the MTP memory; The SSTAR instruction is used to write a target address to the MTP operation address register to specify the target address for subsequent erase, write, or read operations. The control command instruction SSTCMD is used to write an 8-bit control word to the MTP control register to trigger the erase or write operation. And the unlock command SKEY.
2. The MTP programming method based on serial communication according to claim 1, characterized in that, The falling edge of the serial clock pin SCLK output by the peripheral programmer is used to prepare the data on the bidirectional serial data pin SDIO, and the rising edge of the serial clock pin SCLK is used to sample the data on the bidirectional serial data pin SDIO. The 8-bit data bytes are transmitted in the order of sending the high bit first and then the low bit.
3. The MTP programming method based on serial communication according to claim 1, characterized in that, The first read instruction SLD_MAIN and the second read instruction SLD_NVR are followed by four 8-bit operands to form 32 bits of data to be written, and the order of sending the four 8-bit operands is data[7:0], data[15:8], data[23:16], and data[31:24].
4. The MTP programming method based on serial communication according to claim 1, characterized in that, The first write instruction SST_MAIN and the second write instruction SST_NVR are followed by four 8-bit operands to form 32 bits of data to be written, and the order of sending the four 8-bit operands is data[7:0], data[15:8], data[23:16], and data[31:24].
5. The MTP programming method based on serial communication according to claim 1, characterized in that, The address setting instruction SSTAR is followed by two 8-bit operands, and the target address is a 16-bit address. The lower 8 bits of the 16-bit address are sent first, and the higher 8 bits of the 16-bit address are sent later.
6. The MTP programming method based on serial communication according to claim 1, characterized in that, The 8-bit control word written by the control command instruction SSTCMD includes: a first control word for full-chip erasure, a second control word for MAIN sector erasure, and a third control word for NVR sector erasure.
7. The MTP programming method based on serial communication according to claim 1, characterized in that, The unlock command SKEY is followed by eight 8-bit operands. After receiving the eight 8-bit operands and meeting the preset unlock rules, the target chip removes the erase and write restrictions on the MTP memory.
8. The MTP programming method based on serial communication according to claim 1, characterized in that, Also includes: The peripheral programmer controls the transmission timing of the 8-bit data bytes based on the MTP programming timing parameters, enabling the target chip to latch the corresponding 8-bit data and trigger the write enable signal under the conditions of address setup time Tads and write pulse width correlation time Twpw, so as to form the 32-bit write data of the next target address byte by byte; and the peripheral programmer prepares the next set of data to be programmed while sending the 8-bit data bytes used to control the programming timing, so that the write data of the next physical address is ready when the programming of one physical address is completed, thereby realizing continuous programming of the same row; wherein, the serial clock pin SCLK is output only when data bytes need to be sent, and is turned off during non-data transmission phases to reduce dynamic power consumption.