Inverter and parallel networking method, device and system thereof

Abstract

The invention discloses an inverter and a parallel networking method, device and system thereof, and relates to the technical field of power electronics, and the method comprises the steps: detecting whether a current main controller is a target main controller or not after a current inverter is powered on; if yes, setting a parallel operation identifier of the current main controller as a preset main inverter identifier, and sending a first message on a parallel operation bus; according to second messages returned by the main controllers of the other inverters and received from the parallel operation bus, configuring parallel operation identifiers corresponding to the main controllers of the other inverters through the parallel operation bus; sending a target internal communication signal to each slave controller in the current inverter through a preset internal communication bus according to the parallel operation identifier of the current master controller so as to configure the parallel operation identifier of each slave controller; according to the invention, through the overturning period configuration of the signal in the preset internal communication bus between the master controller and the slave controller in the inverter, the parallel networking of the inverter can be conveniently and rapidly realized, and the configuration cost is saved.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to an inverter and its parallel grid connection method, apparatus and system. Background Technology

[0002] With the gradual improvement of photovoltaic power generation systems and the continuous refinement of system solutions, expanding the system scale has become a necessary step. Therefore, the solution of multiple photovoltaic inverters connected in parallel has been proposed and widely applied in various scenarios. For example... Figure 1 The diagram illustrates a common multi-inverter parallel system. This system connects multiple inverters in parallel via a parallel bus, enabling data exchange between the inverters and thus achieving energy scheduling and control of other functions of the entire system.

[0003] like Figure 2 As shown, an inverter (device) may internally include a master controller (MCU Master), n slave controllers (MCU Slave 1-n), and external Flash memory. Each controller (master controller or slave master controller) is assigned a unique local identifier (such as a coded ID) based on its function to facilitate targeted filtering of useful information in the communication network. However, in a system where multiple inverters are connected in parallel, many identical local identifiers may appear. Therefore, it is necessary to add a parallel identifier to each inverter to enable each controller in the parallel bus communication network to selectively filter useful information.

[0004] In related technologies, there are two schemes for setting parallel operation identifiers: 1) Before powering on the parallel system, disconnect the parallel bus of the inverter; after powering on, set the parallel operation identifier for each inverter individually; after setting, reconnect the external parallel bus. 2) After powering on the parallel system, set one inverter as the master. The master controller of the master inverter obtains the identification codes of all controllers on the parallel bus by querying (the feature code is a piece of data generated by the controller based on the device serial number using a special algorithm; all controllers within the same device have the same feature code). Controllers with the same feature code are set to the same parallel operation identifier, and controllers with different identification codes are set to different parallel operation identifiers. However, the operation of scheme 1 is complex, requiring individual setting for each device in the parallel system; although scheme 2 eliminates the operation of individual setting for each device, since each controller must read the feature code stored in its corresponding external memory (such as Flash memory), and since not all controllers need to be configured with Flash memory for normal operation, this scheme greatly increases the equipment cost.

[0005] Therefore, how to conveniently and quickly achieve parallel networking of inverters and save configuration costs is an urgent problem to be solved. Summary of the Invention

[0006] The purpose of this invention is to provide an inverter and its parallel networking method, apparatus and system to facilitate rapid parallel networking of inverters and save configuration costs.

[0007] To solve the above-mentioned technical problems, the present invention provides a method for parallel networking of inverters, comprising:

[0008] After the current inverter is powered on, it is checked whether the current master controller is the target master controller; where the current inverter is any inverter on the parallel bus, and the current master controller is the master controller in the current inverter;

[0009] If so, the current main controller's parallel operation identifier is set to the preset main inverter identifier, and a first message is sent on the parallel operation bus;

[0010] Based on the second message returned by the master controller of other inverters received from the parallel bus, the parallel identification corresponding to each master controller of the other inverters is configured through the parallel bus; wherein, the other inverters are inverters other than the current inverter on the parallel bus; the second message includes the feature code of each master controller of the other inverters; after the configuration is completed, the parallel identification of each inverter on the parallel bus is different;

[0011] Based on the current master controller's parallel operation identifier, a target internal communication signal is sent to each slave controller in the current inverter via a preset internal communication bus to configure the parallel operation identifier of each slave controller in the current inverter; wherein, the toggle period of the target internal communication signal is the preset toggle period corresponding to the current master controller's parallel operation identifier.

[0012] On the other hand, the second message also includes the current paralleling identifier of each of the other inverters' main controllers. The step of configuring the paralleling identifier corresponding to each of the other inverters' main controllers via the paralleling bus, based on the second message returned from the other inverters' main controllers received from the paralleling bus, includes:

[0013] Determine whether the current parallel operation identifier in the current second message is a preset initial identifier or a recorded identifier; wherein, the current second message is any of the second messages;

[0014] If it is the preset initial identifier or the recorded identifier, then assign an unrecorded identifier to the main controller corresponding to the current second message, and record the unrecorded identifier;

[0015] Based on the feature code in the current second message and the unrecorded identifier, configure and send the current third message on the parallel bus, so that the master controller corresponding to the current second message configures the parallel identifier to the unrecorded identifier according to the current third message.

[0016] On the other hand, the unrecorded identifier is a preset slave inverter identifier in a preset slave inverter identifier queue arranged in a preset allocation order, and the current third message includes the feature code in the current second message, the unrecorded identifier, and the current number of parallel units.

[0017] On the other hand, after detecting whether the current master controller is the target master controller, the method further includes:

[0018] If the current master controller is not the target master controller, then the first message is received from the parallel bus;

[0019] Based on the first message, configure the second message of the current master controller, and send the second message to the target master controller through the parallel bus;

[0020] Receive a target third message from the parallel bus; wherein the feature code in the target third message is the feature code of the current master controller;

[0021] If there is an unrecorded identifier in the target third message, the paralleling identifier of the current master controller is adjusted to the unrecorded identifier in the target third message, and the target internal communication signal is sent to each slave controller in the current inverter through the preset internal communication bus according to the paralleling identifier of the current master controller.

[0022] If there is no unrecorded identifier in the target third message, then the target internal communication signal is sent to each slave controller in the current inverter through the preset internal communication bus according to the parallel identifier of the current master controller.

[0023] On the other hand, detecting whether the current master controller is the target master controller includes:

[0024] Detect whether the current main controller is connected to the target communication component;

[0025] If the target communication component is connected, then the current main controller is determined to be the target main controller;

[0026] If the target communication component is not connected, it is determined that the current master controller is not the target master controller.

[0027] On the other hand, the preset internal communication bus is a general-purpose input / output bus. The step of sending target internal communication signals to each slave controller in the current inverter via the preset internal communication bus, based on the parallel operation identifier of the current master controller, to configure the parallel operation identifier of each slave controller in the current inverter, includes:

[0028] The target internal communication signal is sent from the general input / output bus to each slave controller in the current inverter, so that each slave controller in the current inverter determines and configures its own parallel identification according to the flip-flop cycle of the target internal communication signal.

[0029] On the other hand, the step of setting the current main controller's parallel operation identifier to a preset main inverter identifier, and sending the first message on the parallel operation bus, further includes:

[0030] If the second message is not received within a preset time period, a third message is sent through the parallel bus, and the step of sending the target internal communication signal from the general purpose input / output port bus to each slave controller in the current inverter is executed, so that each slave controller in the current inverter can detect the toggle cycle of the target internal communication signal from the general purpose input / output port bus according to the third message.

[0031] The present invention also provides a parallel grid connection device for inverters, applied to a current main controller, comprising:

[0032] The target detection module is used to detect whether the current main controller is the target main controller after the current inverter is powered on; wherein the current inverter is any inverter on the parallel bus, and the current main controller is the main controller in the current inverter;

[0033] The information sending module is used to set the parallel identifier of the current main controller to a preset main inverter identifier if it is the target main controller, and send a first message on the parallel bus;

[0034] The main control configuration module is used to configure the parallel identification corresponding to each of the main controllers of the other inverters through the parallel bus according to the second message returned by the main controllers of the other inverters received from the parallel bus; wherein, the other inverters are inverters other than the current inverter on the parallel bus; the second message includes the feature code of each of the main controllers of the other inverters; after the configuration is completed, the parallel identification of each inverter on the parallel bus is different;

[0035] The slave configuration module is used to send target internal communication signals to each slave controller in the current inverter through a preset internal communication bus according to the parallel operation identifier of the current master controller, so as to configure the parallel operation identifier of each slave controller in the current inverter; wherein, the flip period of the target internal communication signal is the preset flip period corresponding to the parallel operation identifier of the current master controller.

[0036] The present invention also provides an inverter, comprising:

[0037] Memory, used to store computer programs;

[0038] The main controller is used to execute the computer program to implement the steps of the parallel networking method of the inverter as described above.

[0039] In addition, the present invention also provides a parallel grid system for inverters, comprising: at least one inverter as described above;

[0040] In this inverter, the main controller and the slave controller are connected to each other via a parallel bus and a preset internal communication bus, respectively, and different inverters are connected to each other via the parallel bus.

[0041] The present invention provides a method for parallel networking of inverters, comprising: after the current inverter is powered on, detecting whether the current master controller is a target master controller; wherein the current inverter is any inverter on the parallel bus, and the current master controller is the master controller in the current inverter; if so, setting the parallel identifier of the current master controller to a preset master inverter identifier, and sending a first message on the parallel bus; configuring the parallel identifiers corresponding to the master controllers of other inverters according to a second message returned from the master controllers of other inverters received from the parallel bus; wherein the other inverters are inverters other than the current inverter on the parallel bus; the second message includes the feature code of the master controllers of each other inverter; after configuration, the parallel identifiers of each inverter on the parallel bus are different; according to the parallel identifier of the current master controller, sending a target internal communication signal to each slave controller in the current inverter through a preset internal communication bus to configure the parallel identifiers of each slave controller in the current inverter; wherein the toggle period of the target internal communication signal is a preset toggle period corresponding to the parallel identifier of the current master controller.

[0042] As can be seen, this invention utilizes the preset internal communication bus between the main controller and slave controllers within the inverter. By configuring the switching cycle of the signal, a grid connection identifier can be assigned to each slave controller within the inverter. This enables convenient and rapid parallel networking of inverters, avoiding the need to configure a separate external memory for each controller, thus saving configuration costs. Furthermore, this invention also provides an inverter and its parallel networking device and system, which also possess the aforementioned beneficial effects. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0044] Figure 1 This is a schematic diagram of a multi-unit parallel network of inverters in related technologies.

[0045] Figure 2 This is a schematic diagram of the internal structure of an inverter in related technologies.

[0046] Figure 3 A flowchart illustrating a method for parallel networking of an inverter provided in an embodiment of the present invention;

[0047] Figure 4 This is a flowchart illustrating another method for parallel networking of inverters provided in an embodiment of the present invention;

[0048] Figure 5 This is a schematic diagram illustrating a parallel operation identifier configuration for a controller, provided as an embodiment of the present invention.

[0049] Figure 6 This is a structural block diagram of a parallel grid connection device for an inverter provided in an embodiment of the present invention;

[0050] Figure 7 This is a schematic diagram of an inverter provided in an embodiment of the present invention. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0052] Please refer to Figure 3 , Figure 3 A flowchart illustrating a method for parallel grid connection of an inverter provided in an embodiment of the present invention. The method may include:

[0053] Step 101: After the current inverter is powered on, check whether the current main controller is the target main controller; if so, proceed to step 102.

[0054] Here, the current inverter is any inverter on the parallel bus, and the current master controller is the master controller in the current inverter.

[0055] It is understood that the target master controller in this embodiment can be a master controller used for parallel identification (or parallel address) allocation, that is, the master controller of the inverter that acts as the master among all inverters on the parallel bus. In other words, the target master controller can be a pre-set master controller used for parallel identification allocation among the master controllers of all inverters on the parallel bus.

[0056] Correspondingly, the specific selection of the target master controller in this embodiment can be set by the designer according to the usage scenario and user needs. For example, all inverters on the parallel bus can communicate with external devices through a single communication component (i.e., the target communication component). The target master controller can be the master controller connected to the target communication component. That is, the inverter acting as the master among all inverters on the parallel bus can be configured with a target master controller and a target communication component (such as a wireless communication component). This allows centralized monitoring of the parallel system to be achieved with only one target communication component, reducing the need for communication components in all inverters acting as slaves. The target master controller can also be a master controller determined in other ways; this embodiment does not impose any restrictions on this.

[0057] It should be noted that the specific method for detecting whether the current master controller is the target master controller in this step can be set by the designer according to the usage scenario and user requirements. For example, if the target master controller is a master controller connected to the target communication component, this step can detect whether the current master controller is connected to the target communication component. Figure 4 The power-on identification process for the communication component is as follows: if a target communication component is connected, the current main controller is determined to be the target main controller, and the process can proceed to step 102; if no target communication component is connected, the current main controller is determined not to be the target main controller.

[0058] Correspondingly, this embodiment does not limit the specific controller types of the master controller and slave controller in the inverter. For example, the master controller and slave controller can be MCU (Microcontroller Unit) or other control devices, such as CPU (Central Processing Unit). This embodiment does not impose any restrictions on this.

[0059] Step 102: Set the current main controller's parallel operation identifier to the preset main inverter identifier, and send the first message on the parallel operation bus.

[0060] Among them, the first message in this step (such as...) Figure 4 Information 1) can be a message used to query information (such as a signature) of the master controller in an inverter acting as a slave on the parallel bus; the first message can include the parallel identifier of the current master controller (i.e., the preset master inverter identifier) ​​and / or the signature, so that the master controllers of other inverters (i.e., slave master controllers) can return a second message to the current master controller (i.e., master master controller). In this embodiment, the preset master inverter identifier can be a pre-set parallel identifier of the inverter acting as the master, such as the preset master inverter identifier being 1.

[0061] Correspondingly, the specific message type of the first message in this embodiment can be set by the designer according to the practical scenario and user needs. For example, it can be set according to the specific bus type of the parallel bus. For example, the parallel bus can adopt buses such as CAN (Controller Area Network) bus and Ethernet bus. The first message in this embodiment can be a broadcast message.

[0062] Step 103: Based on the second message returned by the main controller of other inverters received from the parallel bus, configure the parallel identifier of each of the other inverter's main controllers via the parallel bus.

[0063] Among them, the other inverters are the inverters other than the current inverter on the parallel bus; the second message includes the signature of the main controller of each other inverter; after the configuration is completed, the parallel identification of each inverter on the parallel bus is different.

[0064] It is understood that in this embodiment, when the current inverter (i.e., the master controller) forms a parallel system with other inverters via the parallel bus, the other inverters connected on the parallel bus (i.e., the slave controllers) will reply with a second message (such as...) after receiving the first message. Figure 4 Information 2) enables the current inverter to configure the corresponding parallel operation identifier for each other inverter based on the second information.

[0065] Correspondingly, the second message can be a point-to-point instruction sent to the current inverter, such as the main controller with parallel ID 1. The specific content of the second message in this step can be set by the designer according to the practical scenario and user needs. For example, the second message may include the unique identifiers of the main controllers of each other inverter; it may also include the parallel identifier and / or unique identifier of the current inverter from the first message; and it may also include the current parallel identifier (i.e., the current parallel identifier) ​​of the main controllers of each other inverter. This embodiment does not impose any limitations on this.

[0066] Correspondingly, the specific method for configuring the parallel identification of each other inverter's main controller via the parallel bus in this step can be set by the designer according to the practical scenario and user needs. For example, the corresponding parallel identification can be assigned to each slave main controller according to the different received feature codes in a preset allocation order; and the third message including the corresponding parallel identification can be sent to each slave main controller via the parallel bus using the feature codes of each slave main controller.

[0067] In some other embodiments, when the second message also includes the current parallel operation identifier of the main controller of each other inverter, this step can determine whether the current parallel operation identifier in the current second message is a preset initial identifier or a recorded identifier; wherein, the current second message is any second message; if it is a preset initial identifier or a recorded identifier, then an unrecorded identifier is assigned to the main controller corresponding to the current second message, and the unrecorded identifier is recorded; according to the feature code and the unrecorded identifier in the current second message, the current third message is configured and sent on the parallel bus, so that the main controller corresponding to the current second message configures the parallel operation identifier to an unrecorded identifier according to the current third message.

[0068] For example, after receiving the second message from the slave master controller, the master controller will record the received information. If the parallel ID in the message is 0 or is a duplicate of a previously recorded parallel ID (such as a recorded identifier), the master controller will reassign the parallel ID with the corresponding feature code. After the reassignment is complete, a third message will be sent (such as...). Figure 4 Information 3 in the document is used to configure the parallel ID of each inverter acting as a slave.

[0069] Correspondingly, the specific message content of the current third message can be set by the designer. For example, the current third message can be a broadcast instruction, which may include the previously received slave master controller feature code (i.e., the feature code in the current second message) and the assigned parallel identifier (i.e., the unrecorded identifier). When the unrecorded identifier is a preset slave inverter identifier in a preset slave inverter identifier queue arranged in a preset allocation order, the current third message may also include the currently identified total number of parallel connections (m, i.e., the current number of parallel connections), so that each slave master controller can determine whether the parallel identifier in the message is correct based on the current number of parallel connections.

[0070] Step 104: Based on the parallel operation identifier of the current master controller, send the target internal communication signal to each slave controller in the current inverter through the preset internal communication bus to configure the parallel operation identifier of each slave controller in the current inverter.

[0071] The flip cycle of the target's internal communication signal is the preset flip cycle corresponding to the parallel operation identifier of the current main controller.

[0072] It is understood that in this embodiment, the master controller and slave controller can configure the parallel operation identifier of each slave controller in their respective inverters according to their respective parallel operation identifiers by the flip-up cycle of the target internal communication signal sent from the preset internal communication bus. If the parallel operation identifiers of the master controller and slave controllers in the inverter are the same after the configuration is completed, that is, the parallel operation identifier of the current master controller is the same as the parallel operation identifier of each slave controller in the current inverter.

[0073] In this embodiment, the target internal communication signal can be a signal used to configure the parallel operation identifier of the slave controller in the inverter. In this embodiment, the master controller and slave controller in the inverter can be connected through a preset internal communication bus, so that the slave controller in the inverter can determine and configure its respective parallel operation identifier according to the toggle cycle of the target internal communication signal received from the preset internal communication bus.

[0074] Correspondingly, the specific method for sending target internal communication signals to each slave controller in the current inverter via a preset internal communication bus based on the current master controller's parallel operation identifier in this step can be set by the designer. For example, the preset internal communication bus can use a GPIO (General Purpose Input / Output) bus. That is, in this step, the target internal communication signal (GPIO signal) can be sent via the GPIO bus based on the current master controller's parallel operation identifier, so that each slave controller in the current inverter determines and configures its own parallel operation identifier according to the toggle period of the target internal communication signal. For example, the current master controller can send GPIO signals from the GPIO bus to each slave controller in the current inverter. The toggle period of this GPIO signal is the preset toggle period corresponding to the current master controller's parallel operation identifier, so that each slave controller in the current inverter determines and configures its own parallel operation identifier according to the toggle period of this GPIO signal.

[0075] Accordingly, the preset switching period in this embodiment can be the switching period corresponding to different pre-set parallel identifiers (such as the preset slave inverter identifier and the preset master inverter identifier). The specific number and time value of the preset switching period in this embodiment can be set by the designer according to the practical scenario and user needs. For example, it can be set to a preset switching period of 2ms corresponding to a parallel ID of 1 (i.e., the parallel identifier); a preset switching period of 3ms corresponding to a parallel ID of 2, etc. This embodiment does not impose any restrictions on this. That is to say, the switching period of the target's internal communication signal (such as...) in this embodiment... Figure 3 The 2ms, 3ms, 4ms or 5ms in the code are variable periods (i.e., the detection period is variable), which can be flexibly configured by designers or users according to their needs. As long as the master controller and slave controller record the correspondence between each preset flip period and the parallel operation identifier in advance, the transmission of the parallel operation identifier can be realized through the configuration of the flip period of the internal communication signal of the target, making the configuration of the parallel operation identifier more flexible and convenient, and requiring less computing resources.

[0076] For example, in an inverter, the slave controller (MCU Slave) keeps the GPIO port connected in parallel with the master controller (MCU Master) high after power-on, so that the MCU Master can control the GPIO; after the MCU Master completes the parallel ID setting, it controls the toggle cycle of the GPIO port signal (i.e., the GPIO signal) in 1ms increments (the time is configurable); Figure 5 As shown, if the MCU Slave in one inverter detects a signal toggle period of 2ms, the parallel operation ID is 1; if the MCU Slave in another inverter detects a signal toggle period of 3ms, the parallel operation ID is 2; if the MCU Slave in another inverter detects a signal toggle period of 4ms, the parallel operation ID is 3, and so on.

[0077] Furthermore, due to the impact on detection accuracy, the switching period of the target's internal communication signal detected by the MCU Slave can be appropriately increased with a margin. For example, if the MCU Slave detects a signal switching period of 2ms ± 0.2ms, the parallel operation ID is 1; if the MCU Slave detects a signal switching period of 3ms ± 0.2ms, the parallel operation ID is 2; if the MCU Slave detects a signal switching period of 4ms ± 0.2ms, the parallel operation ID is 3, and so on. To make the MCU Slave detection more accurate and stable, filtering can be performed after the above conditions are met. Only when the same parallel operation ID is met multiple times consecutively can its own parallel operation ID be set. In other words, when the current master controller configures the parallel operation identifiers of each slave controller in the current inverter, it can continuously send target internal communication signals to each slave controller through a preset internal communication bus. When the slave controller in the current inverter continuously detects a preset number of target signals, it can determine and configure its own parallel operation identifier according to the target period range corresponding to the flip period of the target signal. The target period range is any preset flip period range (such as 2ms±0.2ms and 3ms±0.2ms mentioned above). The flip period of the target signal is within the target period range, that is, the target signal is the target internal communication signal detected by the slave controller, and the preset number of target signals continuously detected by the slave controller are all within the same preset flip period range.

[0078] Correspondingly, the slave controller in the inverter can detect the target internal communication signal on the preset internal communication bus after detecting the third message, so as to reduce useless detection. For example, after the MCU Slave completes setting its own parallel ID, it no longer detects the toggle cycle unless it receives the third message again, such as a message using the third message format or a message using the third message format and whose feature code is the feature code of the master controller in the inverter.

[0079] Correspondingly, if the MCU Slave detects that the level switching period of the GPIO signal is greater than the preset period threshold, such as (m+1) ms, it can determine that there is GPIO wiring damage or other issues, and the parallel address is unavailable. It can then send an alarm message to the host MCU Master (i.e., the host controller).

[0080] It should be noted that, in the case where the current master controller is not the target master controller in this embodiment, a first message can be received from the parallel bus; based on the first message, a second message is configured for the current master controller, and the second message is sent to the target master controller via the parallel bus; a target third message is received from the parallel bus; wherein, the feature code in the target third message is the feature code of the current master controller; if there is an unrecorded identifier in the target third message (i.e., the parallel identifier assigned to the current master controller by the target master controller), the parallel identifier of the current master controller is adjusted to the unrecorded identifier in the target third message, and based on the adjusted parallel identifier of the current master controller, a target internal communication signal is sent to each slave controller in the current inverter via a preset internal communication bus to configure the parallel identifier of each slave controller in the current inverter. Correspondingly, the current master controller can also record the unrecorded identifier as its own parallel identifier.

[0081] Correspondingly, in some embodiments, when the current master controller (i.e., the slave master controller) does not have an unrecorded identifier in the target third message received from the parallel bus (e.g., there is no parallel identifier assigned to the current master controller or there is a parallel identifier already recorded by the current master controller), it sends a target internal communication signal to each slave controller in the current inverter through a preset internal communication bus based on the current master controller's parallel identifier, in order to configure the parallel identifier of each slave controller in the current inverter. In other embodiments, when the current master controller (i.e., the slave master controller) does not receive the target third message within a preset confirmation time after sending the second message, it sends a target internal communication signal to each slave controller in the current inverter through a preset internal communication bus based on the current master controller's parallel identifier, in order to configure the parallel identifier of each slave controller in the current inverter.

[0082] Furthermore, in this embodiment, after step 102, it may also include: if the second message is not received within a preset time period, a third message is sent through the parallel bus, and step 104 is executed, so that each slave controller in the current inverter detects the toggle cycle of the target internal communication signal from the preset internal communication bus according to the third message, such as detecting the toggle cycle of the target internal communication signal (i.e., GPIO signal) from the GPIO bus.

[0083] For example, in a single-unit system where only the current inverter is connected on the parallel bus, when the MCU Master detects the target communication module, it can set the parallel ID to 1 and control the toggle period of the GPIO signal to 2ms. Since there is no second message reply after sending the first message on the parallel bus, if there is no second message reply after a certain period of time (i.e., a preset time period), the MCU Master will send a third message. The third message may include the MCU Master's feature code, the parallel ID corresponding to the feature code, and the current total number of parallel units. After receiving the third message, the MCU Slave starts to detect the GPIO toggle period and sets its own parallel ID.

[0084] In this embodiment, the present invention utilizes the preset internal communication bus between the main controller and the slave controller inside the inverter. By configuring the switching cycle of the signal, a grid connection identifier can be assigned to the slave controller in each inverter. This enables convenient and rapid parallel networking of inverters, avoiding the need to configure an external memory for each controller, thus saving configuration costs.

[0085] Corresponding to the above method embodiments, this invention also provides a parallel networking device for inverters. The parallel networking device for inverters described below can be referred to in correspondence with the parallel networking method for inverters described above.

[0086] Please refer to Figure 6 , Figure 6 This is a structural block diagram of a parallel grid connection device for an inverter provided in an embodiment of the present invention. The device is applied to the current main controller and may include:

[0087] The target detection module 10 is used to detect whether the current main controller is the target main controller after the current inverter is powered on; wherein the current inverter is any inverter on the parallel bus, and the current main controller is the main controller in the current inverter;

[0088] The information sending module 20 is used to set the parallel identifier of the current main controller to the preset main inverter identifier if it is the target main controller, and send the first message on the parallel bus.

[0089] The main control configuration module 30 is used to configure the parallel identification corresponding to the main controller of each other inverter through the parallel bus according to the second message returned by the main controller of other inverters received from the parallel bus; wherein, other inverters are inverters other than the current inverter on the parallel bus; the second message includes the feature code of the main controller of each other inverter; after the configuration is completed, the parallel identification of each inverter on the parallel bus is different;

[0090] The slave configuration module 40 is used to send target internal communication signals to each slave controller in the current inverter through a preset internal communication bus according to the parallel operation identifier of the current master controller, so as to configure the parallel operation identifier of each slave controller in the current inverter; wherein, the flip period of the target internal communication signal is the preset flip period corresponding to the parallel operation identifier of the current master controller.

[0091] In other embodiments, the second message also includes the current parallel operation identifier of the main controller of each of the other inverters, and the main controller configuration module 30 may include:

[0092] The identifier determination submodule is used to determine whether the current parallel operation identifier in the current second message is a preset initial identifier or a recorded identifier; wherein, the current second message is any second message;

[0093] The identification and recording submodule is used to assign an unrecorded identifier to the main controller corresponding to the current second message if the identifier is a preset initial identifier or a recorded identifier, and to record the unrecorded identifier.

[0094] The identifier configuration submodule is used to configure and send the current third message on the parallel bus according to the feature code and unrecorded identifier in the current second message, so that the master controller corresponding to the current second message will configure the parallel identifier as the unrecorded identifier according to the current third message.

[0095] In other embodiments, the unrecorded identifier is a preset slave inverter identifier in a preset slave inverter identifier queue arranged in a preset allocation order, and the current third message includes the feature code, the unrecorded identifier, and the current number of parallel units in the current second message.

[0096] In other embodiments, the device may further include:

[0097] The first message receiving module is used to receive the first message from the parallel bus if the current master controller is not the target master controller;

[0098] The message configuration module is used to configure the second message of the current master controller according to the first message, and send the second message to the target master controller through the parallel bus;

[0099] The second message receiving module is used to receive the target third message from the parallel bus; wherein the feature code in the target third message is the feature code of the current main controller;

[0100] The first slave control module is used to adjust the parallel operation identifier of the current master controller to the unrecorded identifier in the target third message if there is an unrecorded identifier in the target third message, and send the target internal communication signal to each slave controller in the current inverter through the preset internal communication bus according to the adjusted parallel operation identifier of the current master controller.

[0101] The second slave control module is used to send the target internal communication signal to each slave controller in the current inverter through a preset internal communication bus if there is no unrecorded identifier in the target third message.

[0102] In other embodiments, the target detection module 10 may be specifically used to detect whether the current main controller is connected to a target communication component; if a target communication component is connected, the current main controller is determined to be the target main controller; if no target communication component is connected, the current main controller is determined not to be the target main controller.

[0103] In other embodiments, the preset internal communication bus is a general-purpose input / output port bus. The slave configuration module 40 can be specifically used to send target internal communication signals from the general-purpose input / output port bus to each slave controller in the current inverter, so that each slave controller in the current inverter determines and configures its own parallel operation identifier according to the flip-flop cycle of the target internal communication signal.

[0104] In other embodiments, the device may further include:

[0105] The stand-alone configuration module is used to send a third message through the parallel bus and send a start signal to the slave control configuration module 40 if the second message is not received within a preset time period, so that each slave controller in the current inverter can detect the general input / output port signal from the general input / output port bus according to the third message.

[0106] In this embodiment, the present invention utilizes the preset internal communication bus between the main controller and the slave controller inside the inverter. By configuring the switching cycle of the signal, a grid connection identifier can be assigned to the slave controller in each inverter. This enables convenient and rapid parallel networking of inverters, avoiding the need to configure an external memory for each controller, thus saving configuration costs.

[0107] Corresponding to the above method embodiments, this invention also provides an inverter. The inverter described below and the parallel networking method of the inverter described above can be referred to each other.

[0108] Please refer to Figure 7 , Figure 7 This is a schematic diagram of an inverter provided in an embodiment of the present invention. The inverter may include:

[0109] Memory D1 is used to store computer programs;

[0110] The main controller D2 is used to execute computer programs to implement the steps of the inverter parallel networking method provided in the above method embodiments.

[0111] The inverter provided in this embodiment may further include at least one slave controller, which is connected to the master controller via a parallel bus and a preset internal communication bus, respectively.

[0112] Corresponding to the above method embodiments, this invention also provides a parallel networking system for inverters. The parallel networking system for inverters described below can be referred to in correspondence with the parallel networking method for inverters described above.

[0113] A parallel grid-connected inverter system includes: at least one inverter as provided in the above embodiments;

[0114] In this inverter, the main controller and the slave controller are connected to each other via a parallel bus and a preset internal communication bus, respectively, and different inverters are connected to each other via a parallel bus.

[0115] Corresponding to the above method embodiments, this invention also provides a computer program product. The computer program product described below and the inverter parallel networking method described above can be referred to each other.

[0116] A computer program product includes a computer program / instructions that, when executed by a processor, implement the steps of the parallel networking method for inverters provided in the above-described method embodiments.

[0117] Corresponding to the above method embodiments, this invention also provides a computer-readable storage medium. The computer-readable storage medium described below and the inverter parallel networking method described above can be referred to each other.

[0118] A computer-readable storage medium storing a computer program, which, when executed by a processor, implements the steps of the inverter parallel networking method provided in the above-described method embodiments.

[0119] The computer-readable storage medium can specifically be a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, or any other readable storage medium capable of storing program code.

[0120] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus, inverter, system, computer-readable storage medium, and computer program products disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the descriptions are relatively simple, and relevant details can be found in the method section.

[0121] The present invention has been described in detail above as an inverter and its parallel grid connection method, apparatus, and system. Specific examples have been used to illustrate the principles and implementation methods of the invention. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of the present invention. It should be noted that those skilled in the art can make various improvements and modifications to the present invention without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of the present invention.

Claims

1. A method for parallel grid connection of inverters, characterized in that, include: After the current inverter is powered on, it is checked whether the current master controller is the target master controller; where the current inverter is any inverter on the parallel bus, and the current master controller is the master controller in the current inverter; If so, the current main controller's parallel operation identifier is set to the preset main inverter identifier, and a first message is sent on the parallel operation bus; Based on the second message returned by the master controller of other inverters received from the parallel bus, the parallel identification corresponding to each master controller of the other inverters is configured through the parallel bus; wherein, the other inverters are inverters other than the current inverter on the parallel bus; the second message includes the feature code of each master controller of the other inverters; after the configuration is completed, the parallel identification of each inverter on the parallel bus is different; Based on the current master controller's parallel operation identifier, a target internal communication signal is sent to each slave controller in the current inverter via a preset internal communication bus to configure the parallel operation identifier of each slave controller in the current inverter; wherein, the toggle period of the target internal communication signal is the preset toggle period corresponding to the current master controller's parallel operation identifier.

2. The method for parallel grid connection of inverters according to claim 1, characterized in that, The second message also includes the current parallel identifier of each of the other inverters' main controllers. The step of configuring the parallel identifier corresponding to each of the other inverters' main controllers via the parallel bus, based on the second message returned from the other inverters' main controllers received from the parallel bus, includes: Determine whether the current parallel operation identifier in the current second message is a preset initial identifier or a recorded identifier; wherein, the current second message is any of the second messages; If it is the preset initial identifier or the recorded identifier, then assign an unrecorded identifier to the main controller corresponding to the current second message, and record the unrecorded identifier; Based on the feature code in the current second message and the unrecorded identifier, configure and send the current third message on the parallel bus, so that the master controller corresponding to the current second message configures the parallel identifier to the unrecorded identifier according to the current third message.

3. The method for parallel grid connection of inverters according to claim 2, characterized in that, The unrecorded identifier is a preset slave inverter identifier in a preset slave inverter identifier queue arranged in a preset allocation order. The current third message includes the feature code in the current second message, the unrecorded identifier, and the current number of parallel units.

4. The method for parallel grid connection of inverters according to claim 2, characterized in that, After detecting whether the current master controller is the target master controller, the process also includes: If the current master controller is not the target master controller, then the first message is received from the parallel bus; Based on the first message, configure the second message of the current master controller, and send the second message to the target master controller through the parallel bus; Receive a target third message from the parallel bus; wherein the feature code in the target third message is the feature code of the current master controller; If there is an unrecorded identifier in the target third message, the paralleling identifier of the current master controller is adjusted to the unrecorded identifier in the target third message, and the target internal communication signal is sent to each slave controller in the current inverter through the preset internal communication bus according to the adjusted paralleling identifier of the current master controller. If there is no unrecorded identifier in the target third message, then the target internal communication signal is sent to each slave controller in the current inverter through the preset internal communication bus according to the parallel identifier of the current master controller.

5. The method for parallel grid connection of inverters according to claim 1, characterized in that, The detection of whether the current master controller is the target master controller includes: Detect whether the current main controller is connected to the target communication component; If the target communication component is connected, then the current main controller is determined to be the target main controller; If the target communication component is not connected, it is determined that the current master controller is not the target master controller.

6. The method for parallel grid connection of inverters according to any one of claims 1 to 5, characterized in that, The preset internal communication bus is a general-purpose input / output port bus. The step of sending target internal communication signals to each slave controller in the current inverter via the preset internal communication bus, based on the parallel operation identifier of the current master controller, to configure the parallel operation identifier of each slave controller in the current inverter, includes: The target internal communication signal is sent from the general input / output bus to each slave controller in the current inverter, so that each slave controller in the current inverter determines and configures its own parallel identification according to the flip-flop cycle of the target internal communication signal.

7. The method for parallel grid connection of inverters according to claim 6, characterized in that, The step of setting the current main controller's parallel operation identifier to a preset main inverter identifier, and sending the first message on the parallel operation bus, further includes: If the second message is not received within a preset time period, a third message is sent through the parallel bus, and the step of sending the target internal communication signal from the general purpose input / output port bus to each slave controller in the current inverter is executed, so that each slave controller in the current inverter can detect the toggle cycle of the target internal communication signal from the general purpose input / output port bus according to the third message.

8. A parallel grid connection device for an inverter, characterized in that, Applied to the current main controller, including: The target detection module is used to detect whether the current main controller is the target main controller after the current inverter is powered on; wherein the current inverter is any inverter on the parallel bus, and the current main controller is the main controller in the current inverter; The information sending module is used to set the parallel identifier of the current main controller to a preset main inverter identifier if it is the target main controller, and send a first message on the parallel bus; The main control configuration module is used to configure the parallel identification corresponding to each of the main controllers of the other inverters through the parallel bus according to the second message returned by the main controllers of the other inverters received from the parallel bus; wherein, the other inverters are inverters other than the current inverter on the parallel bus; the second message includes the feature code of each of the main controllers of the other inverters; after the configuration is completed, the parallel identification of each inverter on the parallel bus is different; The slave configuration module is used to send target internal communication signals to each slave controller in the current inverter through a preset internal communication bus according to the parallel operation identifier of the current master controller, so as to configure the parallel operation identifier of each slave controller in the current inverter; wherein, the flip period of the target internal communication signal is the preset flip period corresponding to the parallel operation identifier of the current master controller.

9. An inverter, characterized in that, include: Memory, used to store computer programs; A main controller, used to implement the steps of the parallel networking method of the inverter as described in any one of claims 1 to 7 when executing the computer program.

10. A parallel grid-connected inverter system, characterized in that, include: At least one inverter as described in claim 9; In this inverter, the main controller and the slave controller are connected to each other via a parallel bus and a preset internal communication bus, respectively, and different inverters are connected to each other via the parallel bus.

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