PECVD (Plasma Enhanced Chemical Vapor Deposition) cooling cavity structure suitable for SiC substrate

Abstract

The invention relates to the technical field of semiconductor manufacturing equipment, discloses a PECVD (Plasma Enhanced Chemical Vapor Deposition) cooling cavity structure suitable for a SiC substrate, and solves the problems of poor temperature uniformity, concentrated thermal stress and low heat conduction efficiency caused by the fact that an existing cooling cavity designed based on a Si substrate cannot adapt to the characteristics of the SiC substrate. The structure comprises a cooling tower, an edge cooling pipe, a central cooling pipe and a temperature measuring piece, and can also be matched with a shell, a two-stage refrigerating unit, a PID temperature control system, a lifting system, a dynamic sealing structure and a gas cooling system. The cooling tower adopts a plurality of layers of stacked cooling substrates, each cooling substrate is provided with a containing groove and a corresponding edge and central cooling pipe channel, the cooling pipe channel is of a coiled extension structure, and a closed loop is formed by edge cooling pipes; the temperature measuring piece comprises a temperature measuring wafer with a plurality of built-in temperature sensors; the shell adopts an oxygen-free copper and aluminum nitride coating, and a heat preservation pipeline is arranged in the shell for temperature control. According to the method, wafer pollution and electrostatic damage can be reduced, and the quality and yield of the SiC device are improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor manufacturing equipment technology, and specifically relates to a PECVD cooling cavity structure suitable for SiC substrates. Background Technology

[0002] Plasma-enhanced chemical vapor deposition (PECVD) is a key process in semiconductor manufacturing. Its core function is to deposit functional thin films such as insulating and passivation layers, which are directly used in the manufacture of logic chips, power devices, optoelectronic devices, and MEMS devices. PECVD can achieve high deposition rates at low temperatures and produces thin films with excellent uniformity, making it an indispensable core technology in the semiconductor industry chain.

[0003] The cooling chamber is a core component of the PECVD system. After thin film deposition, the wafer needs to be cooled through the cooling chamber to avoid problems such as stress concentration and lattice defects caused by high temperature.

[0004] The differences in material properties between SiC and Si substrates lead to different cooling requirements after PECVD processes. Looking at key parameters, the thermal conductivity of SiC substrates (approximately 490 W / (m·K)) is much higher than that of Si substrates (approximately 149 W / (m·K)), resulting in faster heat loss. The differences in thermal expansion coefficients and the deposited SiO2 films are also greater, making them more prone to thermal stress during cooling. Furthermore, SiC's high chemical stability and the presence of residual carbon on its surface further affect the uniformity of heat conduction during cooling; these characteristics all differ from those of Si substrates.

[0005] However, most PECVD cooling chambers on the market are designed based on the process requirements of Si substrates, using single water channels and fixed cooling rates. They are not optimized for the high thermal conductivity, thermal stress sensitivity, and special surface characteristics of SiC substrates, resulting in the following core problems: insufficient temperature uniformity control precision, which cannot compensate for the problem of rapid heat dissipation at the edges of SiC; a single cooling curve, which makes it difficult to alleviate the thermal stress between SiC and the thin film; and poor control of the contact thermal resistance with the SiC substrate, which affects cooling efficiency and stability.

[0006] With the surge in demand for high-voltage and high-heat-resistant power devices in fields such as new energy and rail transportation, the market size of SiC devices is expanding rapidly. The localization and precision of their manufacturing processes have become crucial for industry development. Cooling, as the final step in the PECVD process for SiC devices, directly affects film adhesion, density, and long-term device reliability. Existing cooling cavities based on modified Si substrates have become a bottleneck restricting the improvement of SiC device yield and performance breakthroughs.

[0007] Therefore, developing a PECVD cooling cavity specifically for SiC substrates and optimizing its structure to solve problems such as poor temperature uniformity, thermal stress concentration, and low heat conduction efficiency is an inevitable requirement for improving the manufacturing quality of SiC devices and a key technological support for promoting the independent development of the SiC semiconductor industry. Summary of the Invention

[0008] Therefore, the purpose of this invention is to provide a PECVD cooling cavity structure suitable for SiC substrates, which solves problems such as poor temperature uniformity, thermal stress concentration, and low heat conduction efficiency through structural optimization, thereby improving the manufacturing quality of SiC devices and promoting the independent development of the SiC semiconductor industry.

[0009] To achieve the aforementioned objectives, the technical solution adopted is as follows: A PECVD cooling cavity structure suitable for SiC substrates includes: The cooling tower includes multiple stacked cooling substrates, each of which has a receiving groove on its top for placing a wafer, and each of which has an edge cooling pipe channel on both sides of the receiving groove and a central cooling pipe channel below the receiving groove. The edge cooling pipe passes sequentially through the edge cooling pipe channel on the same side of each cooling substrate, and then sequentially passes through the edge cooling pipe channel on the other side of each cooling substrate. Central cooling pipe, which passes sequentially through each central cooling pipe channel; The temperature sensing element includes a temperature sensing wafer and temperature sensors. The temperature sensing wafer is mounted within the receiving slot and incorporates multiple temperature sensors. A SiC wafer is placed on the temperature sensing wafer, and the temperature sensors cover the central and edge areas of the SiC wafer, used to collect temperature data from different areas of the SiC wafer in real time. The temperature sensing wafer is a dedicated carrier for the built-in sensors; placing the process wafer on it avoids direct contact with the metal placement area, reducing contamination and electrostatic damage.

[0010] As a further improvement of the present invention, the edge cooling pipe includes an inlet pipe, an outlet pipe and a connecting pipe. The inlet pipe extends from the bottom of the cooling tower through the edge cooling pipe channel on the same side of each cooling substrate to the top of the cooling tower. The outlet pipe extends from the top of the cooling tower through the edge cooling pipe channel on the other side of each cooling substrate to the bottom of the cooling tower. The inlet pipe and the outlet pipe are connected at one end of the cooling tower located at the top of the cooling tower through the connecting pipe.

[0011] As a further improvement of the present invention, a housing is included, the housing comprising an internally hollow cavity, the cooling tower being disposed within the cavity, and an insulation channel being provided inside the housing, wherein an insulation pipe is provided extending along the insulation channel.

[0012] As a further improvement of the present invention, the housing is made of oxygen-free copper, and the inner surface of the housing is coated with an aluminum nitride coating.

[0013] As a further improvement of the present invention, the cooling substrate is a plate structure, and a plurality of pin holes are symmetrically opened on the cooling substrate. Two adjacent cooling substrates are connected by positioning pins passing through and corresponding to the pin holes.

[0014] As a further improvement of the present invention, both the edge cooling pipe channel and the central cooling channel are coiled and extended channel structures.

[0015] As a further improvement of the present invention, the cooling tower further includes a bottom diversion plate and a top return plate. The cooling substrates located at the top and bottom of the cooling tower are a top substrate and a bottom substrate, respectively. A top return plate and a top return plate are sequentially arranged on the top of the top substrate, and a bottom diversion plate and a bottom diversion plate are sequentially arranged on the bottom of the bottom substrate. A plurality of clamping rods are vertically connected between the top return plate and the bottom diversion plate, which are symmetrically arranged around each cooling substrate and press against the sides of the cooling substrate.

[0016] As a further improvement of the present invention, the shape of the receiving groove is adapted to the shape of the wafer to be tested.

[0017] As a further improvement of the present invention, the temperature measuring wafer has 13 built-in temperature sensors covering the center, half radius and edge areas of the temperature measuring wafer.

[0018] As a further improvement of the present invention, it also includes a dual-stage refrigeration unit and a PID temperature control system. The edge cooling pipe and the central cooling pipe are equipped with a dual-stage refrigeration unit, which can achieve independent and precise temperature control of the central and edge regions of the SiC wafer by separately adjusting the flow rate of the coolant in the two loops, thus compensating for the excessive heat dissipation at the edge of the SiC wafer. The PID temperature control system is electrically connected to the temperature sensor of the temperature-measuring wafer and the dual-stage refrigeration unit respectively. The PID temperature control system receives the temperature data collected by the temperature sensor, calculates the data using a PID algorithm, and outputs a control signal to the dual-stage refrigeration unit to dynamically adjust the flow rate and temperature of the coolant in the dual-loop water circuit, thereby controlling the temperature difference within the SiC wafer surface to within 2°C.

[0019] As a further improvement of the present invention, a lifting system is also included, which is connected to the liquid cooling tower for driving the liquid cooling tower to move up and down in the vertical direction; the dynamic sealing structure is set at the connection between the liquid pipeline and the cooling chamber, which can maintain the vacuum environment inside the cooling chamber during the movement of the liquid cooling tower, control the vacuum fluctuation within the allowable range of the process, and cooperate with the lifting system to realize the smooth loading and unloading of SiC wafers.

[0020] As a further improvement of the present invention, a gas cooling system is also included, which includes an inert gas delivery pipeline and a gas nozzle, wherein the gas nozzle is positioned facing the substrate placement position of the liquid cooling tower; the gas cooling system works in conjunction with the liquid cooling tower to quickly remove heat from the surface of the SiC wafer using inert gas, while maintaining an inert gas atmosphere inside the cooling chamber to prevent oxidation or contamination of the SiC wafer surface.

[0021] As a further improvement of the present invention, the cooling cavity adopts a stepped cooling strategy, which divides the cooling process of the SiC wafer into 3-4 stages. Each stage is set with a different cooling rate and target temperature, and each stage is held for 30-60 seconds after completion, so that the heat inside the SiC wafer can be evenly diffused and the thermal stress between the SiC wafer and the deposited film can be relieved.

[0022] The beneficial effects of this invention are: 1. This invention adopts a composite material design of oxygen-free copper + aluminum nitride coating. The thermal conductivity of oxygen-free copper is more than 2.7 times higher than that of traditional aluminum alloy, which can quickly dissipate heat from SiC wafers and achieve uniform heat distribution. The aluminum nitride coating has high hardness, smooth surface and corrosion resistance, which can avoid wear of SiC wafers during mechanical contact, while preventing surface particle contamination and ensuring wafer surface quality.

[0023] 2. The cooling water circuit design adopts a central + edge dual-loop + honeycomb microchannel. The flow rate of the dual loop can be adjusted independently, which effectively compensates for the problem of rapid heat dissipation at the edge of SiC, suppresses edge overcooling, and solves the problems of uneven cooling rate and thermal stress concentration. The honeycomb microchannel replaces the traditional straight channel, which makes the coolant more evenly distributed in the cooling tower and ensures the temperature consistency of each area of ​​the wafer.

[0024] 3. It adopts a multi-layer modular sealing structure, consisting of a bottom flow divider plate, a cooling substrate, and a top return plate. The sealing is achieved through positioning pins and clamping rods. The number of cooling substrates can be flexibly increased or decreased to adapt to different production capacity requirements. Moreover, the cooling effect of each layer is consistent, which improves the versatility and practicality of the equipment.

[0025] 4. Each layer of the receiving tank is equipped with a temperature-sensing wafer, with 13 built-in temperature sensors covering the center, half radius and edge areas of the wafer. It can obtain temperature data of different areas of the wafer in real time and accurately. Combined with the PID temperature control system and the two-stage refrigeration unit, the flow rate and temperature of the coolant are dynamically adjusted to keep the temperature difference within the wafer surface within 2°C, effectively reducing thermal stress and lowering the risk of thin film cracking.

[0026] 5. The shell is equipped with heat preservation channels and pipes to control the temperature of the outer wall of the cavity and the internal atmosphere temperature to be stable within ±3℃, so as to avoid the interference of cavity radiant heat with the wafer temperature and further improve the temperature control accuracy.

[0027] 6. In conjunction with the lifting system, dynamic sealing structure, and gas cooling system, it enables stable loading and unloading of SiC wafers, quickly removes wafer heat, and maintains a vacuum environment and inert gas atmosphere inside the cooling chamber to prevent oxidation or contamination of the SiC wafer surface, thus ensuring process stability and wafer quality.

[0028] 7. A stepped cooling strategy is adopted. In view of the thermal stress sensitivity of SiC and thin film SiO2, the cooling process is divided into 3-4 stages. Each stage is set with a different cooling rate and target temperature. After each stage, the device is held for 30-60 seconds to allow heat to spread evenly, effectively relieve thermal stress, and improve the long-term reliability of the device.

[0029] 8. The modular design can be flexibly adapted to wafers of different specifications without modifying the main structure, thus reducing industrialization costs. The core design can be transferred to PECVD cooling scenarios for GaN, diamond and other substrates, expanding the application range of semiconductor cooling equipment, filling the gap in domestic SiC substrate PECVD cooling cavity technology, and reducing dependence on foreign equipment. Attached Figure Description

[0030] The accompanying drawings, which form part of this application, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings: Figure 1 This is an exploded structural diagram of the cooling tower of the present invention; Figure 2 This is a schematic diagram of the structure of the cooling substrate of the present invention; Figure 3 This is a schematic diagram of the edge cooling pipe of the present invention; Figure 4 This is a schematic diagram of the central cooling pipe structure of the present invention; Figure 5 This is a schematic diagram of the overall structure of the present invention; Figure 6 This is a schematic diagram of the structure of the housing involved in the present invention; Figure 7This is a schematic diagram of the structure of the thermal insulation pipeline involved in this invention; Figure 8 The diagram shows a traditional Si substrate cooling tower and its internal water channels, where (a) is a traditional Si substrate cooling tower and (b) is the internal water channels.

[0031] Figure 9 This is a schematic diagram of a traditional single-layer cooling module structure.

[0032] In the diagram: 1. Cooling tower, 11. Cooling substrate, 12. Receiving tank, 13. Positioning pin, 14. Bottom flow divider plate, 15. Top reflux plate, 16. Top reflux pressure plate, 17. Bottom flow divider pressure plate, 18. Clamping rod, 2. Edge cooling pipe, 21. Inlet pipe, 22. Outlet pipe, 23. Connecting pipe, 3. Central cooling pipe, 4. Temperature measuring element, 41. Temperature measuring wafer, 42. Temperature measuring point, 43. Temperature measuring circuit, 5. Housing, 51. Cavity, 52. Insulation pipeline. Detailed Implementation

[0033] It should be noted that, unless otherwise specified, the embodiments and features described in this application can be combined with each other. The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0034] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort should fall within the scope of protection of the present application.

[0035] like Figure 1-7 As shown, a PECVD cooling cavity structure suitable for SiC substrates includes: Cooling tower 1 includes multiple stacked cooling substrates 11. Each cooling substrate 11 has a receiving groove 12 for placing a wafer on its top. Each cooling substrate 11 has an edge cooling pipe 2 channel located on both sides of the receiving groove 12 and a central cooling pipe 3 channel located below the receiving groove 12. The edge cooling pipe 2 passes sequentially through the edge cooling pipe 2 channel on the same side of each cooling substrate 11, and then sequentially passes through the edge cooling pipe 2 channel on the other side of each cooling substrate 11. Central cooling pipe 3, which passes through each central cooling pipe 3 channel in sequence; The temperature sensing element 4 includes a temperature sensing wafer 41 and temperature sensors. The temperature sensing wafer 41 is mounted within the receiving groove 12 and has multiple built-in temperature sensors. A SiC wafer is placed on the temperature sensing wafer 41, and the temperature sensors cover the central and edge areas of the SiC wafer for real-time acquisition of temperature data from different areas of the SiC wafer. The temperature sensing wafer 41 is a dedicated carrier for the built-in sensors. Placing the process wafer on it avoids direct contact with the metal placement area, reducing contamination and electrostatic damage.

[0036] Thirteen temperature measurement points 42 are evenly distributed in the center, half radius and edge area of ​​the temperature measurement wafer 41 (covering the key heat distribution area of ​​the SiC wafer). A temperature sensor (thermocouple) is installed below each temperature measurement point 42. The signal pin of each temperature sensor is connected to the corresponding interface of the temperature measurement circuit 43 to form an independent signal transmission branch.

[0037] The edge cooling pipe 2 includes an inlet pipe 21, an outlet pipe 22, and a connecting pipe 23. The inlet pipe 21 extends from the bottom of the cooling tower 1 through the edge cooling pipe 2 channel on the same side of each cooling substrate 11 to the top of the cooling tower 1. The outlet pipe 22 extends from the top of the cooling tower 1 through the edge cooling pipe 2 channel on the other side of each cooling substrate 11 to the bottom of the cooling tower 1. The inlet pipe 21 and the outlet pipe 22 are connected at the top of the cooling tower 1 through the connecting pipe 23.

[0038] The device includes a housing 5, which includes a hollow cavity 51. The cooling tower 1 is disposed in the cavity 51. The housing 5 has an insulation channel inside, and an insulation pipe 52 extending along the insulation channel is disposed therein.

[0039] The housing 5 is made of oxygen-free copper, and the inner surface of the housing 5 is coated with an aluminum nitride coating.

[0040] The cooling substrate 11 is a plate structure, and multiple pin holes are symmetrically opened on the cooling substrate 11. Two adjacent cooling substrates 11 are connected by a positioning pin 13 passing through and corresponding to the pin hole.

[0041] Both the edge cooling pipe 2 channel and the central cooling channel have a coiled and extended channel structure.

[0042] The cooling tower 1 also includes a bottom diversion plate 14 and a top return plate 15. The cooling substrates 11 located at the top and bottom of the cooling tower 1 are the top substrate and the bottom substrate, respectively. The top of the top substrate is provided with a top return plate 16 and a top return plate 15 in sequence. The bottom of the bottom substrate is provided with a bottom diversion plate 17 and a bottom diversion plate 14 in sequence. A plurality of clamping rods 18 are vertically connected between the top return plate 15 and the bottom diversion plate 14, which are symmetrically arranged around each cooling substrate 11 and press the sides of the cooling substrate 11.

[0043] The shape of the receiving groove 12 is adapted to the shape of the wafer to be tested.

[0044] The temperature sensing wafer 41 has 13 built-in temperature sensors, covering the central, half-radius and edge areas of the temperature sensing wafer 41.

[0045] It also includes a dual-stage refrigeration unit and a PID temperature control system. The edge cooling pipe 2 and the central cooling pipe 3 are equipped with a dual-stage refrigeration unit, which can independently and accurately control the temperature of the central and edge areas of the SiC wafer by adjusting the flow rate of the coolant in the two loops, thus compensating for the rapid heat dissipation at the edge of the SiC wafer. The PID temperature control system is electrically connected to the temperature sensor of the temperature measuring wafer 41 and the dual-stage refrigeration unit. The digital temperature signal processed by the temperature measuring circuit 43 is transmitted to the PID temperature control system through a dedicated line. Each signal corresponds to the real-time temperature data of a temperature measuring point 42. The PID temperature control system receives the temperature data collected by the temperature sensor, calculates it through the PID algorithm, and outputs a control signal to the dual-stage refrigeration unit to dynamically adjust the flow rate and temperature of the coolant in the dual-loop water circuit, keeping the temperature difference within the SiC wafer surface within 2°C.

[0046] It also includes a lifting system, which can be the same as the lifting system of the PECVD cooling cavity designed for existing Si substrates. The lifting system is connected to the liquid cooling tower 1 and is used to drive the liquid cooling tower 1 to move up and down in the vertical direction. The dynamic sealing structure is set at the connection between the liquid pipeline and the cooling cavity 51. It can maintain the vacuum environment inside the cooling cavity during the movement of the liquid cooling tower 1, control the vacuum fluctuation within the process allowable range, and cooperate with the lifting system to realize the smooth loading and unloading of SiC wafers.

[0047] It also includes a gas cooling system, which includes an inert gas delivery pipeline and a gas nozzle. The gas nozzle is positioned facing the substrate placement position of the liquid cooling tower 1. The gas cooling system works in conjunction with the liquid cooling tower 1 to quickly remove heat from the surface of the SiC wafer using inert gas, while maintaining an inert gas atmosphere inside the cooling chamber to prevent oxidation or contamination of the SiC wafer surface.

[0048] The cooling chamber adopts a stepped cooling strategy, dividing the cooling process of the SiC wafer into 3-4 stages. Each stage is set with a different cooling rate and target temperature, and each stage is held for 30-60 seconds after completion to allow the heat inside the SiC wafer to diffuse evenly and alleviate the thermal stress between the SiC wafer and the deposited thin film.

[0049] Traditional PECVD cooling cavities based on Si substrates are typically made of aluminum alloy with anodized surfaces. The outer wall of the cavity is cooled by a panel without active temperature control. The temperature of the outer wall fluctuates with the environment and can easily affect wafer cooling through radiation.

[0050] Figure 8 A schematic diagram of a PECVD cooling cavity designed for a traditional Si substrate. The cooling water path for the Si wafer is a single-loop inline channel, and its internal water path is as follows: Figure 8 As shown in (b), the temperature difference between the inlet and outlet is usually ≤5℃.

[0051] Figure 9 This is a schematic diagram of a traditional single-layer cooling module. The Si wafer contacts the left and right sides of the placement position, and the middle is designed as a hollow position because the mechanical gripper is used for picking and placing. Although the hollow design in the middle is convenient for picking and placing, it will result in insufficient contact area between the wafer and the placement position, low heat conduction efficiency, and is not suitable for the high thermal conductivity requirements of SiC.

[0052] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, component splitting or combination, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A PECVD cooling cavity structure suitable for SiC substrates, characterized in that, include: The cooling tower includes multiple stacked cooling substrates, each of which has a receiving groove on its top for placing a wafer, and each of which has an edge cooling pipe channel on both sides of the receiving groove and a central cooling pipe channel below the receiving groove. The edge cooling pipe passes sequentially through the edge cooling pipe channel on the same side of each cooling substrate, and then sequentially passes through the edge cooling pipe channel on the other side of each cooling substrate. Central cooling pipe, which passes sequentially through each central cooling pipe channel; A temperature measuring device, comprising a temperature measuring wafer and temperature sensors, wherein the temperature measuring wafer is mounted in the receiving groove and has multiple temperature sensors built into it, and a SiC wafer is placed on the temperature measuring wafer.

2. The PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: The edge cooling pipe includes an inlet pipe, an outlet pipe, and a connecting pipe. The inlet pipe extends from the bottom of the cooling tower through the edge cooling pipe channel on the same side of each cooling substrate to the top of the cooling tower. The outlet pipe extends from the top of the cooling tower through the edge cooling pipe channel on the other side of each cooling substrate to the bottom of the cooling tower. The inlet pipe and the outlet pipe are connected at one end of the cooling tower at the top through the connecting pipe.

3. The PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: The device includes a housing, which has an internally hollow cavity. The cooling tower is disposed within the cavity. The housing has an internal heat-insulating channel, and an heat-insulating pipe extends along the heat-insulating channel.

4. The PECVD cooling cavity structure suitable for SiC substrates according to claim 3, characterized in that: The housing is made of oxygen-free copper, and the inner surface of the housing is coated with aluminum nitride.

5. A PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: The cooling substrate is a plate structure, and multiple pin holes are symmetrically opened on the cooling substrate. Two adjacent cooling substrates are connected by positioning pins that pass through and are in the corresponding pin holes.

6. The PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: Both the edge cooling pipe channels and the central cooling channel have a coiled and extended channel structure.

7. A PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: The cooling tower also includes a bottom flow divider plate and a top return plate. The cooling substrates located at the top and bottom of the cooling tower are a top substrate and a bottom substrate, respectively. A top return plate and a top return plate are sequentially arranged on the top of the top substrate, and a bottom flow divider plate and a bottom flow divider plate are sequentially arranged on the bottom of the bottom substrate. A plurality of clamping rods are vertically connected between the top return plate and the bottom flow divider plate, which are symmetrically arranged around each cooling substrate and press against the sides of the cooling substrate.

8. A PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: The shape of the receiving groove is adapted to the shape of the wafer to be tested.

9. A PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: The temperature-sensing wafer has 13 built-in temperature sensors, covering the center, half radius, and edge areas of the temperature-sensing wafer.

10. A PECVD cooling cavity structure suitable for SiC substrates according to claim 1, characterized in that: It also includes a two-stage refrigeration unit and a PID temperature control system. The edge cooling pipe and the central cooling pipe are equipped with a two-stage refrigeration unit. The PID temperature control system is electrically connected to the temperature sensor of the temperature measuring wafer and the two-stage refrigeration unit, respectively. The PID temperature control system receives the temperature data collected by the temperature sensor, calculates the data using a PID algorithm, and outputs a control signal to the two-stage refrigeration unit.

Images