Programmable fuel cell controller circuit architecture and control method thereof

Abstract

The invention discloses a programmable fuel cell controller circuit architecture and a control method thereof, and belongs to the technical field of fuel cells. The architecture comprises a bottom layer control chip, an application control chip and an inter-chip communication interface, the bottom layer control chip solidifies a BOP drive and a DC / DC control program, the application control chip opens user programming, and the double chips realize physical isolation through standardized interface communication; the method comprises the steps of bottom layer solidification, application deployment, instruction sending, analysis execution, independent content operation, bottom layer chip integration multi-mode self-adaptive control and a fault safety mechanism, and application layer faults do not affect core functions. The development threshold is reduced, the system reliability is improved, the user stickiness is enhanced, and the method is suitable for a fuel cell control system.

Description

Technical Field

[0001] This application relates to the field of fuel cell technology, and in particular to a programmable fuel cell controller circuit architecture and its control method. Background Technology

[0002] As a highly efficient and clean energy conversion device, the widespread application of fuel cells relies on a stable, reliable, and intelligent control system. Traditional fuel cell controllers often use a single main control chip (MCU / MPU) to integrate all functions, including low-level hardware drivers (such as BoP auxiliary control and DC-DC boost control logic) and high-level application logic (such as customer-customized algorithms, communication, and human-machine interaction).

[0003] This single-chip integrated solution has the following drawbacks: High development threshold and long development cycle. For example, when developing applications, users (customers) must have a deep understanding of the underlying hardware driver details, and may even require the supplier to provide the underlying driver code. This makes development complex, requires high levels of expertise, and prolongs product launch time. Furthermore, it poses a significant risk to system reliability. The application layer code and the underlying driver code run within the same chip, which is considered "logically isolated." If the user-developed application layer program experiences problems such as crashes, infinite loops, or memory overflows, it can easily lead to the collapse of the entire controller, directly affecting the core operation of the fuel cell (BOP auxiliary components stop working), posing a serious safety hazard. In addition, due to the high degree of code integration, customers can easily obtain and understand the entire control logic, reducing their dependence on existing solution providers and hindering the establishment of long-term customer partnerships. These are just some examples of the main problems.

[0004] Therefore, there is an urgent need in this field for a new architecture for fuel cell controllers that can reduce development difficulty, improve system reliability, and effectively protect core intellectual property rights. Summary of the Invention

[0005] This invention aims to overcome the shortcomings of existing single-chip fuel cell controller architectures, such as "high development threshold, poor reliability, weak intellectual property protection, and low technology stickiness," and provides a programmable fuel cell controller circuit architecture and its control method. By physically isolating the two chips, the application layer and the drive layer are decoupled, reducing the development difficulty for users, improving system security, protecting core technologies, and enhancing user stickiness. The technical solution is as follows: On the one hand, a programmable fuel cell controller circuit architecture is provided, which adopts a dual-chip architecture, including a bottom-level control chip, an application control chip, and an inter-chip communication interface; The underlying control chip and the application control chip establish a connection through the inter-chip communication interface to achieve data interaction; The underlying control chip is a driver layer chip or a BOP / DC-DC control chip, and the application control chip is a user-programmable chip or an application layer chip, used to achieve physical isolation and independent operation between the application layer and the driver layer.

[0006] Optionally, the underlying control chip pre-embeds the core underlying drive and control programs necessary for the operation of the fuel cell, and its responsibilities include: The driving and control of fuel cell BOP accessories include air compressor, hydrogen circulation pump, cooling water pump, solenoid valve, and sensors; closed-loop control of DC / DC converter to stabilize and regulate fuel cell output voltage; the underlying control chip operates as a reliable and independent execution unit.

[0007] Optionally, the application control chip is open to the user and is responsible for running user-defined applications, including the following: Implement user-specific control strategies and algorithms, including power scheduling and energy management; handle external communication, including CAN, Ethernet, and RS485; manage human-machine interaction, including touch screen and indicator lights; the application control chip operates as a flexible and programmable decision-making unit.

[0008] Optionally, the application control chip sends instructions to the underlying control chip through the inter-chip communication interface. The instructions include "set target output voltage" and "start air compressor to XX speed". It also receives status data from the underlying control chip, including "current voltage" and "auxiliary component fault flag".

[0009] On the other hand, a control method for a programmable fuel cell controller circuit architecture is provided, the method comprising: The underlying control chip contains embedded execution BOP driver routines and DC / DC control algorithms. In the application control chip, the application layer program is written or deployed by the user; The application control chip sends formatting instructions to the underlying control chip through the inter-chip communication interface according to its application logic; The underlying control chip receives and parses instructions, executes corresponding hardware operations, and returns the execution results or status information to the application control chip. The programs of the underlying control chip and the application control chip run independently without interfering with each other. Errors or crashes in the application layer program are isolated inside the application control chip and do not affect the normal operation of the underlying control chip.

[0010] Optionally, the BOP drive routine includes a multi-mode adaptive control algorithm for the air compressor, dead zone compensation and precise flow control for the hydrogen circulation pump, and health assessment of the BOP components.

[0011] Optionally, the DC / DC control algorithm includes a multi-mode switching control strategy and an adaptive control algorithm based on fuel cell characteristics.

[0012] Optionally, the instruction frame format of the formatting instruction includes a frame header (0xAA55), command code, data length, data field, extended field, CRC check (16-bit CRC-CCITT checksum, covering all fields except the frame header and frame tail), and frame tail (0x55AA). The underlying control chip uses a state machine approach to parse instructions. The parsing states include STATE_IDLE (idle state, waiting for frame header), STATE_HEADER1 (received 0xAA), STATE_HEADER2 (received 0x55), STATE_CMD (receive command code), STATE_LENGTH (received data length), STATE_DATA (received data field), STATE_EXT (received extended field), STATE_CRC1 (received CRC high byte), STATE_CRC2 (received CRC low byte), STATE_TAIL1 (received frame tail 0x55), and STATE_TAIL2 (received frame tail 0xAA). If the interval between each byte exceeds 10ms during the parsing process, the parser is reset to the idle state. After receiving a complete frame, the CRC and frame tail are verified.

[0013] Optionally, the underlying control chip has a fail-safe operating mode, error handling procedures, and a safety instruction priority processing mechanism.

[0014] Optionally, the core underlying driver and control program embedded in the underlying control chip also includes an automatic identification algorithm for fuel cell parameters. The algorithm performs a power-on self-test during each cold start, measures the open-circuit voltage E0, injects a small current pulse of 1% of the rated current to calculate the ohmic internal resistance RΩ, performs a 0→10% rated current scan to fit the activation polarization curve, identifies the exchange current density i0 online during operation, and updates the concentration polarization parameters m and n every 8 hours of operation.

[0015] Compared with the prior art, the present invention has the following significant advantages.

[0016] The underlying drivers are pre-fixed and packaged, so users do not need to worry about the underlying details (such as air compressor FOC control and DC / DC closed-loop algorithm). They only need to focus on upper-level application development based on the provided development kit. It supports C language / MBD tools, which reduces the technical threshold and shortens the development cycle (such as the original 3-month development cycle can be shortened to 1 month).

[0017] The dual-chip physical isolation (hardware independence, program independence) prevents application layer failures (such as program crashes) from being transmitted to the driver layer. The underlying chip can independently maintain core functions (BOP auxiliary control, DC / DC voltage regulation) or perform a safe shutdown, eliminating the risk of system crash (the underlying chip still runs stably when the application layer fails during testing).

[0018] The application layer development environment is only open to users, while the underlying core algorithms (such as multi-mode adaptive control of air compressors and DC / DC characteristic adaptive algorithms) are solidified in firmware and not disclosed to users, thus protecting the technical barriers of solution providers.

[0019] User application ecosystems rely on dual-chip architecture and underlying drivers (the underlying chips cannot be replaced or the fixed algorithms cannot be modified), creating a hardware and software lock-in effect, which is conducive to solution providers and customers establishing long-term cooperative relationships. Attached Figure Description

[0020] Figure 1 A schematic diagram of the dual-chip architecture of the programmable fuel cell controller of this invention; Figure 2 This is a flowchart illustrating the data flow and execution process of the control method of the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0022] In this article, "multiple" refers to two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, or B alone. The character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0023] Example 1 The architecture adopts a dual-chip architecture (such as...) Figure 1 As shown, Figure 1 The present invention provides a schematic diagram of a dual-chip architecture for a programmable fuel cell controller, comprising a bottom-level control chip, an application control chip, and an inter-chip communication interface. The bottom-level control chip is electrically connected to BOP accessories (air compressor, hydrogen circulation pump, cooling water pump, etc.) and a DC / DC converter. The application control chip is electrically connected to a communication module (CAN transceiver, Ethernet PHY chip) and a human-machine interface module (touchscreen, indicator lights). The bottom-level control chip and the application control chip achieve bidirectional data interaction through the inter-chip communication interface. Details are as follows.

[0024] The underlying control chip is either a driver layer chip or a BOP / DC-DC control chip. In specific implementations, a TIC2000 series DSP (such as TMS320F28379D) is selected. Its GPIO pins are directly connected to the BOP auxiliary component drive circuit (including the air compressor FOC drive module, the hydrogen circulation pump PWM drive module, and the cooling water pump relay). The PWM pins are connected to the DC / DC converter power transistors (using a phase-shifted full-bridge topology). The ADC pins are connected to voltage / current / temperature sensors (used to collect the stack voltage, BOP auxiliary component current, and ambient temperature). At the same time, a 5V / 3.3V power supply module is configured for this chip (to ensure stable power supply) and a hardware watchdog (500ms watchdog cycle to prevent chip crashes).

[0025] The chip pre-embeds the core underlying drive and control programs necessary for the operation of the fuel cell. As an independent execution unit, it is responsible for the drive control of BOP accessories (start-stop and parameter adjustment of air compressor, hydrogen circulation pump, etc.) and closed-loop voltage regulation control of DC / DC converter (to maintain stable output voltage).

[0026] The application control chip is either a user-programmable chip or an application layer chip, and in specific implementations, an ARM Cortex-M series MCU (such as STM32F429) is selected. Its SPI host pin is connected to the inter-chip communication interface, the CAN pin is connected to the CAN transceiver (such as TJA1050, to realize CAN communication with external devices), the Ethernet pin is connected to the PHY chip (such as LAN8720, to realize Ethernet communication), and the GPIO pin is connected to the touch screen (such as TFT-LCD, for human-machine interaction) and indicator lights (for status indication). A 3.3V power supply module is configured for this chip to ensure power matching with the underlying control chip.

[0027] This chip is open to users and serves as a programmable decision unit, responsible for running user-defined applications (such as power scheduling and energy management algorithms), handling external communication (CAN / Ethernet / RS485), and managing human-machine interaction (touchscreen operation response and indicator light status control).

[0028] The chip-to-chip communication interface connects the underlying control chip and the application control chip. Specifically, the SPI interface is selected (it can also be replaced by UART, I2C, CAN, or other communication interfaces such as 485). During hardware implementation, the SPI slave pins (SCK, MISO, MOSI, CS) of the underlying control chip are connected to the corresponding SPI master pins of the application control chip, and a TVS diode (to prevent surge interference) is added to the interface line.

[0029] For example, the interface parameters are set as follows. The default voltage is 3.3V (consistent with the power supply voltage of the two chips). If UART is selected, the baud rate is 115200 or 9600. If I2C is selected, the rate is 400kHz. If CAN is selected, the rate is 512k. The application control chip sends commands to the underlying control chip through this interface (such as "set target output voltage 400V" and "start air compressor to 5000rpm"), and receives status data fed back by the underlying control chip (such as "current voltage 400V" and "auxiliary component fault flag 0x00").

[0030] Example 2 Based on the above circuit architecture, the control method implementation process is as follows: Figure 2 The data flow and execution flowchart of the control method of the present invention shown is executed simultaneously with software deployment and system testing. The steps in the diagram are as follows: "Underlying control chip solidifies core program (software development and burning) → Application control chip deploys user program (user develops based on kit) → Application control chip sends formatting instructions (instruction construction and sending) → Underlying control chip parses, executes and provides feedback (parses, executes and provides feedback) → Dual-chip independent operation isolates faults (fault simulation and verification)". The "Underlying control chip parses, executes and provides feedback" step includes three sub-processes: instruction parsing, error handling, and security mechanisms. The "Dual-chip independent operation isolates faults" step includes two sub-processes: application layer fault isolation and underlying stable operation. Details are as follows.

[0031] Step 1: Solidify the core program into the underlying control chip (software implementation).

[0032] In the underlying control chip (TIC2000DSP), firmware programs were written and burned using the TICCS development environment to solidify and execute BOP driver routines and DC / DC control algorithms. The specific development and execution process is as follows.

[0033] 1.1 Development and execution of BOP-driven routines.

[0034] The air compressor features multi-mode adaptive control. At the software level, algorithm code is written. First, an air density correction coefficient matrix based on altitude (0-3000m) and temperature (-30°C to 60°C) is preset (stored in the chip's Flash). During operation, altitude and temperature data are collected in real time, and the matrix parameters are called to correct the flow-back pressure characteristics. At the same time, surge-related parameters are monitored (flow fluctuation rate is calculated by sampling 100 times per second, exhaust pressure deviation is compared with the set value, and motor current fluctuation frequency is analyzed by FFT). When the surge identification threshold is met (flow fluctuation rate > 15%, exhaust pressure deviation > 8%, motor current fluctuation frequency > 5Hz), anti-surge control is triggered (fast vent valve opening delay ≤ 50ms, power ramp-up rate after surge recovery ≤ 5% / s). Simultaneously, it achieves compressor model self-identification: after power-on, it collects the no-load current, calculates the moment of inertia and resonant frequency through ADC, matches them with the pre-stored database of 10 mainstream compressor models, and automatically loads the corresponding control parameter set; based on the MRAC algorithm, it adjusts the PID parameters in real time, and the adjustment formula is coded as: Kp(t)=Kp0*α(t)+ΔKp_online; Ki(t)=Ki0 / β(t); where α(t) is a function of the rate of change of flow and the rate of change of back pressure, and β(t) is a function of temperature, humidity and cumulative running time, which are dynamically calculated through real-time data acquisition.

[0035] The hydrogen circulation pump features dead zone compensation and flow control. The software stores a flow dead zone compensation table based on back pressure (0-300kPa) and temperature (-20°C to 80°C) (stored in EEPROM, supporting offline updates). During runtime, back pressure and temperature data are collected, and the compensation table is used to correct the flow output. Hydrogen concentration is monitored (collected via a concentration sensor). An emergency purging is triggered when the concentration is <90% for 30 seconds, and an early warning is triggered when the concentration gradient change rate is >2% / s. Dead zone adaptive learning is implemented: during initialization, a low-speed scan is performed (gradually adjusted from 0 to rated speed) to establish a basic dead zone model; during operation, self-calibration is performed every 24 hours to correct for temperature drift; the leakage index is calculated (the formula is: leakage index = (set flow rate - measured flow rate) / set flow rate * 100%). When the leakage index is >5% for 10 seconds, power reduction operation is performed (Level 1 warning); when the leakage index is >10% or the concentration decrease rate is >3% / s, an emergency shutdown is performed and the hydrogen supply branch is closed (Level 2 alarm).

[0036] The cooling water system employs multi-variable collaborative control. The software presets thresholds for stack temperature difference (single cell ≤2°C, entire stack ≤10°C), temperature rise rate (cold start ≤2°C / min, normal operation ≤5°C / min), and coolant conductivity (normal <5μS / cm, warning 5-10μS / cm, alarm >10μS / cm). It collects individual cell temperature and coolant conductivity data via ADC to calculate temperature difference and temperature rise rate. Based on a thermodynamic prediction model (implemented in code as predicted temperature = current temperature + ΔT_model + Kalman filter compensation, where ΔT_model is a function of current density, cooling flow rate, and ambient temperature), it controls pump switching (when load current >80% of rated value, the main pump switches to the auxiliary pump). When conductivity is abnormal, it locates the contamination source through multi-point sampling (inlet, outlet, expansion tank) and generates maintenance suggestions (e.g., "Ion exchanger lifespan remaining 30%").

[0037] 1.2 Development and execution of DC / DC control algorithms.

[0038] Multi-mode switching control is implemented in the software, with a mode judgment function based on the input voltage acquired by the ADC to determine the operating mode: low voltage mode (fixed switching frequency 20kHz, efficiency priority) when the input voltage is <50V, medium voltage mode (frequency adaptive 20-50kHz, efficiency optimization) when the input voltage is 50V-200V, and high voltage mode (frequency 50-100kHz, dynamic response priority) when the input voltage is >200V. Mode switching hysteresis parameters are set (low voltage → medium voltage 52V, medium voltage → high voltage 205V, high voltage → medium voltage 195V, medium voltage → low voltage 48V) to avoid frequent switching. During the soft start phase, the output voltage is gradually increased from 0 to the rated value within 100ms through PWM duty cycle gradual change, limiting the maximum overshoot to ≤2%. When a capacitive load >1000μF is detected (judged by current sampling), the pre-charge logic is automatically activated.

[0039] The fuel cell features adaptive control, storing five sets of VI characteristic curve fitting parameters in the software (corresponding to new cells, normal cells, slightly aged cells, moderately aged cells, and heavily aged cells). The fitting formula is coded as: V=E0-(i*RΩ)-A*log(i / i0)-m*exp(n*i); where E0=open-circuit voltage, RΩ=ohmic internal resistance, A=Tafel slope, and i0=exchange current density. During operation, the corresponding parameters are called according to the aging state of the fuel cell stack, and the voltage drop is predicted based on dI / dt (current change rate). The output is adjusted through the compensation coefficient matrix K (K=f(current current, current change rate, cell temperature, SOC)) to ensure that the output voltage is not lower than the minimum allowable voltage of the fuel cell +0.2V safety margin.

[0040] The protection algorithm is developed, and the software implements cycle-by-cycle current limiting protection (implemented through hardware interrupts, with a response time of <2μs; triggered when the current exceeds 120% of the rated current, and soft shutdown is executed after three consecutive cycles of triggering); three-level over-temperature thresholds are set (derating to 80% power at 85°C, derating to 50% power at 95°C, and safe shutdown at 105°C), and the predicted temperature is calculated based on temperature sensor data and thermal resistance matrix; a three-retry mechanism is set for recoverable faults (overcurrent, overvoltage, undervoltage, communication interruption) (each retry interval of 1s), and permanent faults (over-temperature, short circuit, hardware fault) are locked and fault codes are reported.

[0041] Step 2: Deploy user programs (software implementation) using the application control chip.

[0042] Among them, the STM32CubeIDE development kit is provided to users, which includes the following:

[0043] The function library encapsulates SPI command sending functions (such as SetDcVoltage(uint16_tvoltage) for setting the DC / DC output voltage, and StartAirCompressor(uint16_trpm) for starting the air compressor) and status receiving functions (such as GetBopStatus(void) for obtaining the BOP accessory status, and GetDcStatus(void) for obtaining the DC / DC status). The documentation includes function descriptions (including parameter definitions, return values, and call examples), instruction frame format documentation (including command code tables and data field definitions), and hardware connection documentation (including pin assignment diagrams). Based on this kit, users can write application-layer programs (such as power scheduling logic that dynamically adjusts the DC / DC output voltage according to load demand) using C language or MBD tools (such as MATLAB / Simulink) and burn the programs to the application control chip using STM32CubeProgrammer.

[0044] Step 3: The application control chip sends formatting instructions (execution and testing).

[0045] The application control chip sends formatting instructions to the underlying control chip through the inter-chip communication interface according to the application logic. The specific execution and testing process is as follows.

[0046] 3.1 Instruction Construction. The formatted instruction frame format is "Frame Header (0xAA55) - Command Code - Data Length - Data Field - Extended Field - CRC Check (16-bit CRC-CCITT, covering all fields except frame header and frame tail) - Frame Tail (0x55AA)"; for example, the instruction "Set Output Voltage 400V" has a command code of 0x01, a data length of 2, a data field of 0x0190 (the hexadecimal value corresponding to 400V), an empty extended field, a CRC check calculated using the crc16_ccitt function, and a frame tail of 0x55AA; 3.2 Test and Verification. The user sets the "output voltage 400V" via the touchscreen. The application control chip calls the SetDcVoltage(400) function to automatically construct the above instruction and send it via SPI. The SPI bus is monitored using an oscilloscope to confirm that the instruction frame is sent completely (the frame header, command code, data fields, etc. meet the format requirements).

[0047] Step 4: The underlying control chip parses, executes, and provides feedback (execution and testing).

[0048] The underlying control chip uses a state machine to parse instructions, execute hardware operations, and provide feedback. The specific execution and testing process is as follows.

[0049] 4.1 Instruction Parsing. The state machine parses the states sequentially as follows: "Idle state (waiting for frame header) → Received 0xAA → Received 0x55 → Receive command code → Received data length → Received data field → Received extended field → Received CRC high byte → Received CRC low byte → Received frame tail 0x55 → Received frame tail 0xAA". During parsing, if the interval between each byte exceeds 10ms (determined by a timer), the parser is reset to the idle state. After receiving a complete frame, the CRC is recalculated using the crc16_ccitt function and compared with the received CRC value to verify frame integrity. 4.2 Hardware Execution. After successful parsing, the underlying control chip executes the corresponding operation (e.g., upon receiving the command "set output voltage 400V", it adjusts the phase shift angle of the DC / DC converter, acquires the output voltage in real time through the ADC, and performs closed-loop control to 400V). 4.3 Feedback and Testing. After execution, the underlying control chip constructs a response frame (containing execution result codes: 0x00 for success, 0x01 for execution, 0x02 for parameter error, etc.) and status data (such as current voltage 0x0190), and feeds it back to the application control chip via SPI. During testing, the response frame is read at the application control chip to confirm that the execution result and status data are correct (such as displaying "current voltage 400V").

[0050] 4.4 Error Handling Test. A command frame with a manually constructed CRC error was parsed and returned a NAK response (communication layer error); a command message "Set voltage 500V" (exceeding the maximum DC / DC output voltage) was sent, and the underlying control chip returned a 0x02 parameter error code (command semantic error); a simulated BOP auxiliary current overcurrent was triggered, and the underlying control chip activated FAULT_DEGRADE (derating operation state) and returned a fault code.

[0051] Step 5: Dual-chip independent operation to isolate faults (execution and testing).

[0052] The underlying control chip and the application control chip programs run independently. Specific tests and verifications are as follows.

[0053] 5.1 Fault simulation: Using debugging tools, the application control chip program is made to run wild (e.g., enter an infinite loop). 5.2 Status monitoring: If the underlying control chip detects that no instruction has been received from the application control chip within 150ms (response timeout), it will automatically switch to safe mode (operating according to preset communication interruption safety parameters: DC / DC output voltage 380V, air compressor speed 3000rpm), and at the same time report the "communication interruption" fault code through the CAN bus. 5.3 Results Verification: The DC / DC output voltage was measured using a multimeter and confirmed to be stable at 380V; the air compressor operating status was observed and confirmed to maintain a speed of 3000rpm; this proves that the application layer fault did not affect the underlying control chip and the fuel cell core system is operating normally.

[0054] In summary, compared with the prior art, the present invention has the following significant beneficial effects.

[0055] The underlying drivers are pre-fixed and packaged, so users do not need to worry about the underlying details (such as air compressor FOC control and DC / DC closed-loop algorithm). They only need to focus on upper-level application development based on the provided development kit. It supports C language / MBD tools, which reduces the technical threshold and shortens the development cycle (such as the original 3-month development cycle can be shortened to 1 month).

[0056] The dual-chip physical isolation (hardware independence, program independence) prevents application layer failures (such as program crashes) from being transmitted to the driver layer. The underlying chip can independently maintain core functions (BOP auxiliary control, DC / DC voltage regulation) or perform a safe shutdown, eliminating the risk of system crash (the underlying chip still runs stably when the application layer fails during testing).

[0057] The application layer development environment is only open to users, while the underlying core algorithms (such as multi-mode adaptive control of air compressors and DC / DC characteristic adaptive algorithms) are solidified in firmware and not disclosed to users, thus protecting the technical barriers of solution providers.

[0058] User application ecosystems rely on dual-chip architecture and underlying drivers (the underlying chips cannot be replaced or the fixed algorithms cannot be modified), creating a hardware and software lock-in effect, which is conducive to solution providers and customers establishing long-term cooperative relationships.

[0059] The sequence numbers of the embodiments in this application are for descriptive purposes only and do not represent the superiority or inferiority of the embodiments.

[0060] Those skilled in the art will understand that all or part of the steps of the above embodiments can be implemented by hardware, or by a program instructing related hardware. The program can be stored in a computer-readable storage medium, such as a read-only memory, a disk, or an optical disk. The above descriptions are merely optional embodiments of this application and are not intended to limit the application. Any modifications, equivalent substitutions, or improvements made within the spirit and principles of this application should be included within the scope of protection of this application.

Claims

1. A programmable fuel cell controller circuit architecture, employing a dual-chip architecture, characterized in that, This includes the underlying control chip, the application control chip, and the inter-chip communication interface; The underlying control chip and the application control chip establish a connection through the inter-chip communication interface to achieve data interaction; The underlying control chip is a driver layer chip or a BOP / DC-DC control chip, and the application control chip is a user-programmable chip or an application layer chip, used to achieve physical isolation and independent operation between the application layer and the driver layer.

2. The programmable fuel cell controller circuit architecture according to claim 1, characterized in that, The underlying control chip pre-installs the core underlying drive and control programs necessary for the operation of the fuel cell, and its responsibilities include: The driving and control of fuel cell BOP accessories include air compressor, hydrogen circulation pump, cooling water pump, solenoid valve, and sensors; closed-loop control of DC / DC converter to stabilize and regulate fuel cell output voltage; the underlying control chip operates as a reliable and independent execution unit.

3. The programmable fuel cell controller circuit architecture according to claim 1, characterized in that, The application control chip is open to users and is responsible for running user-defined applications, including: Implement user-specific control strategies and algorithms, including power scheduling and energy management; handle external communication, including CAN, Ethernet, and RS485; manage human-machine interaction, including touch screen and indicator lights; the application control chip operates as a flexible and programmable decision-making unit.

4. The programmable fuel cell controller circuit architecture according to claim 1, characterized in that, The application control chip sends instructions to the underlying control chip through the inter-chip communication interface. The instructions include "set target output voltage" and "start air compressor to XX speed". It also receives status data from the underlying control chip, including "current voltage" and "auxiliary component fault flag".

5. A control method based on the programmable fuel cell controller circuit architecture according to any one of claims 1-4, characterized in that, The method includes: The underlying control chip contains embedded execution BOP driver routines and DC / DC control algorithms. In the application control chip, the application layer program is written or deployed by the user; The application control chip sends formatting instructions to the underlying control chip through the inter-chip communication interface according to its application logic; The underlying control chip receives and parses instructions, executes corresponding hardware operations, and returns the execution results or status information to the application control chip. The programs of the underlying control chip and the application control chip run independently without interfering with each other. Errors or crashes in the application layer program are isolated inside the application control chip and do not affect the normal operation of the underlying control chip.

6. The programmable fuel cell controller control method according to claim 5, characterized in that, The BOP drive routines include a multi-mode adaptive control algorithm for the air compressor, dead zone compensation and precise flow control for the hydrogen circulation pump, and health assessment of the BOP components.

7. The programmable fuel cell controller control method according to claim 5, characterized in that, The DC / DC control algorithm includes a multi-mode switching control strategy and an adaptive control algorithm based on fuel cell characteristics.

8. The programmable fuel cell controller control method according to claim 5, characterized in that, The instruction frame format of the formatting instruction includes a frame header (0xAA55), command code, data length, data field, extended field, CRC check (16-bit CRC-CCITT checksum, covering all fields except the frame header and frame tail), and frame tail (0x55AA). The underlying control chip uses a state machine approach to parse instructions. The parsing states include STATE_IDLE (idle state, waiting for frame header), STATE_HEADER1 (received 0xAA), STATE_HEADER2 (received 0x55), STATE_CMD (receive command code), STATE_LENGTH (received data length), STATE_DATA (received data field), STATE_EXT (received extended field), STATE_CRC1 (received CRC high byte), STATE_CRC2 (received CRC low byte), STATE_TAIL1 (received frame tail 0x55), and STATE_TAIL2 (received frame tail 0xAA). If the interval between each byte exceeds 10ms during the parsing process, the parser is reset to the idle state. After receiving a complete frame, the CRC and frame tail are verified.

9. The programmable fuel cell controller control method according to claim 5, characterized in that, The underlying control chip has a fault-safe operation mode, error handling process, and safety instruction priority processing mechanism.

10. The programmable fuel cell controller circuit architecture according to claim 2, characterized in that, The core underlying driver and control program embedded in the underlying control chip also includes an automatic identification algorithm for fuel cell parameters. The algorithm performs a power-on self-test during each cold start, measures the open-circuit voltage E0, injects a small current pulse of 1% of the rated current to calculate the ohmic internal resistance RΩ, performs a 0→10% rated current scan to fit the activation polarization curve, identifies the exchange current density i0 online during operation, and updates the concentration polarization parameters m and n every 8 hours of operation.

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