TBC solar cell and preparation method thereof
By combining laser patterning and non-in-situ doping techniques with localized doping of etched slurry, the fabrication process of TBC solar cells has been simplified, improving cell performance and conversion efficiency, and solving the problems of complex and poor compatibility in existing TBC solar cell fabrication processes.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NANJING TECH UNIV
- Filing Date
- 2026-02-02
- Publication Date
- 2026-05-01
AI Technical Summary
Existing TBC solar cell fabrication processes are complex, requiring multiple masking and photolithography steps for P/N region doping. The fabrication methods are cumbersome and have poor compatibility, limiting their large-scale application and resulting in low yields.
By employing laser patterning and non-in-situ doping techniques, combined with localized doping of etched slurry, the process is simplified and battery performance is improved. Silver-copper slurry is used to reduce metallization costs, and photoinjection is added to achieve good passivation effect.
It simplifies the fabrication process of TBC solar cells, improves compatibility with existing TOPCON production lines, reduces metallization costs, increases open-circuit voltage and fill factor, and improves cell conversion efficiency.
Smart Images
Figure CN121968784A_ABST
Abstract
Description
A TBC solar cell and its preparation method Technical Field
[0001] This invention relates to the field of solar cell manufacturing technology, specifically a method for preparing TBC solar cells based on laser patterning and non-in-situ doping technology. Background Technology
[0002] In recent years, the solar cell industry has developed rapidly, with increasingly higher requirements for conversion efficiency. BC-type cells have been developed and utilized by major manufacturers. BC cells (cross-back contact cells) move the front electrode grid lines to the back, with the PN junction and metal contacts arranged in an interdigitated pattern, reducing the shading of sunlight by the grid lines and improving conversion efficiency. It is a structural optimization technology, not an independent cell type, and can be stacked with P-type and N-type cells, giving rise to PBC, TBC (Tunnel Oxide Passivated Contact Back Contact), HBC, etc. Currently, the main technical routes include IBC, HBC, PBC, ABC, HPBC, etc. BC cell technology is diverse and is the most differentiated route among N-type cells. TBC cells combine the advantages of TOPCon tunneling oxide passivated contact technology and IBC back contact structure, achieving no shading from the front grid lines through the interdigitated P / N regions on the back, significantly improving photoelectric conversion efficiency.
[0003] Existing TBC (Total Cell Burner) processes are complex, requiring multiple masking and photolithography steps for P / N region doping. The fabrication methods are complex, have poor compatibility, and limit large-scale application due to their cumbersome steps and low yield. To address these issues, this invention proposes a novel process integrating laser patterning, non-in-situ doping, and etched slurry-based localized doping, simplifying the process and improving battery performance. Summary of the Invention
[0004] The purpose of this invention is to address the problems existing in the prior art by providing a method for fabricating TBC solar cells based on laser patterning and non-in-situ doping technology. This method is particularly suitable for the large-scale production of high-efficiency back-contact crystalline silicon solar cells.
[0005] The objective of this invention is achieved through the following technical solution:
[0006] A method for preparing a TBC solar cell, comprising the following steps:
[0007] S1, Alkali Polishing: Double-sided alkaline polishing of N-type silicon wafers to remove the damaged layer and form a highly reflective polished surface;
[0008] S2, Thick Oxidation: A silicon dioxide tunneling oxide layer is deposited on both sides of an N-type silicon wafer after double-sided alkaline polishing, followed by the deposition of an intrinsic amorphous silicon layer of 230nm-260nm outside the silicon dioxide tunneling oxide layer.
[0009] S3, Boron expansion: Boron expansion transforms intrinsic amorphous silicon into P-type polycrystalline silicon;
[0010] S4. Laser Patterning: With the pattern set, use a laser to remove the P-type polysilicon and silicon dioxide tunnel oxide layer in the back-side area to prepare for the deposition of the N-region.
[0011] S5. Pickling and Alkali Polishing: Use hydrofluoric acid to pickle and remove BSG on the front side and laser damage on the back side, and then perform double-sided alkaline polishing on the silicon wafer.
[0012] S6, Thin Oxidation: After double-sided alkaline polishing, a silicon dioxide tunneling oxide layer is deposited on both sides of the N-type silicon wafer, followed by the deposition of an intrinsic amorphous silicon layer of 110nm-120nm outside the silicon dioxide tunneling oxide layer.
[0013] S7. Phosphorus diffusion: Phosphorus diffusion transforms intrinsic amorphous silicon into N-type polycrystalline silicon;
[0014] S8. Single-sided PSG removal: Hydrofluoric acid pickling removes PSG from the front side;
[0015] S9. Laser patterning or etch paste patterning: Use a laser or etch paste to remove the PSG area on the back side to expose the N-type polysilicon area.
[0016] S10, Texturing to remove PSG / BSG: Alkali texturing is performed to form a pyramid structure on the front and back sides and the pyramids are rounded; hydrofluoric acid pickling removes PSG and BSG from the back side, retaining the polycrystalline silicon layer;
[0017] S11, Double-sided deposited alumina passivation layer;
[0018] S12, Double-sided deposition of silicon nitride passivation layer;
[0019] S13, Laser opening: Using a laser to remove silicon nitride from the designated areas of the P and N regions on the back side, exposing the P-type polysilicon region and the N-type polysilicon region, forming a PN junction and creating good contact;
[0020] S14, Metallization / Electroplating: After metallization, drying and sintering are performed, and electroplating is used to remove the mask and etch the excess parts to form a precision electrode.
[0021] S15, Light Injection: Light injection is performed on the sintered and electroplated silicon wafer to obtain a TBC solar cell.
[0022] The preparation method also includes testing in step S16. The testing process is as follows: a high-precision machine vision inspection system is used to inspect the surface defects and electrode integrity of the front and back of the battery; then, electrical performance testing is performed under standard test conditions, measuring parameters including short-circuit current, open-circuit voltage, fill factor and conversion efficiency; next, non-destructive testing is performed, including electroluminescence detection and photoluminescence detection; finally, the batteries are classified and stored according to the test results and standards.
[0023] The specific process of alkaline polishing in step S1 is as follows: N-type silicon wafers with a thickness of 110-130um and a resistivity of 8Ω·cm-9Ω·cm are placed in a wet cell containing KOH, H2O2 and additives, and double-sided alkaline polishing is performed on the N-type silicon wafers at 70℃-90℃ to remove the damaged layer and form a highly reflective polished surface. The size of the base is controlled at 7-8um.
[0024] The specific process of thick oxidation in step S2 is as follows: The N-type silicon wafer after double-sided alkaline polishing is placed in an LPCVD equipment, and oxygen is introduced at a rate of 30000 sccm / s-35000 sccm / s and atmospheric pressure at 600℃-650℃ for 800s-950s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1nm-2nm on both sides. After vacuuming, silane is introduced at a flow rate of 1600 sccm / s-1800 sccm / s and deposited in an environment with a temperature of 600℃-630℃ and a pressure of 280Mbar-310Mbar for 3500s-4000s to deposit an intrinsic amorphous silicon layer with a thickness of 230nm-260nm outside the silicon dioxide tunneling oxide layer.
[0025] The specific process of thin oxidation in step S6 is as follows: the polished silicon wafer is placed in an LPCVD device, oxygen is introduced at a rate of 15000 sccm / s-18000 sccm / s, and atmospheric pressure at 600℃-650℃ is deposited for 600s-660s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1nm-1.8nm on both sides; after vacuuming, silane is introduced at a flow rate of 1600 sccm / s-1800 sccm / s, and deposition is carried out for 1500s-1600s in an environment with a temperature of 600℃-630℃ and a pressure of 280Mbar-310Mbar to deposit an intrinsic amorphous silicon layer with a thickness of 110nm-120nm outside the silicon dioxide tunneling oxide layer.
[0026] In step S3, the back sheet resistance of the boron-expanded sample is controlled at 130Ω-150Ω; in step S7, the back sheet resistance of the phosphorus-expanded sample is controlled at 40Ω-50Ω.
[0027] The weight loss in the alkaline texturing process in step S10 is controlled between 0.3g and 0.35g; the rounding process in step S10 is to round the pyramid using hydrochloric acid + ozone + hydrofluoric acid.
[0028] The thickness of the alumina passivation layer in step S11 is 8nm-10nm; the thickness of the silicon nitride passivation layer in step S12 is 75nm-80nm and the refractive index is 2.05-2.09.
[0029] The metallization in step S14 involves printing the back electrode using a high-precision screen printing method, printing Cu / Ag paste onto the laser-drilled hole location, and then drying and sintering it. The electroplating in step S14 involves cleaning the substrate to form a seed layer, immersing the substrate in an electrolyte containing target metal ions, and then applying an electric current to reduce and deposit the metal. The mask is then removed, and excess parts are etched to form a precision electrode.
[0030] The KOH, H2O2 and additives used in the above preparation method are conventionally prepared.
[0031] Another technical objective of this invention is to provide a structure for a TBC solar cell, which is prepared using the above-described preparation method.
[0032] The present invention has the following advantages over the prior art:
[0033] The preparation method of this invention uses BSG & PSG as masks, and laser patterning / etching paste replaces photolithography and other mask materials, which is highly compatible with existing TOPCON production lines; non-in-situ doping avoids high-temperature diffusion, and the use of silver-copper paste reduces metallization costs; the addition of photoinjection achieves good passivation effect, and improves open-circuit voltage and fill factor. Attached Figure Description
[0034] To more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the flowcharts of the prior art and the present invention will be briefly introduced below.
[0035] Figure 1 is a flowchart of a TBC solar cell fabrication method provided by the present invention. Detailed Implementation
[0036] Exemplary embodiments will now be described more fully with reference to the accompanying drawings. However, these exemplary embodiments can be implemented in many forms and should not be construed as limited to the embodiments set forth herein; rather, they are provided so that the invention will be thorough and complete, and the concept of the exemplary embodiments will be fully conveyed to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore their detailed description will be omitted.
[0037] The terms “a,” “one,” “the,” and “the” are used to indicate the existence of one or more elements / components / etc.; the terms “including” and “having” are used to indicate an open-ended meaning of inclusion and that other elements / components / etc. may exist in addition to the listed elements / components / etc.
[0038] Figure 1 shows a flowchart of a TBC solar cell fabrication method. The specific steps of this TBC solar cell fabrication method are as follows:
[0039] S1. Alkali polishing: N-type silicon wafers with a thickness of 110-130um and a resistivity of 8Ω·cm-9Ω·cm are placed in a wet cell containing KOH, H2O2 and additives. The N-type silicon wafers are subjected to double-sided alkaline polishing at 70℃-90℃ to remove the damaged layer and form a highly reflective polished surface. The size of the tower base is controlled at 7-8um.
[0040] S2, Thick Oxidation: The N-type silicon wafer, after double-sided alkaline polishing, is placed in an LPCVD device. Oxygen is introduced at a rate of 30000 sccm / s-35000 sccm / s, and atmospheric pressure at 600℃-650℃ for 800s-950s to deposit a silicon dioxide tunneling oxide layer with a thickness of 1nm-2nm on both sides. After vacuuming, silane is introduced at a flow rate of 1600 sccm / s-1800 sccm / s, and deposition is carried out for 3500s-4000s in an environment with a temperature of 600℃-630℃ and a pressure of 280Mbar-310Mbar. An intrinsic amorphous silicon layer with a thickness of 230nm-260nm is deposited outside the silicon dioxide tunneling oxide layer.
[0041] S3. Boron expansion: Boron expansion transforms intrinsic amorphous silicon into P-type polycrystalline silicon. Boron trichloride decomposes at 800℃ to generate elemental boron (B), which transforms intrinsic amorphous silicon into P-type polycrystalline silicon under high temperature. After boron expansion, the back sheet resistance is controlled at 130Ω-150Ω.
[0042] S4. Laser Patterning: With the pattern set, a laser is used to remove the P-type polysilicon and silicon dioxide tunnel oxide layer in the back-side area to prepare for the deposition of the N-region.
[0043] S5. Pickling and Alkali Polishing: Hydrofluoric acid (HF) is used to pickle the front BSG (borosilicate glass) and the back laser damage on the wet tank machine. KOH, H2O2 and additives are added to the wet tank machine to perform alkaline polishing treatment on the silicon wafer.
[0044] S6. Thin Oxidation: The polished silicon wafer is placed in an LPCVD device, and oxygen is introduced at a rate of 15000 sccm / s-18000 sccm / s, and a normal pressure of 600℃-650℃ is deposited for 600s-660s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1nm-1.8nm on both sides. After vacuuming, silane is introduced at a flow rate of 1600 sccm / s-1800 sccm / s, and a deposition is made for 1500s-1600s in an environment with a temperature of 600℃-630℃ and a pressure of 280Mbar-310Mbar to deposit an intrinsic amorphous silicon layer with a thickness of 110nm-120nm outside the silicon dioxide tunneling oxide layer.
[0045] S7. Phosphorus diffusion: Phosphorus diffusion transforms intrinsic amorphous silicon into N-type polycrystalline silicon. Phosphorus oxychloride decomposes at 800℃ and reacts with intrinsic amorphous silicon to generate elemental phosphorus (P), which diffuses into the silicon matrix to form a PN junction. After phosphorus diffusion, the back sheet resistance is controlled at 40-50Ω.
[0046] S8. Single-sided PSG removal (phosphosilicate glass): The front PSG (phosphosilicate glass) is removed by acid washing with hydrofluoric acid (HF) on a wet tank machine.
[0047] S9, Laser Patterning / Etching Paste Patterning: Using laser / etching paste, the PSG (phosphosilicate glass) area on the back is removed to expose the N-type polysilicon area;
[0048] S10. Texturing to remove PSG / BSG: Alkali texturing is performed to form a pyramid structure on the front and back sides, reducing weight by 0.3g-0.35g to improve light utilization. The pyramid is rounded by reacting hydrochloric acid (150ml-200ml) + ozone (40ppm) + hydrofluoric acid (3L-4L) at 20℃ for 500s-600s. The PSG and BSG on the back side are removed by acid washing with hydrofluoric acid (HF), while retaining the polycrystalline silicon layer.
[0049] S11, Double-sided aluminum oxide passivation layer: An 8nm-10nm aluminum oxide (AlOx) passivation layer is deposited on both the front and back sides using an ALD device;
[0050] S12, Double-sided silicon nitride passivation layer: A silicon nitride (SiNx) passivation layer with a thickness of 75nm-80nm and a refractive index of 2.05-2.09 is deposited on the alumina passivation layer using a PECVD device;
[0051] S13, Laser Aperture: Using a laser, the silicon nitride in the designated P and N regions on the back is removed, exposing the P-type polysilicon region and the N-type polysilicon region, forming a PN junction and creating good contact.
[0052] S14, Metallization / Electroplation:
[0053] Metallization: The back electrode is printed using a high-precision screen printing method, and Cu / Ag paste is printed onto the laser-drilled holes, followed by drying and sintering.
[0054] Electroplating: Clean the substrate to form a seed layer (e.g., sputtering Cu), then immerse the substrate in a solution containing the target metal ions (Cu). 2+ The electrolyte is used to reduce and deposit metals (e.g., Cu → Cu) after an electric current is applied. 2+ +2e - Remove the mask, etch away excess material, and form a precision electrode.
[0055] S15. Light Injection: Light injection treatment is performed on the sintered and electroplated silicon wafer to obtain TBC solar cells. The total amount and valence state of H are controlled to improve passivation performance. H atoms in the silicon nitride passivation film are activated by heating. The valence state of the atoms is controlled by light irradiation, so that they combine with recombination centers (defects) in the P+ emitter and N-type substrate to form non-recombination centers, ultimately achieving a good passivation effect, thereby improving Voc and FF and thus improving efficiency.
[0056] S16. Testing: A high-precision machine vision inspection system was used to inspect the surface defects and electrode integrity of the front and back sides of the TBC solar cells; then, under standard test conditions (AM1.5G, 1000W / m... 2 Electrical performance tests were conducted at 25±1℃, measuring parameters including short-circuit current, open-circuit voltage, fill factor, and conversion efficiency. Then, non-destructive testing was performed, including electroluminescence (EL) and photoluminescence (PL) testing. Finally, the batteries were classified and stored according to standards based on the test results.
[0057] Example 1
[0058] The specific steps of a TBC solar cell fabrication method are as follows:
[0059] S1. Alkali polishing: An N-type silicon wafer with a thickness of 110um and a resistivity of 8Ω·cm-9Ω·cm is placed in a wet process tank machine containing KOH, H2O2 and additives. The N-type silicon wafer is subjected to double-sided alkaline polishing at 75℃ to remove the damaged layer and form a highly reflective polished surface. The size of the tower base is controlled at 8um.
[0060] S2, Thick Oxidation: The N-type silicon wafer, after double-sided alkaline polishing, is placed in an LPCVD equipment and deposited for 950s at 600℃ and atmospheric pressure with oxygen introduced at 30000 sccm / s to obtain a silicon dioxide tunneling oxide layer with a thickness of 2nm on both sides. After vacuuming, silane is introduced at a flow rate of 1600 sccm / s and deposited for 3500s at 610℃ and 300Mbar to deposit an intrinsic amorphous silicon layer with a thickness of 230nm outside the silicon dioxide tunneling oxide layer.
[0061] S3. Boron expansion: Boron expansion transforms intrinsic amorphous silicon into P-type polycrystalline silicon. Boron trichloride decomposes at 800℃ to generate elemental boron (B), which transforms intrinsic amorphous silicon into P-type polycrystalline silicon under high temperature. After boron expansion, the back sheet resistance is controlled at 135Ω.
[0062] S4. Laser Patterning: With the pattern set, a laser is used to remove the P-type polysilicon and silicon dioxide tunnel oxide layer in the back-side area to prepare for the deposition of the N-region.
[0063] S5. Pickling and Alkali Polishing: Hydrofluoric acid (HF) is used to pickle the front BSG (borosilicate glass) and the back laser damage on the wet tank machine. KOH, H2O2 and additives are added to the wet tank machine to perform alkaline polishing treatment on the silicon wafer.
[0064] S6, Thin Oxidation: The polished silicon wafer is placed in an LPCVD device, and oxygen is introduced at 15000 sccm / s and atmospheric pressure at 600℃ for 600s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1nm on both sides; after vacuuming, silane is introduced at a flow rate of 1600 sccm / s and deposited at 610℃ and 300Mbar for 1500s to deposit an intrinsic amorphous silicon layer with a thickness of 110nm outside the silicon dioxide tunneling oxide layer;
[0065] S7. Phosphorus diffusion: Phosphorus diffusion transforms intrinsic amorphous silicon into N-type polycrystalline silicon. Phosphorus oxychloride decomposes at 800℃ and reacts with intrinsic amorphous silicon to generate elemental phosphorus (P), which diffuses into the silicon matrix to form a PN junction. After phosphorus diffusion, the back side sheet resistance is controlled at 45Ω.
[0066] S8. Single-sided PSG removal (phosphosilicate glass): The front PSG (phosphosilicate glass) is removed by acid washing with hydrofluoric acid (HF) on a wet tank machine.
[0067] S9, Laser Patterning: Use a laser to remove the PSG (phosphosilicate glass) in the back area to expose the N-type polysilicon area;
[0068] S10. Texturing to remove PSG / BSG: Alkali texturing is performed to form a pyramid structure on the front and back sides, reducing weight by 0.3g-0.35g to improve light utilization. The pyramid is rounded by reacting hydrochloric acid (150ml-200ml) + ozone (40ppm) + hydrofluoric acid (3L-4L) at 20℃ for 500s-600s. The PSG and BSG on the back side are removed by acid washing with hydrofluoric acid (HF), while retaining the polycrystalline silicon layer.
[0069] S11, Double-sided aluminum oxide passivation layer: An 8nm aluminum oxide (AlOx) passivation layer is deposited on both the front and back sides using an ALD device;
[0070] S12, Double-sided silicon nitride passivation layer: A silicon nitride (SiNx) passivation layer with a thickness of 76 nm and a refractive index of 2.05-2.09 is deposited on the alumina passivation layer using a PECVD device;
[0071] S13, Laser Aperture: Using a laser, the silicon nitride in the designated P and N regions on the back is removed, exposing the P-type polysilicon region and the N-type polysilicon region, forming a PN junction and creating good contact.
[0072] S14. Metallization: The Cu / Ag paste is printed onto the laser-drilled hole position by printing the back electrode using a high-precision screen printing method, and then dried and sintered.
[0073] S15. Light Injection: Light injection treatment is performed on the sintered and electroplated silicon wafer to obtain TBC solar cells. The total amount and valence state of H are controlled to improve passivation performance. H atoms in the silicon nitride passivation film are activated by heating. The valence state of the atoms is controlled by light irradiation, so that they combine with recombination centers (defects) in the P+ emitter and N-type substrate to form non-recombination centers, ultimately achieving a good passivation effect, thereby improving Voc and FF and thus improving efficiency.
[0074] S16. Testing: A high-precision machine vision inspection system was used to inspect the surface defects and electrode integrity of the front and back sides of the TBC solar cells; then, under standard test conditions (AM1.5G, 1000W / m... 2 Electrical performance tests were conducted at 25±1℃, measuring parameters including short-circuit current, open-circuit voltage, fill factor, and conversion efficiency. Then, non-destructive testing was performed, including electroluminescence (EL) and photoluminescence (PL) testing. Finally, the batteries were classified and stored according to standards based on the test results.
[0075] Example 2
[0076] The specific steps of a TBC solar cell fabrication method are as follows:
[0077] S1. Alkali polishing: An N-type silicon wafer with a thickness of 130um and a resistivity of 8Ω·cm-9Ω·cm is placed in a wet process tank machine containing KOH, H2O2 and additives. The N-type silicon wafer is subjected to double-sided alkaline polishing at 85℃ to remove the damaged layer and form a highly reflective polished surface. The size of the tower base is controlled at 7um.
[0078] S2, Thick Oxidation: The N-type silicon wafer, after double-sided alkaline polishing, is placed in an LPCVD equipment and deposited for 950s at 600℃ and atmospheric pressure with oxygen introduced at 30000 sccm / s to obtain a silicon dioxide tunneling oxide layer with a thickness of 2nm on both sides. After vacuuming, silane is introduced at a flow rate of 1700 sccm / s and deposited for 4000s at 610℃ and 300Mbar to deposit an intrinsic amorphous silicon layer with a thickness of 260nm outside the silicon dioxide tunneling oxide layer.
[0079] S3. Boron expansion: Boron expansion transforms intrinsic amorphous silicon into P-type polycrystalline silicon. Boron trichloride decomposes at 800℃ to generate elemental boron (B), which transforms intrinsic amorphous silicon into P-type polycrystalline silicon under high temperature. After boron expansion, the back sheet resistance is controlled at 135Ω.
[0080] S4. Laser Patterning: With the pattern set, a laser is used to remove the P-type polysilicon and silicon dioxide tunnel oxide layer in the back-side area to prepare for the deposition of the N-region.
[0081] S5. Pickling and Alkali Polishing: Hydrofluoric acid (HF) is used to pickle the front BSG (borosilicate glass) and the back laser damage on the wet tank machine. KOH, H2O2 and additives are added to the wet tank machine to perform alkaline polishing treatment on the silicon wafer.
[0082] S6, Thin Oxidation: The polished silicon wafer is placed in an LPCVD device, and oxygen is introduced at 15000 sccm / s and atmospheric pressure at 600℃ for 650s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1.5nm on both sides; after vacuuming, silane is introduced at a flow rate of 1600 sccm / s and deposited at 610℃ and 300Mbar for 1600s to deposit an intrinsic amorphous silicon layer with a thickness of 115nm outside the silicon dioxide tunneling oxide layer;
[0083] S7. Phosphorus diffusion: Phosphorus diffusion transforms intrinsic amorphous silicon into N-type polycrystalline silicon. Phosphorus oxychloride decomposes at 800℃ and reacts with intrinsic amorphous silicon to generate elemental phosphorus (P), which diffuses into the silicon matrix to form a PN junction. After phosphorus diffusion, the back side sheet resistance is controlled at 50Ω.
[0084] S8. Single-sided PSG removal (phosphosilicate glass): The front PSG (phosphosilicate glass) is removed by acid washing with hydrofluoric acid (HF) on a wet tank machine.
[0085] S9. Etching paste patterning: Use etching paste to remove the PSG (phosphosilicate glass) in the back-side area to expose the N-type polysilicon area;
[0086] S10. Texturing to remove PSG / BSG: Alkali texturing is performed to form a pyramid structure on the front and back sides, reducing weight by 0.3g-0.35g to improve light utilization. The pyramid is rounded by reacting hydrochloric acid (150ml-200ml) + ozone (40ppm) + hydrofluoric acid (3L-4L) at 20℃ for 500s-600s. The PSG and BSG on the back side are removed by acid washing with hydrofluoric acid (HF), while retaining the polycrystalline silicon layer.
[0087] S11, Double-sided aluminum oxide passivation layer: A 9nm aluminum oxide (AlOx) passivation layer is deposited on both the front and back sides using an ALD device;
[0088] S12, Double-sided silicon nitride passivation layer: A silicon nitride (SiNx) passivation layer with a thickness of 78 nm and a refractive index of 2.05-2.09 is deposited on the alumina passivation layer using a PECVD device;
[0089] S13, Laser Aperture: Using a laser, the silicon nitride in the designated P and N regions on the back is removed, exposing the P-type polysilicon region and the N-type polysilicon region, forming a PN junction and creating good contact.
[0090] S14, Electroplating: Clean the substrate to form a seed layer (e.g., sputtering Cu), then immerse the substrate in a solution containing the target metal ions (Cu). 2+ The electrolyte is used to reduce and deposit metals (e.g., Cu → Cu) after an electric current is applied. 2+ +2e - Remove the mask, etch away excess material, and form a precision electrode.
[0091] S15. Light Injection: Light injection treatment is performed on the sintered and electroplated silicon wafer to obtain TBC solar cells. The total amount and valence state of H are controlled to improve passivation performance. H atoms in the silicon nitride passivation film are activated by heating. The valence state of the atoms is controlled by light irradiation, so that they combine with recombination centers (defects) in the P+ emitter and N-type substrate to form non-recombination centers, ultimately achieving a good passivation effect, thereby improving Voc and FF and thus improving efficiency.
[0092] S16. Testing: A high-precision machine vision inspection system was used to inspect the surface defects and electrode integrity of the front and back sides of the TBC solar cells; then, under standard test conditions (AM1.5G, 1000W / m... 2 Electrical performance tests were conducted at 25±1℃, measuring parameters including short-circuit current, open-circuit voltage, fill factor, and conversion efficiency. Then, non-destructive testing was performed, including electroluminescence (EL) and photoluminescence (PL) testing. Finally, the batteries were classified and stored according to standards based on the test results.
[0093] Example 3
[0094] The specific steps of a TBC solar cell fabrication method are as follows:
[0095] S1. Alkali polishing: An N-type silicon wafer with a thickness of 120um and a resistivity of 8Ω·cm-9Ω·cm is placed in a wet tank machine containing KOH, H2O2 and additives. The N-type silicon wafer is subjected to double-sided alkaline polishing at 75℃ to remove the damaged layer and form a highly reflective polished surface. The size of the tower base is controlled at 8um.
[0096] S2, Thick Oxidation: The N-type silicon wafer, after double-sided alkaline polishing, is placed in an LPCVD device and deposited for 900s at 30000 sccm / s oxygen flow rate and 600℃ atmospheric pressure to obtain a silicon dioxide tunneling oxide layer with a thickness of 2nm on both sides. After vacuuming, silane is introduced at a flow rate of 1700 sccm / s and deposited for 3500s at 610℃ and 300Mbar pressure to deposit an intrinsic amorphous silicon layer with a thickness of 235nm outside the silicon dioxide tunneling oxide layer.
[0097] S3. Boron expansion: Boron expansion transforms intrinsic amorphous silicon into P-type polycrystalline silicon. Boron trichloride decomposes at 800℃ to generate elemental boron (B), which transforms intrinsic amorphous silicon into P-type polycrystalline silicon under high temperature. After boron expansion, the back sheet resistance is controlled at 135Ω.
[0098] S4. Laser Patterning: With the pattern set, a laser is used to remove the P-type polysilicon and silicon dioxide tunnel oxide layer in the back-side area to prepare for the deposition of the N-region.
[0099] S5. Pickling and Alkali Polishing: Hydrofluoric acid (HF) is used to pickle the front BSG (borosilicate glass) and the back laser damage on the wet tank machine. KOH, H2O2 and additives are added to the wet tank machine to perform alkaline polishing treatment on the silicon wafer.
[0100] S6, Thin Oxidation: The polished silicon wafer is placed in an LPCVD device, and oxygen is introduced at 15000 sccm / s and atmospheric pressure at 600℃ for 650s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1.6nm on both sides; after vacuuming, silane is introduced at a flow rate of 1700 sccm / s and deposited at 610℃ and 300Mbar for 1600s to deposit an intrinsic amorphous silicon layer with a thickness of 120nm outside the silicon dioxide tunneling oxide layer;
[0101] S7. Phosphorus diffusion: Phosphorus diffusion transforms intrinsic amorphous silicon into N-type polycrystalline silicon. Phosphorus oxychloride decomposes at 800℃ and reacts with intrinsic amorphous silicon to generate elemental phosphorus (P), which diffuses into the silicon matrix to form a PN junction. After phosphorus diffusion, the back side sheet resistance is controlled at 45Ω.
[0102] S8. Single-sided PSG removal (phosphosilicate glass): The front PSG (phosphosilicate glass) is removed by acid washing with hydrofluoric acid (HF) on a wet tank machine.
[0103] S9, Laser Patterning: Use a laser to remove the PSG (phosphosilicate glass) in the back area to expose the N-type polysilicon area;
[0104] S10. Texturing to remove PSG / BSG: Alkali texturing is performed to form a pyramid structure on the front and back sides, reducing weight by 0.3g-0.35g to improve light utilization. The pyramid is rounded by reacting hydrochloric acid (150ml-200ml) + ozone (40ppm) + hydrofluoric acid (3L-4L) at 20℃ for 500s-600s. The PSG and BSG on the back side are removed by acid washing with hydrofluoric acid (HF), while retaining the polycrystalline silicon layer.
[0105] S11, Double-sided aluminum oxide passivation layer: An 8.5 nm aluminum oxide (AlOx) passivation layer is deposited on both the front and back sides using an ALD device;
[0106] S12, Double-sided silicon nitride passivation layer: A silicon nitride (SiNx) passivation layer with a thickness of 76 nm and a refractive index of 2.05-2.09 is deposited on the alumina passivation layer using a PECVD device;
[0107] S13, Laser Aperture: Using a laser, the silicon nitride in the designated P and N regions on the back is removed, exposing the P-type polysilicon region and the N-type polysilicon region, forming a PN junction and creating good contact.
[0108] S14, Electroplating: Clean the substrate to form a seed layer (e.g., sputtering Cu), then immerse the substrate in a solution containing the target metal ions (Cu). 2+ The electrolyte is used to reduce and deposit metals (e.g., Cu → Cu) after an electric current is applied. 2+ +2e - Remove the mask, etch away excess material, and form a precision electrode.
[0109] S15. Light Injection: Light injection treatment is performed on the sintered and electroplated silicon wafer to obtain TBC solar cells. The total amount and valence state of H are controlled to improve passivation performance. H atoms in the silicon nitride passivation film are activated by heating. The valence state of the atoms is controlled by light irradiation, so that they combine with recombination centers (defects) in the P+ emitter and N-type substrate to form non-recombination centers, ultimately achieving a good passivation effect, thereby improving Voc and FF and thus improving efficiency.
[0110] S16. Testing: A high-precision machine vision inspection system was used to inspect the surface defects and electrode integrity of the front and back sides of the TBC solar cells; then, under standard test conditions (AM1.5G, 1000W / m... 2Electrical performance tests were conducted at 25±1℃, measuring parameters including short-circuit current, open-circuit voltage, fill factor, and conversion efficiency. Then, non-destructive testing was performed, including electroluminescence (EL) and photoluminescence (PL) testing. Finally, the batteries were classified and stored according to standards based on the test results.
[0111] The test results of the TBC solar cells prepared in the above three embodiments are shown in Table 1. It can be seen from the above test data that the TBC solar cell prepared in Example 3 has the best conversion efficiency.
[0112]
[0113] Table 1 Test results for three embodiments
[0114] The preparation method of this invention uses BSG & PSG as masks, and laser patterning / etching paste replaces photolithography and other mask materials, which is highly compatible with existing TOPCON production lines; non-in-situ doping avoids high-temperature diffusion, and the use of silver-copper paste reduces metallization costs; the addition of photoinjection achieves good passivation effect, and improves open-circuit voltage and fill factor.
[0115] In this embodiment of the invention, the term "multiple" refers to two or more, unless otherwise explicitly defined. The terms "install," "connect," and "fix" should be interpreted broadly. For example, "connect" can mean a fixed connection, a detachable connection, or an integral connection. Those skilled in the art can understand the specific meaning of the above terms in this embodiment of the invention based on the specific circumstances.
[0116] In the description of the embodiments of the present invention, it should be understood that the terms "upper" and "lower" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing the embodiments of the present invention and simplifying the description, and do not indicate or imply that the device or unit referred to must have a specific orientation or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of the present invention.
[0117] In the description of this specification, the terms "an embodiment," "a preferred embodiment," etc., refer to a specific feature, structure, material, or characteristic described in connection with that embodiment or example, which is included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0118] The above embodiments are merely illustrative of the technical concept of the present invention and should not be construed as limiting the scope of protection of the present invention. Any modifications made to the technical solutions based on the technical concept proposed in this invention shall fall within the scope of protection of this invention. Technologies not covered in this invention can be implemented using existing technologies.
Claims
1. A method for preparing a TBC solar cell, characterized in that: The preparation method involves the following steps: S1, Alkali Polishing: Double-sided alkaline polishing is performed on the N-type silicon wafer to remove the damaged layer and form a highly reflective polished surface; S2, Thick Oxidation: A silicon dioxide tunneling oxide layer is deposited on both sides of the double-sided alkaline polished N-type silicon wafer, followed by the deposition of a 230nm-260nm intrinsic amorphous silicon layer outside the silicon dioxide tunneling oxide layer; S3, Boron Diffusion: Boron diffusion converts the intrinsic amorphous silicon into P-type polycrystalline silicon; S4, Laser Patterning: With the pattern set, a laser is used... S5. Remove the P-type polysilicon and silicon dioxide tunneling oxide layer from the designated area on the back side to prepare for N-region deposition; S6. Acid pickling and alkaline polishing: Remove the BSG on the front side and laser damage on the back side with hydrofluoric acid, followed by double-sided alkaline polishing of the silicon wafer; S7. Thin oxide: Deposit a silicon dioxide tunneling oxide layer on both sides of the double-sided alkaline polished N-type silicon wafer, and then deposit an intrinsic amorphous silicon layer of 110nm-120nm outside the silicon dioxide tunneling oxide layer; S8. Phosphorus diffusion: Phosphorus diffusion makes the intrinsic amorphous silicon Conversion to N-type polysilicon; S8, Single-sided PSG removal: Hydrofluoric acid pickling removes the PSG on the front side; S9, Laser patterning or etch slurry patterning: Using laser or etch slurry, the PSG in the designated area on the back side is removed, exposing the N-type polysilicon area; S10, Texturing to remove PSG / BSG: Alkali texturing is performed to form a pyramid structure on the front and back sides and the pyramids are rounded; Hydrofluoric acid pickling removes the PSG and BSG on the back side, retaining the polysilicon layer; S11, Double-sided deposition S12. Alumina passivation layer; S13. Double-sided deposition of silicon nitride passivation layer; S14. Laser aperture: Using a laser to remove silicon nitride in designated areas of the P and N regions on the back side, exposing P-type polycrystalline silicon regions and N-type polycrystalline silicon regions, forming a PN junction and establishing good contact; S15. Metallization / electroplating: After metallization, drying and sintering, electroplating to remove the mask and etching excess parts to form precision electrodes; S16. Light injection: Light injection treatment is performed on the sintered and electroplated silicon wafer to obtain a TBC solar cell.
2. The method for preparing a TBC solar cell according to claim 1, characterized in that: The preparation method also includes testing in step S16. The testing process is as follows: a high-precision machine vision inspection system is used to inspect the surface defects and electrode integrity of the front and back of the battery; then, electrical performance testing is performed under standard test conditions, measuring parameters including short-circuit current, open-circuit voltage, fill factor and conversion efficiency; next, non-destructive testing is performed, including electroluminescence detection and photoluminescence detection; finally, the batteries are classified and stored according to the test results and standards.
3. The method for preparing a TBC solar cell according to claim 1, characterized in that: The specific process of alkaline polishing in step S1 is as follows: N-type silicon wafers with a thickness of 110-130um and a resistivity of 8Ω·cm-9Ω·cm are placed in a wet cell containing KOH, H2O2 and additives, and double-sided alkaline polishing is performed on the N-type silicon wafers at 70℃-90℃ to remove the damaged layer and form a highly reflective polished surface. The size of the base is controlled at 7-8um.
4. The method for preparing a TBC solar cell according to claim 1, characterized in that: The specific process of thick oxidation in step S2 is as follows: The N-type silicon wafer after double-sided alkaline polishing is placed in an LPCVD equipment, and oxygen is introduced at a rate of 30000 sccm / s-35000 sccm / s and atmospheric pressure at 600℃-650℃ for 800s-950s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1nm-2nm on both sides. After vacuuming, silane is introduced at a flow rate of 1600 sccm / s-1800 sccm / s and deposited in an environment with a temperature of 600℃-630℃ and a pressure of 280Mbar-310Mbar for 3500s-4000s to deposit an intrinsic amorphous silicon layer with a thickness of 230nm-260nm outside the silicon dioxide tunneling oxide layer.
5. The method for preparing a TBC solar cell according to claim 1, characterized in that: The specific process of thin oxidation in step S6 is as follows: the polished silicon wafer is placed in an LPCVD device, oxygen is introduced at a rate of 15000 sccm / s-18000 sccm / s, and atmospheric pressure at 600℃-650℃ is deposited for 600s-660s to obtain a silicon dioxide tunneling oxide layer with a thickness of 1nm-1.8nm on both sides; after vacuuming, silane is introduced at a flow rate of 1600 sccm / s-1800 sccm / s, and deposition is carried out for 1500s-1600s in an environment with a temperature of 600℃-630℃ and a pressure of 280Mbar-310Mbar to deposit an intrinsic amorphous silicon layer with a thickness of 110nm-120nm outside the silicon dioxide tunneling oxide layer.
6. The method for preparing a TBC solar cell according to claim 1, characterized in that: In step S3, the back sheet resistance of the boron-expanded sample is controlled at 130Ω-150Ω; in step S7, the back sheet resistance of the phosphorus-expanded sample is controlled at 40Ω-50Ω.
7. The method for preparing a TBC solar cell according to claim 1, characterized in that: The weight loss in the alkaline texturing process in step S10 is controlled between 0.3g and 0.35g; the rounding process in step S10 is to round the pyramid using hydrochloric acid + ozone + hydrofluoric acid.
8. The method for preparing a TBC solar cell according to claim 1, characterized in that: The thickness of the alumina passivation layer in step S11 is 8nm-10nm; the thickness of the silicon nitride passivation layer in step S12 is 75nm-80nm and the refractive index is 2.05-2.
09.
9. The method for preparing a TBC solar cell according to claim 1, characterized in that: The metallization in step S14 involves printing the back electrode using a high-precision screen printing method, printing Cu / Ag paste onto the laser-drilled hole location, and then drying and sintering it. The electroplating in step S14 involves cleaning the substrate to form a seed layer, immersing the substrate in an electrolyte containing the target metal ions, and then applying an electric current to reduce and deposit the metal. Remove the mask, etch the excess parts, and form a precision electrode.
10. A TBC solar cell prepared by the preparation method according to any one of claims 1-9.