Space silicon solar cell and solar cell array

Abstract

The invention relates to the technical field of solar cell manufacturing, in particular to a space silicon solar cell and a solar cell array, which comprise a silicon-based solar cell piece and a metalized interconnection electrode, the metalized interconnection electrodes are symmetrically arranged on the front face and the back face of the silicon-based solar cell piece, a plurality of metalized interconnection electrodes are arranged on each face, and the cross section of each metalized interconnection electrode is in a trapezoid shape. And one surface, far away from the silicon-based solar cell, of the section serves as a welding surface and is used for being connected with an interconnection welding strip. According to the space silicon solar cell and the cell array thereof provided by the invention, by adopting the trapezoidal metallization interconnection electrodes, a full-penetration lamination welding interconnection mode and an optimized packaging structure design, the reliability of the solar cell array in a space extreme environment is remarkably improved on the premise that the photoelectric conversion efficiency is maintained; and meanwhile, the cost is effectively reduced.

Description

A space-use silicon solar cell and solar cell array Technical Field

[0001] This invention relates to the field of solar cell manufacturing technology, and in particular to a space-use silicon solar cell and solar cell array. Background Technology

[0002] Solar cells are crucial energy harvesting modules for spacecraft to operate for extended periods. Their primary function is to convert solar energy into electrical energy in sunlit areas to power the spacecraft. Space-based solar arrays are generally classified into four main categories: bulk-mounted solar arrays, rigid planar solar arrays, semi-rigid solar arrays, and flexible solar arrays. The harsh conditions of the space environment, such as extreme high and low temperature cycling, high vacuum, atomic oxygen, ultraviolet radiation, and particle irradiation, place far more stringent requirements on solar array packaging and interconnection technologies than on Earth. Developing high-power, lightweight, and space-environment-resistant solar cells has become a critical issue in contemporary space science exploration. Early space-based solar cells primarily used silicon solar cell technology. However, in the late 1980s, high-efficiency, high-reliability gallium arsenide (GaAs) solar cells gradually replaced silicon solar cells. Nevertheless, the complex device structure and manufacturing process of GaAs solar arrays significantly limit the large-scale development of commercial spaceflight.

[0003] Therefore, there is an urgent need to develop a low-cost solar cell array solution that can withstand the space environment. Considering China's advanced, large, and mature industrial resources in ground-based silicon solar cell technology, developing space-grade silicon solar cell arrays is the only viable option. In all spacecraft missions, power failure of the solar cell array is one of the major causes of mission failure. Possible causes of power failure in traditional gallium arsenide solar cell arrays include open circuits in inter-cell interconnects, open circuits in busbars, diode breakdown, and cell breakage. Interconnects are the weakest link in terms of power failure factors. Interconnects can be simply composed of a single wire, or they can be constructed using a metal mesh and etched or punched metal strips. The function of the interconnects is to conduct the electrical energy generated by each cell to the output cables of the solar cell array within its specified operating life. Therefore, interconnects must have good conductivity, resistance to temperature fluctuations, vibration resistance, shock resistance, and high reliability. Currently, traditional gallium arsenide solar cell arrays typically use Kovar alloy as the interconnect sheet. The interconnect sheet is 10-30µm thick and 2-10mm wide, and a pre-set stress-reducing ring is formed by stamping or shearing. It is then connected to the edge electrode of the solar cell by resistance welding. This interconnection method has the following disadvantages: 1. The welding process window is small, and the welding quality is greatly affected by factors such as current, voltage, surface cleanliness of the interconnect sheet, and heat dissipation environment of the interconnect sheet; 2. If the interconnect sheet is too thin, mechanical damage is easily caused during stamping or shearing, resulting in a decrease in tensile strength; 3. The interconnection area is only at the edge of the solar cell, and if any solar cell in the solar cell string breaks, the entire string interconnection will break, increasing the probability of failure. Summary of the Invention

[0004] In view of this, the present invention proposes a space silicon solar cell and solar cell array, the purpose of which is to provide a space energy harvesting system module with high reliability, high photoelectric conversion efficiency and low cost.

[0005] The technical solution of this invention is implemented as follows: This invention provides a space-use silicon solar cell, comprising:

[0006] Silicon-based solar cells and metallized interconnect electrodes;

[0007] The metallized interconnect electrodes are symmetrically arranged on the front and back sides of the silicon-based solar cell, with a plurality of metallized interconnect electrodes on each side, and the cross-section of the metallized interconnect electrodes is trapezoidal.

[0008] The side of the cross-section furthest from the silicon-based solar cell serves as the welding surface, used for connection with interconnecting solder strips.

[0009] Based on the above technical solutions, preferably, the silicon-based solar cell is any one of a back surface solar cell, an emitter and back surface passivated solar cell, a tunnel oxide passivated contact solar cell, or a heterojunction solar cell; the metallized interconnect electrode is formed by conductive paste screen printing or laser transfer sintering.

[0010] Based on the above technical solutions, preferably, the conductive paste is one or a combination of silver powder, copper powder, and silver-coated copper powder; the silicon-based solar cell substrate is P-type doped monocrystalline silicon.

[0011] Based on the above technical solutions, preferably, the long side of the silicon-based solar cell is ≤110mm, and the aspect ratio of the silicon-based solar cell is 2~3; the width of the metallized interconnect electrode cross-section on the side away from the silicon-based solar cell is smaller than the width on the side closer to the silicon-based solar cell.

[0012] Based on the above technical solutions, preferably, the width of the cross section on the side closer to the silicon-based solar cell is 0.5-0.8mm, the width on the side farther from the silicon-based solar cell is 0.4-0.6mm, and the height of the cross section is 10-15um.

[0013] The present invention also provides a space silicon solar cell array, which, from top to bottom, includes a back film, an adhesive, a solar cell string, an adhesive, and a front film. The solar cell string is formed by welding a plurality of space silicon solar cells as described in any one of claims 1-5 by alternating positive and negative interconnecting strips, and an overlapping area is formed between two adjacent silicon-based solar cells.

[0014] Based on the above technical solutions, preferably, the interconnecting solder strip is one or more of the following: Kovar alloy conductive material coated with a welding coating, pure copper-based conductive material, pure silver-based conductive material, silver-coated copper-based conductive material, and carbon-based conductive material; the adhesive is any one or more of EVA, POE, EPE, and silicone; the front film is any one of ETFE, CPI, pseudo-glass PMG, and ultra-thin glass UTG; and the back film is any one or more of ETFE, CPI, pseudo-glass PMG, ultra-thin glass UTG, glass fiber, carbon fiber, and aluminum honeycomb.

[0015] Based on the above technical solutions, preferably, the width of the interconnecting solder strip is 0.6~0.8mm and the thickness is 0.05~0.15mm; the thickness of the adhesive is 50~200um; the thickness of the front film is 50~120um and the thickness of the back film is 50~120um; and the overlap area is 1~2mm.

[0016] Based on the above technical solutions, preferably, the two ends of the solar cell string are provided with busbars with stress-reducing ring structures. The overlap between the busbars and the solar cell string is 2-5mm. The thickness of the busbars is 15-35um and the width is 8-12mm. The busbars are one or more of the following: Kovar alloy conductive material with a welding coating, pure copper-based conductive material, pure silver-based conductive material, and silver-coated copper-based conductive material.

[0017] Based on the above technical solutions, preferably, the thickness of the welding coating is 5~10um, and the welding coating is one or more combinations of tin-bismuth, tin-silver, indium-tin-silver, and indium-tin-bismuth.

[0018] The space-use silicon solar cell and solar cell array of the present invention have the following advantages over the prior art:

[0019] 1. The space-use silicon solar cell and its array provided by this invention, through the adoption of trapezoidal metallized interconnect electrodes, a fully through-layer stacked welding interconnection method, and an optimized packaging structure design, significantly improves the reliability of the solar cell array in the extreme space environment while maintaining photoelectric conversion efficiency, and effectively reduces costs. This solution utilizes mature terrestrial silicon solar cell technology and process resources to reduce the manufacturing cost of space solar cell arrays to a lower level than traditional gallium arsenide solutions, providing a feasible technical path for the large-scale development of commercial aerospace and possessing significant engineering application value.

[0020] 2. Employing high-efficiency, low-cost crystalline silicon solar cell technology, the photoelectric conversion efficiency exceeds 22% under AMO spectral conditions, solving the inefficiency problem; based on mature silicon solar cell technology, a space-environment-resistant metallized structure design is implemented, which can solve the high and low impact reliability problem of solar cells in space environments; adopting an integrated solar cell string packaging structure, the solar cell array circuit is simpler, greatly simplifying the process, and achieving a mass production yield of over 97%.

[0021] 3. The silicon solar cell array adopts a fully through-hole interconnect welding method, avoiding the problem of open circuit and power loss caused by fragmentation in the traditional tab interconnection method of space solar cells. To solve the problem of resistance to high and low temperature impact deformation in space caused by the fully through-hole interconnect welding method, a dual solution of stacking welding and improving the flatness of the welding surface is adopted. This eliminates the problem of poor welding or no welding free points in the welding strip, greatly improves the constraint force of the welding strip during temperature shock and expansion, achieves no obvious deformation of the welding strip, realizes the perfect overlap of the sub-cell arrangement with the satellite structure, eliminates the risk of solar cell breakage and power loss, and improves system reliability. Attached Figure Description

[0022] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0023] Figure 1 is a side view of the space silicon solar cell of the present invention;

[0024] Figure 2 is a front view of the space silicon solar cell of the present invention;

[0025] Figure 3 is a schematic diagram of the assembly of the space silicon solar cell array of the present invention;

[0026] Figure 4 is a schematic diagram of the structure of the silicon solar cell string in Embodiment 1 of the present invention;

[0027] Figure 5 is a schematic diagram of the silicon solar cell string of Comparative Example 1 of the present invention.

[0028] Figure 6 is a schematic diagram of the silicon solar cell string of Comparative Example 3 of the present invention.

[0029] 1. Silicon solar cell; 101. Silicon-based solar cell; 102. Metallized interconnect electrode; 2. Backsheet; 3. Adhesive; 4. Silicon solar cell string; 401. Interconnect ribbon; 402. Busbar ribbon; 5. Front sheet. Detailed Implementation

[0030] The technical solutions of the present invention will be clearly and completely described below with reference to the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0031] As shown in Figures 1-2, the present invention provides a silicon solar cell for space use. The silicon solar cell 1 includes a silicon-based solar cell 101 and metallized interconnect electrodes 102. The metallized interconnect electrodes 102 are symmetrically arranged on the front and back sides of the silicon-based solar cell 101, and a plurality of metallized interconnect electrodes 102 are arranged on each side. The cross-section of the metallized interconnect electrodes 102 is trapezoidal. The side of the cross-section away from the silicon-based solar cell 101 serves as a welding surface for connection with interconnect solder strips 401.

[0032] This invention achieves a highly reliable connection with the interconnect ribbon 401 by setting trapezoidal metallized interconnect electrodes 102 on both the front and back sides of the silicon-based solar cell 101. The trapezoidal cross-section design creates a flat welding surface on the narrow side away from the silicon-based solar cell 101, which is beneficial for the uniform welding of the interconnect ribbon 401 and avoids the problem of poor soldering caused by uneven electrode surfaces in traditional solutions. Meanwhile, the wide side closer to the silicon-based solar cell 101 provides a larger current collection area and reduces series resistance loss. This structure ensures good electrical performance and significantly improves welding reliability, making it particularly suitable for the extreme temperature conditions in space environments.

[0033] In one embodiment of the present invention, the silicon-based solar cell 101 is any one of the following: aluminum back surface field / back reflection solar cell (BSF / BSR), emitter and back surface passivated solar cell (PERC / PERT), tunnel oxide passivated contact solar cell (Topcon), and heterojunction solar cell (HJT). The substrate of the silicon-based solar cell 101 is p-type doped monocrystalline silicon with a resistivity ranging from 1 to 30 Ω·cm and a surface pyramid texture size of 600-1000 nm. More preferably, the long side of the silicon-based solar cell 101 is ≤110 mm, and the aspect ratio of the silicon-based solar cell 101 is 2 to 3.

[0034] In one embodiment of the present invention, the metallized interconnect electrode 102 is formed by screen printing or laser transfer sintering of conductive paste. The paste selection is determined by the corresponding silicon solar cell 1 technology and can be any one of high-temperature paste or low-temperature paste. More preferably, the conductive paste is one or a combination of silver powder, copper powder, and silver-coated copper powder.

[0035] Specifically, the fabrication process of the metallized interconnect electrode 102 differs for different types of silicon solar cells 1: For high-temperature diffusion cells such as BSF / PERC / Topcon, high-temperature silver paste or copper paste can be screen-printed on a steel plate or laser-transferred and then sintered at 800-900℃ to obtain the metallized interconnect electrode; for low-temperature cells such as HJT, low-temperature silver paste or silver-coated copper paste needs to be cured below 200℃ to ensure the strong adhesion and good conductivity of the metallized interconnect electrode to the solar cell.

[0036] In one embodiment of the present invention, the width of the cross-section of the metallized interconnect electrode 102 on the side away from the silicon-based solar cell 101 is smaller than the width on the side close to the silicon-based solar cell 101. More preferably, the width of the cross-section on the side close to the silicon-based solar cell 101 is 0.5-0.8 mm, and the width on the side away from the silicon-based solar cell 101 is 0.4-0.6 mm, and the roughness of this surface is better than ±2 μm. The height of the cross-section is 10-15 μm.

[0037] As shown in Figures 3-4, the present invention also provides a space silicon solar cell array, which, from top to bottom, includes a back film 2, an adhesive 3, a silicon solar cell string 4, an adhesive 3, and a front film 5. The silicon solar cell string 4 is formed by welding several space silicon solar cells 1 together with alternating positive and negative interconnecting ribbons 401, and an overlapping area is formed between two adjacent silicon-based solar cell sheets 101.

[0038] The solar cell array employs an alternating positive and negative lamination welding structure. Adjacent cells are electrically connected in the overlapping area via interconnecting solder strips 401, forming a series circuit. This fully-through interconnection method ensures that when one or more solar cells break, the current path is not limited to the cell edge but extends through the entire cell via the interconnecting solder strips, thus preventing the entire string from opening due to breakage and significantly improving the system's fracture resistance and reliability. The five-layer structure design (backsheet 2 - adhesive 3 - silicon solar cell string 4 - adhesive 3 - frontsheet 5) forms a complete encapsulation system. The frontsheet 5 provides optical transmission and surface protection, the adhesive 3 provides stress buffering and hermetically sealed packaging, and the backsheet 2 provides mechanical support and backside protection.

[0039] In one embodiment of the present invention, the backsheet 2 is any one or a combination of ETFE, CPI, pseudo-glass PMG, ultra-thin glass UTG, glass fiber, carbon fiber, and aluminum honeycomb, and the thickness of the backsheet 2 is 50~120um. Among them, ETFE has excellent resistance to atomic oxygen and ultraviolet radiation; CPI has good dimensional stability and low gas permeability; pseudo-glass PMG and ultra-thin glass UTG have excellent light transmittance and rigidity; glass fiber, carbon fiber, and aluminum honeycomb can provide structural support and are suitable for rigid or semi-rigid solar cell arrays. The specific selection is based on the actual situation, and the present invention does not limit this.

[0040] In one embodiment of the present invention, the adhesive 3 is any one or a combination of EVA, POE, EPE, and silicone, and the thickness of the adhesive 3 is 50~200um.

[0041] In one embodiment of the present invention, the silicon solar cell string 4 is formed by infrared hot-melt welding of interconnecting solder strips to form a positive and negative electrode stacked structure. The width of the overlapping area between adjacent cells is 1-2 mm, and two layers of adhesive 3 are provided in the overlapping area of ​​the cell string. The width of the adhesive 3 in this area is 3-5 mm.

[0042] Specifically, single silicon-based solar cells 101 are welded together using interconnecting ribbons 401 in an alternating positive and negative electrode configuration. That is, the back side (B side) of the first cell is connected to the front side (A side) of the second cell via interconnecting ribbons 401, the back side of the second cell is then connected to the front side of the third cell via interconnecting ribbons 401, and so on, forming a series structure. During welding, a 1-2mm overlap area is formed between adjacent cells. Too small an overlap area leads to decreased welding reliability and insufficient fracture resistance; too large an overlap area increases shading loss and material costs. The interconnecting ribbons 401 are located within the overlap area and are simultaneously welded to the metallized interconnecting electrodes 102 of the preceding and following cells using infrared thermoforming welding or other welding methods. This stacked welding structure ensures that even if a single cell breaks, current can still be conducted through multiple interconnecting ribbons 401, preventing the entire string from opening.

[0043] By setting two layers of adhesive 3 in the overlapping area (one layer on each side of the battery cell), the adhesive 3 can penetrate and fill the overlapping area from both sides of the battery cell to form a complete encapsulation, effectively avoiding air bubbles and cavities inside the overlapping area.

[0044] The interconnect solder strip 401 is one or more of the following: Kovar alloy conductive material, pure copper-based conductive material, pure silver-based conductive material, silver-coated copper-based conductive material, and carbon-based conductive material coated with a solder coating; the thickness of the solder coating is 5~10um, and the solder coating is one or more of the following: tin-bismuth, tin-silver, indium-tin-silver, and indium-tin-bismuth; the width of the interconnect solder strip 401 is 0.6~0.8mm, and the thickness is 0.05~0.15mm.

[0045] In one embodiment of the present invention, the front film 5 is any one of ETFE, CPI, pseudo-glass PMG, and ultra-thin glass UTG, and the thickness of the front film 5 is 50~120um.

[0046] In one embodiment of the present invention, busbars 402 with stress-reducing ring structures are provided at both ends of the silicon solar cell string 4. The overlap between the busbars 402 and the silicon solar cell string 4 is 2-5 mm. The thickness of the busbars 402 is 15-35 μm and the width is 8-12 mm. The busbars 402 are one or more of the following: Kovar alloy conductive material, pure copper-based conductive material, pure silver-based conductive material, and silver-coated copper-based conductive material coated with a welding coating. The thickness of the welding coating is 5-10 μm, and the welding coating is one or more of the following: tin-bismuth, tin-silver, indium-tin-silver, and indium-tin-bismuth.

[0047] The function of the bus ribbon 402 is to collect the electrical energy generated by the silicon solar cell string 4 and lead it to the external circuit. The stress-reducing ring structure refers to a pre-installed corrugated, serpentine, or mesh structure on the bus ribbon 402. This structure can absorb stress deformation through its own deformation during temperature cycling, preventing stress concentration and subsequent cracking of the weld joint. The bus ribbon 402 overlaps with the silicon solar cell string 4 by 2-5mm, ensuring sufficient welding area while avoiding excessive shading. It is thicker than the interconnect ribbon 401, capable of carrying the entire string current without overheating. The material selection principles for the bus ribbon 402 are the same as for the interconnect ribbon 401, but because it is located at the end of the cell string and experiences more complex stress, the design requirements for the stress-reducing ring structure are more stringent.

[0048] This invention also provides a method for fabricating a space-use silicon solar cell array, comprising the following steps:

[0049] (1) The silicon solar cells 1 are alternately stacked and welded using interconnecting solder ribbon 401 to form a silicon solar cell string;

[0050] (2) Arrange and lay out the stacked and welded battery strings, from top to bottom as back film 2, adhesive 3, battery string, adhesive, front film 5, and set two layers of adhesive 3 in the overlapping area of ​​the battery strings.

[0051] (3) Weld or adhesive bond the interconnecting strips with anti-gravity ring structure to the cells at both ends of the silicon solar cell string;

[0052] (4) Vacuum hot pressing is performed on the above-laid silicon solar cell string 4 to achieve lamination and encapsulation, and a silicon solar cell array is obtained.

[0053] The technical solution of the present invention will be further described below through specific embodiments.

[0054] Example 1

[0055] This embodiment provides a space-use silicon solar cell and solar cell array, as detailed below:

[0056] The silicon solar cell is a silicon heterojunction (HJT) solar cell. The silicon wafer has dimensions of 105*35mm, a thickness of 80µm, a resistivity of 2Ω·cm, double-sided amorphous silicon passivation, and a cerium-doped indium oxide (INO) conductive antireflective layer on the surface. The main grid-shaped metal electrodes are designed using a steel stencil with a fine grid opening size of 22µm and a main grid opening size of 500µm. Metal interconnect electrodes are printed on the HJT blue film. The trapezoidal electrode has a lower width of 0.7mm, a upper width of 0.5mm, a height of 11µm, and a surface roughness of 2µm. After curing and sintering, the HJT solar cell is obtained.

[0057] The above-mentioned HJT solar cells are formed by infrared hot-melt welding of silver-coated copper interconnecting ribbons to form positive and negative electrode stacking to form a solar cell string. The overlap area between the cells is 2.5 mm wide, the interconnecting ribbon is 0.6 mm wide and 0.05 mm thick, and the coating thickness is 10 μm.

[0058] A Kovar alloy with a stress-reducing ring structure is bonded to the solar cells at both ends of the battery string using conductive adhesive as a busbar. The Kovar alloy is 15µm thick and 8mm wide, and the overlap width between the Kovar busbar and the solar cell is 3mm, as shown in Figure 4.

[0059] The solar cell string with stress-reducing rings is arranged and packaged. The back film is made of 100um thick PI, the adhesive is made of 200um thick POE, and the front film is made of 60um thick ultra-thin glass UTG. The structure from bottom to top is PI / POE / solar cell string / POE / UTG.

[0060] The above-arranged structural components are placed in a laminator for vacuum hot pressing at a heating temperature of 160℃, a lamination time of 45 minutes, and a vacuum degree of 100Pa. After hot pressing, the sample is removed to obtain a silicon solar cell array.

[0061] Comparative Example 1

[0062] This comparative example provides a space silicon solar cell and solar cell array. The solar cell string welding method and layout packaging method are the same as in Example 1. The welding strips at both ends of the cell string are stretched and reserved by 20-50mm. After the string is assembled, stress-reducing rings are stamped at both ends 3-5mm away from the edge of the cell, as shown in Figure 5.

[0063] Comparative Example 2

[0064] This comparative example provides a space-use silicon solar cell and solar cell array. The structure of the solar cell and cell string is the same as in Example 1, except that the adhesive POE is replaced with silicone. The solar cell array, from bottom to top, consists of PI / silicone / solar cell string / silicone / UTG. The encapsulation method involves placing the PI backing film on a tray, then applying a layer of silicone with a thickness of 1µm onto the PI, the silicone pattern being 4mm smaller than the solar cell string; transferring the solar cell string to the silicone-coated PI according to the pattern and positioning frame; continuing to apply silicone to the solar cell string using a syringe; and finally covering the silicone with UTG glass.

[0065] The above structure was placed in a vacuum negative pressure platform. First, the vacuum was evacuated to below 10 Pa to complete the degassing of the silicone. After vacuum degassing for 20 minutes, pressure was applied for 3 hours. Finally, the silicone was heated under experimental conditions to solidify. The heating temperature was 80℃ and the heating time was 60 minutes. After solidification, the sample was taken out to obtain the silicon solar cell array.

[0066] Comparative Example 3

[0067] This comparative example provides a space silicon solar cell and solar cell array. The solar cell strings adopt the traditional solar cell interconnect electrode printing method and string soldering method. The solar cell spacing is 2mm. The layout, encapsulation film and lamination method are the same as in Example 1. From bottom to top, the structure is PI / POE / solar cell string / POE / UTG. The series connection of the solar cell strings is shown in Figure 6.

[0068] Performance testing

[0069] The solar cell arrays prepared in the examples and comparative examples were subjected to space environment resistance tests, and the output power under different conditions is shown in Table 1.

[0070] Table 1

[0071] Test Item Example 1 Comparative Example 1 Comparative Example 2 Comparative Example 3 Appearance after high and low temperature shock and thermal vacuum (±100℃ cyclic shock 5000 times, thermal vacuum 4.5 cycles) No obvious abnormalities in appearance. After high and low temperature shock, the stress-reducing ring has slight deformation. No obvious abnormalities in appearance. After high and low temperature shock, the stress-reducing ring deforms. The surface weld strip has slight deformation. No obvious abnormalities in appearance. After high and low temperature shock, the stress-reducing ring has slight deformation. After thermal vacuum, a small number of bubbles appear on the surface. After high and low temperature shock, the weld strip is obviously deformed, the weld strip bulges severely at 2mm between cells, and the surface weld strip has obvious random bulging. AM0 solar cell array power output 5.13w 5.21w 5.18w 5.23w Power output after 1 solar cell is broken 4.89w 4.35w 4.52w 4.75w Power output after 2 solar cells are broken 4.05w 4.10w 3.98w 3.86w surface

[0072] As shown in Table 1, compared with Example 1, the present invention, due to the careful consideration of the matching of the thermal expansion coefficient of the adhesive film to the structural system, achieves better strain control of the solar cell array under high and low temperature impacts. In Comparative Example 1, the thermal expansion coefficient of the copper solder strip is larger than that of Kovar alloy in Example 1, and the stress-reducing ring exhibits certain deformation after high and low temperature impacts.

[0073] Compared with Example 1 and Comparative Example 2, the present invention, because the adhesive film is selected with full consideration of the matching of the thermal expansion coefficient required by the adhesive in the structural system, the strain of the solar cell array under high and low temperature impact is better controlled, and its resistance to space environment is slightly better than the traditional silicone solution in Comparative Example 2.

[0074] Comparing Example 1 and Comparative Example 3, because the solar cells and interconnect welding methods in Comparative Example 3 both adopt existing conventional solutions, the interconnect electrodes of the solar cells have poor flatness, insufficient bonding between the solder strips and electrodes during solder strip interconnection, and numerous cold solder joints. Therefore, after high and low temperature shocks, the stress expansion and contraction at the cold solder joints are the weakest, forming deformation protrusions. In addition, the microcavities in this uneven electrode and solder strip welding method make it difficult for the adhesive to fully fill the gaps. After lamination and encapsulation, many microbubble cavities are formed at the edges of the solder strips. Under thermal vacuum conditions, these microbubble cavities penetrate and aggregate to form large surface bubbles. Although the inter-cell spacing has been increased to 2 mm, the solder strip deformation at the inter-cell spacing in Comparative Example 3, which uses a conventional solution, is still very severe after high and low temperature shocks. This is because the welding at the inter-cell spacing is in a relatively free state without any constraints, and becomes the concentration point after all the stress is transferred during the expansion and contraction of the solder strips during high and low temperature shocks.

[0075] Compared with Example 1 and Comparative Examples 1-3, the space solar cell array of the present invention with a fully interconnected method exhibits better shock resistance. Even after being subjected to external mechanical impact and developing obvious EL cracks, the output power of the solar cell array remains good and will not cause power loss.

[0076] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A silicon solar cell for space use, characterized in that, include: Silicon-based solar cell and metallized interconnect electrodes; the metallized interconnect electrodes are symmetrically arranged on the front and back sides of the silicon-based solar cell, and several metallized interconnect electrodes are arranged on each side. The cross-section of the metallized interconnect electrodes is trapezoidal; the side of the cross-section away from the silicon-based solar cell serves as a welding surface for connection with interconnect solder strips.

2. A space-use silicon solar cell as described in claim 1, characterized in that: The silicon-based solar cell is any one of the following: back surface solar cell, emitter and back surface passivated solar cell, tunnel oxide passivated contact solar cell, and heterojunction solar cell; the metallized interconnect electrode is formed by conductive paste screen printing or laser transfer sintering.

3. A space-use silicon solar cell as described in claim 2, characterized in that: The conductive paste is one or a combination of silver powder, copper powder, and silver-coated copper powder; the silicon-based solar cell substrate is P-type doped monocrystalline silicon.

4. A space-use silicon solar cell as described in claim 1, characterized in that: The long side of the silicon-based solar cell is ≤110mm, and the aspect ratio of the silicon-based solar cell is 2~3; the width of the metallized interconnect electrode cross-section on the side away from the silicon-based solar cell is smaller than the width on the side closer to the silicon-based solar cell.

5. A space-use silicon solar cell as described in claim 4, characterized in that: The width of the cross section is 0.5-0.8 mm on the side closest to the silicon-based solar cell and 0.4-0.6 mm on the side furthest from the silicon-based solar cell. The height of the cross section is 10-15 μm.

6. A space-use silicon solar cell array, characterized in that: From top to bottom, it includes a back film, adhesive, solar cell string, adhesive and front film. The solar cell string is formed by welding several space silicon solar cells as described in any one of claims 1-5 by alternating positive and negative interconnecting ribbons, and an overlapping area is formed between two adjacent silicon-based solar cells.

7. A space-use silicon solar cell array as described in claim 6, characterized in that: The interconnecting solder strip is one or more of the following: Kovar alloy conductive material coated with a welding coating, pure copper-based conductive material, pure silver-based conductive material, silver-coated copper-based conductive material, and carbon-based conductive material; the adhesive is any one or more of the following: EVA, POE, EPE, and silicone; the front film is any one of the following: ETFE, CPI, pseudo-glass PMG, and ultra-thin glass UTG; the back film is any one or more of the following: ETFE, CPI, pseudo-glass PMG, ultra-thin glass UTG, glass fiber, carbon fiber, and aluminum honeycomb.

8. A space-use silicon solar cell array as described in claim 6, characterized in that: The interconnect solder strip has a width of 0.6~0.8mm and a thickness of 0.05~0.15mm; the adhesive thickness is 50~200um; the front film thickness is 50~120um; and the back film thickness is 50~120um. The overlapping area is 1~2mm.

9. A space-use silicon solar cell array as described in claim 7, characterized in that: The solar cell string has busbars with stress-reducing ring structures at both ends. The overlap between the busbars and the solar cell string is 2-5mm. The thickness of the busbars is 15-35um and the width is 8-12mm. The busbars are one or more of the following: Kovar alloy conductive material with a welding coating, pure copper-based conductive material, pure silver-based conductive material, and silver-coated copper-based conductive material.

10. A space-use silicon solar cell as described in claim 9, characterized in that: The thickness of the welding coating is 5~10um, and the welding coating is one or a combination of tin-bismuth, tin-silver, indium-tin-silver, and indium-tin-bismuth.

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