Halftone display driving method and device based on HDMI video signal

Abstract

The invention discloses a halftone display driving method and device based on an HDMI video signal, and relates to the technical field of signal processing. The method comprises the following steps: acquiring an HDMI video signal; decoding the HDMI video signal to obtain pixel data and a synchronizing signal; based on the synchronization signal, performing halftone mapping operation on each row of pixels of the pixel data to obtain a binary control signal; and driving the binary display device to perform color display according to the binary control signal. The binary display device can be directly driven, the cost is low, the response is fast, the power consumption is low, and the universality is good.

Description

Technical Field

[0001] This application relates to the field of signal processing technology, and in particular to a halftone display driving method and apparatus based on HDMI video signals. Background Technology

[0002] High Definition Multimedia Interface (HDMI) is a fully digital video and audio transmission interface that can send uncompressed audio and video signals. HDMI can be used in devices such as set-top boxes, DVD players, personal computers, televisions, game consoles, integrated amplifiers, digital audio systems, and televisions.

[0003] Currently, HDMI video signals are only suitable for grayscale RGB display devices and cannot directly and efficiently drive binary display devices. Therefore, how to directly and efficiently drive binary display devices based on HDMI video signals has become an urgent problem to be solved. Summary of the Invention

[0004] The purpose of this application is to provide a halftone display driving method and apparatus based on HDMI video signals, which can directly drive binary display devices, and has low cost, fast response, low power consumption and good versatility.

[0005] To achieve the above objectives, this application provides the following solution: In a first aspect, this application provides a halftone display driving method based on HDMI video signals, including: Acquire HDMI video signal; The HDMI video signal is decoded to obtain pixel data and synchronization signal; Based on the synchronization signal, a halftone mapping operation is performed on each row of pixels in the pixel data to obtain a binary control signal; The binary control signal drives the binary display device to perform color display.

[0006] In one embodiment, based on the synchronization signal, a halftone mapping operation is performed on each row of pixels in the pixel data to obtain a binary control signal, specifically including: Based on the synchronization signal, pixel coordinates synchronized with the HDMI clock are generated; Write each row of pixels from the pixel data into the halftone calculation buffer; For the current row of pixels, read the pixel at the pixel coordinates, and perform halftone mapping operation using the halftone algorithm based on the pixel coordinates and the read pixel to obtain the current binary control signal.

[0007] In one embodiment, for the current row of pixels, the pixel at the pixel coordinates is read, and based on the pixel coordinates and the read pixel, a halftone mapping operation is performed using a halftone algorithm to obtain the current binary control signal, specifically including: For the current row of pixels, read the pixel at the pixel coordinates, and perform halftone mapping operation using the ordered dithering method or the error diffusion method based on the pixel coordinates and the read pixel to obtain the current binary control signal.

[0008] In one embodiment, the halftone display driving method based on HDMI video signals further includes: The parameters in the halftone algorithm are dynamically adjusted based on the input resolution, pixel clock frequency, and refresh rate of the HDMI video signal.

[0009] In one embodiment, the HDMI video signal is decoded to obtain pixel data and a synchronization signal, specifically including: The HDMI video signal is decoded using a minimized differential transmission decoding algorithm to obtain pixel data and synchronization signals.

[0010] In one embodiment, the binary control signal includes: a binary data shift signal and a shift clock.

[0011] In one embodiment, the synchronization signal includes: a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a pixel clock signal.

[0012] Secondly, this application provides a halftone display driver based on an HDMI video signal, comprising: An HDMI video signal receiving module is used to acquire HDMI video signals. The signal decoding module is used to decode the HDMI video signal to obtain pixel data and synchronization signals; The halftone conversion module is used to perform halftone mapping operations on each row of pixels of the pixel data based on the synchronization signal to obtain a binary control signal; The output control module is used to drive the binary display device to perform color display according to the binary control signal.

[0013] In one embodiment, the halftone conversion module specifically includes: A pixel coordinate generation unit is used to generate pixel coordinates synchronized with the HDMI clock based on the synchronization signal; A row buffer write unit is used to write each row of pixels of the pixel data into a halftone calculation buffer; The halftone processing unit is used to read the pixel at the pixel coordinates for the current row of pixels, and perform halftone mapping operation using the halftone algorithm based on the pixel coordinates and the read pixel to obtain the current binary control signal.

[0014] In one embodiment, the halftone display driver based on the HDMI video signal further includes: The parameter adaptive module is used to dynamically adjust the parameters in the halftone algorithm according to the input resolution, pixel clock frequency and refresh rate of the HDMI video signal.

[0015] According to the specific embodiments provided in this application, this application has the following technical effects: This application provides a halftone display driving method and apparatus based on HDMI video signals. The method decodes the HDMI video signal to obtain pixel data and a synchronization signal. Based on the synchronization signal, halftone mapping is performed on each row of pixels in the pixel data to obtain a binary control signal, thereby driving a binary display device to display in color. This application eliminates the need for multi-bit PWM grayscale modulation and complex DAC circuits, significantly simplifying the control logic and data path, thus significantly reducing system costs. It employs row-level pipelines and halftone mapping operations, eliminating the need for full-frame buffering, resulting in low system latency and fast response. Binary switch control reduces LED conduction time and PWM high-frequency losses, effectively reducing power consumption and heat. The HDMI video signal can be directly input without modification, making it applicable to various binary display devices and exhibiting good versatility and scalability. Therefore, this application can directly drive binary display devices, offering low cost, fast response, low power consumption, and good versatility. Attached Figure Description

[0016] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 A flowchart illustrating a halftone display driving method based on HDMI video signals provided in an embodiment of this application; Figure 2 A schematic diagram illustrating the generation of pixel coordinates synchronized with the HDMI clock, provided in an embodiment of this application; Figure 3 A schematic diagram illustrating the writing of the current row pixels into the halftone calculation buffer, provided for an embodiment of this application; Figure 4 A schematic diagram illustrating halftone mapping operations using an error diffusion algorithm, provided for an embodiment of this application; Figure 5 A schematic diagram of the timing relationship of the error propagation algorithm provided in the embodiments of this application; Figure 6 This is a schematic diagram of the structure of the system matrix memory provided in the embodiments of this application; Figure 7 This is a functional module diagram of a halftone display driver device based on HDMI video signals, provided in an embodiment of this application. Detailed Implementation

[0018] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0020] To overcome the problem that existing HDMI video signals are only suitable for grayscale RGB display devices and cannot directly and efficiently drive binary display devices, this application proposes a real-time halftone display driving scheme based on HDMI video signals. This application can convert continuous grayscale pixel data into binary display control signals through a real-time halftone conversion algorithm without changing the HDMI protocol and video source format, and directly drive binary display devices such as LED arrays, Micro-LED arrays, and DLP digital micromirror arrays to achieve high-quality color image display.

[0021] In one exemplary embodiment, such as Figure 1 As shown, a halftone display driving method based on HDMI video signals is provided, including: Step 101: Obtain the HDMI video signal.

[0022] Step 102: Decode the HDMI video signal to obtain pixel data and synchronization signal.

[0023] Step 103: Based on the synchronization signal, perform halftone mapping operation on each row of pixels of the pixel data to obtain a binary control signal.

[0024] Step 104: Drive the binary display device to perform color display according to the binary control signal.

[0025] In another exemplary embodiment of this application, step 102 specifically includes: decoding the HDMI video signal using a Transition Minimized Differential Signaling (TMDS) decoding algorithm to obtain pixel data and synchronization signals.

[0026] The synchronization signals include: vertical synchronization signal (HSYNC), horizontal synchronization signal (VSYNC), data enable signal (DE), and pixel clock signal (PixelClock).

[0027] In another exemplary embodiment of this application, step 103 specifically includes: (1) Based on the synchronization signal, generate pixel coordinates synchronized with the HDMI clock.

[0028] (2) Write each row of pixels of the pixel data into the halftone calculation buffer.

[0029] (3) For the current row pixel, read the pixel at the pixel coordinates, and perform halftone mapping operation using a halftone algorithm based on the pixel coordinates and the read pixel to obtain the current binary control signal. Specifically: For the current row pixel, read the pixel at the pixel coordinates, and perform halftone mapping operation using ordered dithering, error diffusion, or other equivalent spatial dithering algorithms based on the pixel coordinates and the read pixel to obtain the current binary control signal. The binary control signal includes: a binary data shift signal and a shift clock.

[0030] In another exemplary embodiment of this application, the halftone display driving method based on HDMI video signals further includes: dynamically adjusting the parameters (halftone threshold, error weight, or mask period, etc.) in the halftone algorithm according to the input resolution, pixel clock frequency, and refresh rate of the HDMI video signal, so as to obtain stable brightness and color performance under different display specifications.

[0031] The following section uses the error diffusion method as an example to introduce a more specific implementation process of the halftone display driving method based on HDMI video signals.

[0032] The overall implementation process is as follows: Step S1: HDMI signal reception. Receive the HDMI video signal and extract RGB pixel data and synchronization signals.

[0033] Step S2: Row-level halftone conversion. During the row-enabled period, a halftone algorithm is performed on each row of pixels to convert the grayscale value into the corresponding binary control signal.

[0034] Step S3: Synchronous Output Control. The binarized pixel data is output according to the HDMI timing sequence to directly drive the RGB binary display unit to form a color display. Two output formats are used: the unchanging HDMI format and a dedicated drive signal format.

[0035] Step S4: Optional parameter adjustment. The halftone algorithm parameters are automatically adjusted based on the input resolution and refresh rate to match the display device characteristics.

[0036] The specific implementation process is as follows: 1. Generate pixel coordinates (x, y) synchronized with the HDMI clock from the HDMI video signal. Extract the vertical and horizontal sync signals from channel 0, and combine them with the HDMI bus clock to generate the image coordinates (x, y) corresponding to the current data. Figure 2 As shown, this is the reference position for subsequent halftone calculations.

[0037] 2. Construct a K-row halftone calculation buffer, with the number of columns equal to the horizontal pixel count of the input image. It is a dual-port static RAM. Write operations are synchronized with error data calculated from the HDMI input signal, while read operations are synchronized with the calculations of the halftone calculation hardware module. It has a sliding start row pointer that continuously writes the current row pixel data from the HDMI input into this buffer.

[0038] For the error diffusion algorithm, K=2 can be chosen, meaning that only the halftone error values ​​corresponding to the diffusion from the previous row of image data need to be saved, such as... Figure 3 As shown.

[0039] 3. A halftone processing unit, which can employ the classic Floyd & Steinberg error diffusion algorithm or other modified algorithms. After calculating the halftone result for each pixel, it generates the next output HDMI video signal (at which point the grayscale values ​​are only 0 and 255) for HDMI system compatibility. Depending on the specific display device's drive signal, the most common method is to shift the halftone 0 / 1 binary signal into the display device (in conjunction with other auxiliary control signals), such as... Figure 4 As shown.

[0040] For algorithms like Floyd and Steinberg, the timing relationships used in error propagation algorithms are as follows: Figure 5 As shown, this achieves the lowest latency output signal generation effect, requiring only a few HDMI clock cycles of delay between the input HDMI video signal and the output signal (i.e., the hardware processing delay required for halftone output). Figure 5In this process, the halftone value of the current pixel is determined by calculating each pixel row by row, while simultaneously propagating the error to the neighborhood. Therefore, only a pixel buffer of a certain number of rows that can cover the height of the neighborhood is needed. When calculating the halftone value of a pixel, a "computation buffer" is required—its contents are read from the pixel buffer consisting of the aforementioned rows. As the calculation proceeds, this "computation buffer" forms a moving sliding window on these pixel buffer rows. The calculation result is written back to the pixel buffer from the left side of the window, while the data in the pixel buffer on the right side enters the "computation buffer".

[0041] The halftone algorithm interface supports matrix weight parameterization and can adapt to various algorithm models such as error propagation, blue noise, and ordered jitter. The output timing remains consistent across different algorithms, with only the coefficient matrix and error propagation path changing.

[0042] Traditional methods can only save the input frame of data in the image buffer, and then perform halftone conversion. The output signal can only be generated after these two delays, which are at the frame level. This embodiment is at the pixel level. According to the three levels of frame, line and pixel, this embodiment is two levels faster.

[0043] This embodiment provides two output interfaces: (1) standard HDMI output (grayscale 0 / 255 compatible format); (2) dedicated parallel binary signal interface (which can directly drive the LED array via a shift clock). Either one can be selected and configured by writing to the output mode selection register via IIC.

[0044] 4. The hardware model of the halftone processing unit is fixed, meaning it operates within the buffer. Each 8-bit state unit has a diffusion coefficient The system needs to accumulate the numerical error. Therefore, it also requires a coefficient matrix memory of the same size as the calculation buffer—corresponding to the initial error being propagated to the algorithm's supported range through a coefficient table after the current pixel has been thresholded. A single coefficient matrix can cover both classic and other variations of the algorithm; that is, on a general-purpose hardware, combined with a… The coefficient matrix can support all similar algorithms, such as... Figure 6 As shown, for a pixel to be calculated, it obtains its diffusion coefficient with respect to other pixels from the diffusion coefficient matrix, and then the error is weighted according to the coefficient and added to the other pixels in the neighborhood.

[0045] 5. Parameter adaptive adjustment and algorithm parameter configuration via the IIC bus by reading specific addresses. The image row and column amplitudes are automatically obtained through the HDMI input signal via HSYNC / VSYNC provided by channel 0 and clock counting. The working range of the RAM data area is automatically adjusted according to the input resolution of the HDMI video signal, pixel clock frequency, and horizontal and vertical sync signal period. By expanding the HDMI EDID and defining a new writable address range, halftone algorithms and parameters can be selected, including supported radii and the diffusion coefficient matrix corresponding to the error allocation scheme.

[0046] The following is a feasible register, as shown in Table 1: Table 1 Feasible Registers

[0047] The key design points are as follows.

[0048] Indirect addressing: Use COEFF_INDEX + COEFF_DATA + COMMIT to write coefficient tables (matrices, diffusion templates, etc.) of arbitrary size to avoid mapping too many register addresses.

[0049] Double buffering / shadow register: Parameters during operation are placed in the shadow page. After writing, CONTROL.APPLY=1 is used to switch the page all at once to avoid screen tearing.

[0050] Standardize the format for fixed points: for example, use Q1.15 (-1.0..+0.9999) for error spread weights and Q8.8 for thresholds / gains. Clearly specify the range and overflow strategy in the documentation.

[0051] Timeout rollback: After applying, a timeout watchdog is set. If BUSY is not cleared or the screen is abnormal, it will automatically return to the SAFE_MODE preset.

[0052] Versioning: DEVICE_ID / FW_VERSION is fixed and readable, making it easy for the host computer to be compatible with different firmware.

[0053] Based on the same inventive concept, this application also provides an HDMI video signal-based halftone display driving device for implementing the above-described HDMI video signal-based halftone display driving method. The solution provided by this device is similar to the implementation described in the above method. Therefore, the specific limitations in one or more embodiments of the HDMI video signal-based halftone display driving device provided below can be found in the above-described limitations of the HDMI video signal-based halftone display driving method, and will not be repeated here.

[0054] In one exemplary embodiment, such as Figure 7As shown, a halftone display driver based on an HDMI video signal is provided, comprising: The HDMI video signal receiving module 701 is used to acquire HDMI video signals.

[0055] The signal decoding module 702 is used to decode the HDMI video signal to obtain pixel data and synchronization signals.

[0056] The halftone conversion module 703 is used to perform halftone mapping operations on each row of pixels of the pixel data based on the synchronization signal to obtain a binary control signal.

[0057] The output control module 704 is used to drive the binary display device to perform color display according to the binary control signal.

[0058] As an optional implementation, the halftone conversion module 703 specifically includes: A pixel coordinate generation unit is used to generate pixel coordinates synchronized with the HDMI clock based on the synchronization signal.

[0059] The row buffer write unit is used to write each row of pixels of the pixel data into the halftone calculation buffer.

[0060] The halftone processing unit is used to read the pixel at the pixel coordinates for the current row of pixels, and perform halftone mapping operation using the halftone algorithm based on the pixel coordinates and the read pixel to obtain the current binary control signal.

[0061] As an optional implementation method, such as Figure 7 As shown, the halftone display driver based on HDMI video signals further includes a parameter adaptive module 705, used to dynamically adjust the parameters in the halftone algorithm according to the input resolution, pixel clock frequency and refresh rate of the HDMI video signal.

[0062] The halftone display driver based on HDMI video signals in this embodiment adopts a fully hardware-based solution, implemented using FPGA and ASIC.

[0063] Among them, the HDMI video signal receiving module 701 receives HDMI digital video signals from an external video source.

[0064] The signal decoding module 702 obtains pixel data and synchronization signals (HSYNC, VSYNC, DE, PixelClock) through TMDS decoding.

[0065] The halftone conversion module 703 performs halftone mapping operations on the input RGB grayscale data according to the horizontal and vertical sync signals during the display period (DE=1), converting the multi-bit grayscale signal into a binary signal in real time. This module adopts a horizontal buffer structure and a horizontal pipelined operation, achieving low-latency binarization processing without the need for full-frame buffering.

[0066] The output control module 704 synchronously outputs the binarized pixel data based on the horizontal / vertical synchronization signals, generating a binary RGB control signal consistent with the scanning timing of the binary display device. The output signal can be directly connected to the drive port of the binary display device array, or it can be used for light intensity modulation through switching display units such as LED, Micro-LED, and DLP micromirrors to achieve the display of color images.

[0067] The parameter adaptive module 705 dynamically adjusts the halftone threshold, error weight, or mask period based on the HDMI video signal input resolution, pixel clock frequency, and refresh rate to achieve stable brightness and color performance under different display specifications.

[0068] The halftone display driving method or apparatus based on HDMI video signals in this application has the following advantages compared with existing HDMI grayscale display solutions: (1) Simplified structure and reduced cost. Multi-bit PWM grayscale modulation and complex DAC circuits are no longer needed. The control logic and data path are greatly simplified, which can significantly reduce the system cost.

[0069] (2) Low latency and high refresh rate. The system adopts a row-level pipeline and a real-time halftone algorithm, which eliminates the need for full-frame buffering. The system has low latency and high refresh rate, making it suitable for high-speed dynamic image display.

[0070] (3) Low power consumption and high reliability. Binary switch control reduces LED conduction time and PWM high-frequency loss, effectively reducing power consumption and heat, and improving system stability.

[0071] (4) Strong compatibility. HDMI video signals can be directly input without modification, and the system can be used with various binary display terminals, with good versatility and expandability.

[0072] This application can be widely used in: outdoor color LED displays; high-speed industrial vision display and exposure systems; DLP micromirror array light modulation equipment; Micro-LED display modules; color electronic paper and low-power display terminals, etc.

[0073] This application leverages the standardization advantages of HDMI video signals to achieve efficient conversion from grayscale video to binary color display through real-time halftone mapping. Without altering the video transmission standard, it enables direct driving of binary display devices, combining advantages such as "versatility, low cost, low power consumption, and high-speed response." It provides a feasible and effective approach for the application of binary display technology in the field of high-definition display, possessing strong engineering practical significance and industrial promotion value.

[0074] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0075] This document uses specific examples to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the methods and core ideas of this application. Furthermore, those skilled in the art will recognize that, based on the ideas of this application, there will be changes in the specific implementation methods and application scope. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A halftone display driving method based on HDMI video signals, characterized in that, The halftone display driving method based on HDMI video signals includes: Acquire HDMI video signal; The HDMI video signal is decoded to obtain pixel data and synchronization signal; Based on the synchronization signal, a halftone mapping operation is performed on each row of pixels in the pixel data to obtain a binary control signal; The binary control signal drives the binary display device to perform color display.

2. The halftone display driving method based on HDMI video signals according to claim 1, characterized in that, Based on the synchronization signal, a halftone mapping operation is performed on each row of pixels in the pixel data to obtain a binary control signal, specifically including: Based on the synchronization signal, pixel coordinates synchronized with the HDMI clock are generated; Write each row of pixels from the pixel data into the halftone calculation buffer; For the current row of pixels, read the pixel at the pixel coordinates, and perform halftone mapping operation using the halftone algorithm based on the pixel coordinates and the read pixel to obtain the current binary control signal.

3. The halftone display driving method based on HDMI video signals according to claim 2, characterized in that, For the current row pixel, the pixel at the specified pixel coordinates is read. Based on the pixel coordinates and the read pixel, a halftone mapping operation is performed using a halftone algorithm to obtain the current binary control signal, specifically including: For the current row of pixels, read the pixel at the pixel coordinates, and perform halftone mapping operation using the ordered dithering method or the error diffusion method based on the pixel coordinates and the read pixel to obtain the current binary control signal.

4. The halftone display driving method based on HDMI video signals according to claim 2, characterized in that, The halftone display driving method based on HDMI video signals further includes: The parameters in the halftone algorithm are dynamically adjusted based on the input resolution, pixel clock frequency, and refresh rate of the HDMI video signal.

5. The halftone display driving method based on HDMI video signals according to claim 1, characterized in that, Decoding the HDMI video signal to obtain pixel data and synchronization signals specifically includes: The HDMI video signal is decoded using a minimized differential transmission decoding algorithm to obtain pixel data and synchronization signals.

6. The halftone display driving method based on HDMI video signals according to claim 1, characterized in that, The binary control signal includes: a binary data shift signal and a shift clock.

7. The halftone display driving method based on HDMI video signals according to claim 1, characterized in that, The synchronization signals include: vertical synchronization signal, horizontal synchronization signal, data enable signal, and pixel clock signal.

8. A halftone display driver based on HDMI video signals, characterized in that, The halftone display driver based on HDMI video signals includes: An HDMI video signal receiving module is used to acquire HDMI video signals. The signal decoding module is used to decode the HDMI video signal to obtain pixel data and synchronization signals; The halftone conversion module is used to perform halftone mapping operations on each row of pixels of the pixel data based on the synchronization signal to obtain a binary control signal; The output control module is used to drive the binary display device to perform color display according to the binary control signal.

9. The halftone display driving device based on HDMI video signals according to claim 8, characterized in that, The halftone conversion module specifically includes: A pixel coordinate generation unit is used to generate pixel coordinates synchronized with the HDMI clock based on the synchronization signal; A row buffer write unit is used to write each row of pixels of the pixel data into a halftone calculation buffer; The halftone processing unit is used to read the pixel at the pixel coordinates for the current row of pixels, and perform halftone mapping operation using the halftone algorithm based on the pixel coordinates and the read pixel to obtain the current binary control signal.

10. The halftone display driving device based on HDMI video signals according to claim 9, characterized in that, The halftone display driver based on HDMI video signals further includes: The parameter adaptive module is used to dynamically adjust the parameters in the halftone algorithm according to the input resolution, pixel clock frequency and refresh rate of the HDMI video signal.

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