An interleaved ADC mixed-domain adaptive calibration method, device, equipment and medium

Abstract

The application discloses an interleaved ADC mixed domain adaptive calibration method, device, equipment and medium, relates to the technical field of integrated circuit design, and is used for solving the technical problems of low calibration accuracy and high power consumption in the prior art. The method comprises the following steps: performing cross-correlation calculation on output signals of any two interleaved ADC channels respectively to obtain a plurality of cross-correlation functions; determining time sequence offsets corresponding to the cross-correlation functions according to peak values of the cross-correlation functions respectively; performing multi-channel joint estimation on the time sequence offsets corresponding to the cross-correlation functions to obtain time sequence offsets of the interleaved ADC channels; and performing dynamic calibration on the time sequence offsets of the interleaved ADC channels respectively to obtain calibrated time sequences of the interleaved ADC channels; wherein the dynamic calibration comprises analog domain coarse calibration, digital domain fine calibration and real-time adjustment of a calibration mode. Therefore, the application can improve calibration accuracy, reduce power consumption and the like through technical features such as "signal correlation and dynamic calibration".

Description

Technical Field

[0001] This application relates to the field of integrated circuit design technology, and provides a method, apparatus, device and medium for adaptive calibration of interleaved ADC mixed domain. Background Technology

[0002] As is well known, interleaved analog-to-digital converter (ADC) technology is the core technology for achieving ultra-high-speed analog-to-digital conversion. Its basic principle is to interleave samples from multiple low-speed ADCs in time, merging the sampling results from each channel to obtain an equivalent high sampling rate output. Currently, with the continuous development of modern wireless communication systems, radar systems, and high-speed data acquisition systems, the requirements for ADC sampling rates are becoming increasingly stringent. Therefore, interleaved ADCs based on time-interleaved multi-channel low-speed ADCs are gradually becoming the mainstream technology.

[0003] However, in actual chip design, due to factors such as semiconductor manufacturing process deviations, layout matching differences, and inconsistencies in the RF front-end links, significant errors exist between multiple ADC channels, such as gain errors, bias errors, and timing offsets. These errors can cause spurious components in the output spectrum of the interleaved ADC, severely degrading the spurious-free dynamic range (SFDR) index. Therefore, calibration is often performed during chip design.

[0004] Currently, existing technologies commonly employ several calibration schemes, including injection calibration signal schemes, digital background calibration schemes, analog domain timing calibration schemes, and lookup table calibration schemes. The injection calibration signal scheme injects a calibration signal of known amplitude, such as a sine wave, during normal sampling intervals or a dedicated calibration period, and then estimates the error parameters by comparing the differences between the output of each channel and the reference value. The digital background calibration scheme estimates and compensates for errors in real time in the digital domain by utilizing the statistical characteristics of the signal itself, such as the symmetry of the input spectrum. The analog domain timing calibration scheme uses a delay-locked loop (DLL) or phase-locked loop (PLL) to generate a multi-phase sampling clock, and then adjusts the delay line to achieve timing alignment between channels. The lookup table calibration scheme measures the error of each channel before the chip leaves the factory, stores it in the built-in memory, and compensates by looking up the table when needed. It is evident that these existing calibration schemes suffer from technical problems such as low calibration accuracy, high power consumption, and slow convergence speed. Summary of the Invention

[0005] This application provides a mixed-domain adaptive calibration method, apparatus, device, and medium for interleaved ADCs, which addresses the technical problems of low calibration accuracy and high power consumption in the prior art.

[0006] On the one hand, a hybrid domain adaptive calibration method for interleaved ADCs is provided, the method comprising:

[0007] Obtain the output signal of each interleaved ADC channel in the target interleaved ADC matrix;

[0008] Perform cross-correlation calculations on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions;

[0009] The time offset corresponding to each cross-correlation function is determined based on the peak value of each cross-correlation function;

[0010] The weighted least squares method is used to perform multi-channel joint estimation of the timing offsets corresponding to each cross-correlation function to obtain the timing offsets of each interleaved ADC channel.

[0011] The timing offset of each interleaved ADC channel is dynamically calibrated to obtain the calibrated timing of each interleaved ADC channel; wherein, the dynamic calibration includes analog domain coarse calibration, digital domain fine calibration and real-time adjustment of calibration mode.

[0012] Optionally, the step of determining the time offset corresponding to each cross-correlation function based on the peak value of each cross-correlation function includes:

[0013] For any cross-correlation function, perform fast convolution on the cross-correlation function to obtain the convolutional cross-correlation function;

[0014] The convolution cross-correlation function is curve-fitted using parabolic interpolation to obtain the target fitting curve;

[0015] Based on the peak value of the target fitted curve, determine the time offset corresponding to any cross-correlation function.

[0016] Optionally, the step of using parabolic interpolation to perform curve fitting on the convolution cross-correlation function to obtain the target fitted curve includes:

[0017] Determine multiple sampling points within a preset distance of the peak position of the convolutional cross-correlation function;

[0018] The target fitted curve is obtained by using parabolic interpolation to fit the multiple sampling points.

[0019] Optionally, the step of dynamically calibrating the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel includes:

[0020] In any iteration, for any interleaved ADC channel, a delay line array is used to perform a coarse calibration of the timing offset of the interleaved ADC channel in the analog domain to obtain the coarsely calibrated timing of the interleaved ADC channel.

[0021] By employing a Farrow fractional delay filter, the timing of any interleaved ADC channel after coarse calibration is finely calibrated in the digital domain to obtain the timing of any interleaved ADC channel after fine calibration.

[0022] Optionally, the step of using a Farrow fractional delay filter to perform digital domain fine calibration on the timing of any interleaved ADC channel after coarse calibration to obtain the finely calibrated timing of any interleaved ADC channel includes:

[0023] Multiple parallel FIR filters in the Farrow fractional delay filter are used to filter the timing of any interleaved ADC channel after coarse calibration, resulting in multiple filtered timing sequences.

[0024] Interpolate the multiple filtered time series respectively to obtain multiple interpolated time series;

[0025] By linearly combining the multiple interpolated timing sequences, the timing sequence of any interleaved ADC channel after fine calibration can be obtained.

[0026] Optionally, after using the weighted least squares method to perform multi-channel joint estimation of the time offsets corresponding to each cross-correlation function to obtain the time offsets of each interleaved ADC channel, the method further includes:

[0027] For any interleaved ADC channel, estimate the gain error of any interleaved ADC channel based on the variance of the output signal of any interleaved ADC channel;

[0028] Estimate the bias error of any interleaved ADC channel based on the mean of the output signal of any interleaved ADC channel;

[0029] A multiplier is used to finely calibrate the gain error, and the gain of any interleaved ADC channel after fine calibration is obtained.

[0030] An adder is used to finely calibrate the bias error, obtaining the finely calibrated bias of any interleaved ADC channel.

[0031] Optionally, the step of dynamically calibrating the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel includes:

[0032] If the target interleaved ADC matrix is ​​powered on, the timing offset is calibrated using the power-on initialization mode to obtain the calibrated timing.

[0033] If the target interleaved ADC matrix is ​​working normally and the temperature change value is not greater than the temperature change threshold, then the steady-state monitoring mode is used to calibrate the timing offset to obtain the calibrated timing.

[0034] If the target interleaved ADC matrix is ​​working normally and the temperature change value is greater than the temperature change threshold, then the timing offset is calibrated using the transition calibration mode to obtain the calibrated timing.

[0035] If the target interleaved ADC matrix malfunctions and then returns to normal, the timing offset is calibrated using a forced calibration mode to obtain the calibrated timing.

[0036] If the unsampled duration of the target interleaved ADC matrix is ​​longer than the preset duration, the timing offset is calibrated using a sleep / standby mode to obtain the calibrated timing.

[0037] On the one hand, an interleaved ADC hybrid domain adaptive calibration device is provided, the device comprising:

[0038] The output signal acquisition unit is used to acquire the output signals of each interleaved ADC channel in the target interleaved ADC matrix;

[0039] The cross-correlation function acquisition unit is used to perform cross-correlation calculations on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions.

[0040] The timing offset determination unit is used to determine the timing offset corresponding to each cross-correlation function based on the peak value of each cross-correlation function.

[0041] The multi-channel joint estimation unit is used to perform multi-channel joint estimation of the timing offsets corresponding to each cross-correlation function using the weighted least squares method, so as to obtain the timing offsets of each interleaved ADC channel.

[0042] The dynamic calibration unit is used to dynamically calibrate the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel.

[0043] On one hand, an electronic device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement any of the methods described above.

[0044] On the one hand, a storage medium is provided that stores computer program instructions thereon, which, when executed by a processor, implement any of the methods described above.

[0045] Compared with the prior art, the beneficial effects of this application are as follows:

[0046] In this application, when performing mixed-domain adaptive calibration of an interleaved ADC, firstly, the output signals of each interleaved ADC channel in the target interleaved ADC matrix can be acquired; then, cross-correlation calculations can be performed on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions; next, the timing offset corresponding to each cross-correlation function can be determined based on the peak value of each cross-correlation function; then, a weighted least squares method can be used to perform multi-channel joint estimation of the timing offset corresponding to each cross-correlation function to obtain the timing offset of each interleaved ADC channel; finally, the timing offset can be dynamically calibrated to obtain the calibrated timing; wherein, the dynamic calibration includes analog domain coarse calibration, digital domain fine calibration, and real-time adjustment of the calibration mode.

[0047] Based on this, in this application, since the correlation information of all interleaved ADC channel pairs is first utilized, and then the timing offset of each interleaved ADC channel is jointly estimated using the weighted least squares method, compared with the prior art, this application does not require known input signals and injected calibration signals, and can achieve timing estimation using the cross-correlation of the output signals themselves, which greatly improves calibration accuracy and robustness. Furthermore, since not only is coarse calibration in the analog domain and fine calibration in the digital domain employed during dynamic calibration, but the calibration mode is also adjusted in real time, compared with the prior art, this application can further improve calibration accuracy, increase convergence speed, and reduce power consumption. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments or related technologies will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0049] Figure 1 This is a schematic diagram of an application scenario provided by an embodiment of this application;

[0050] Figure 2 This is a schematic flowchart of an interleaved ADC hybrid domain adaptive calibration method provided in an embodiment of this application;

[0051] Figure 3 A schematic diagram of the cross-correlation function provided in the embodiments of this application;

[0052] Figure 4 A framework diagram for hybrid domain collaborative calibration provided in the embodiments of this application;

[0053] Figure 5A schematic diagram illustrating the fine calibration of the Farrow fractional delay filter provided in this application embodiment;

[0054] Figure 6 This is a schematic diagram of an interleaved ADC hybrid domain adaptive calibration device provided in an embodiment of this application.

[0055] The diagram is labeled as follows: 10-Interleaved ADC hybrid domain adaptive calibration device, 101-Processor, 102-Memory, 103-I / O interface, 104-Database, 60-Interleaved ADC hybrid domain adaptive calibration device, 601-Output signal acquisition unit, 602-Cross-correlation function acquisition unit, 603-Timing offset determination unit, 604-Multi-channel joint estimation unit, 605-Dynamic calibration unit. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application. Unless otherwise specified, the embodiments and features in the embodiments of this application can be arbitrarily combined with each other. Furthermore, although a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than that shown here.

[0057] As is well known, interleaved analog-to-digital converter (ADC) technology is the core technology for achieving ultra-high-speed analog-to-digital conversion. Its basic principle is to interleave samples from multiple low-speed ADCs in time, merging the sampling results from each channel to obtain an equivalent high sampling rate output. Currently, with the continuous development of modern wireless communication systems, radar systems, and high-speed data acquisition systems, the requirements for ADC sampling rates are becoming increasingly stringent. Therefore, interleaved ADCs based on time-interleaved multi-channel low-speed ADCs are gradually becoming the mainstream technology.

[0058] However, in actual chip design, due to factors such as semiconductor manufacturing process deviations, layout matching differences, and inconsistencies in the RF front-end links, significant errors exist between multiple ADC channels, such as gain errors, bias errors, and timing offsets. These errors can cause spurious components in the output spectrum of the interleaved ADC, severely degrading the spurious-free dynamic range (SFDR) index. Therefore, calibration is often performed during chip design.

[0059] Currently, common calibration methods in existing technologies include the injection calibration signal scheme, the digital background calibration scheme, the analog domain timing calibration scheme, and the lookup table calibration scheme. The injection calibration signal scheme injects a calibration signal of known amplitude, such as a sine wave, during normal sampling intervals or a dedicated calibration period, and then estimates the error parameters by comparing the differences between the output of each channel and the reference value. The digital background calibration scheme estimates and compensates for errors in real time in the digital domain by utilizing the statistical characteristics of the signal itself, such as the symmetry of the input spectrum. The analog domain timing calibration scheme uses a delay-locked loop (DLL) or phase-locked loop (PLL) to generate a multi-phase sampling clock, and then adjusts the delay line to achieve timing alignment between channels. The lookup table calibration scheme measures the error of each channel before the chip leaves the factory, stores it in the built-in memory, and compensates by looking up the table when needed.

[0060] In summary, these existing calibration schemes have the following fundamental problems: (1) timing calibration accuracy and power consumption cannot be balanced; (2) there is a contradiction between calibration convergence speed and accuracy; (3) poor scenario adaptability; (4) unable to achieve true "power-on" functionality; (5) timing calibration has theoretical bottlenecks.

[0061] Based on this, this application provides a hybrid domain adaptive calibration method for interleaved ADCs. In this method, firstly, the output signals of each interleaved ADC channel in the target interleaved ADC matrix are acquired. Then, cross-correlation calculations are performed on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions. Next, the timing offset corresponding to each cross-correlation function is determined based on its peak value. Then, a weighted least squares method is used to jointly estimate the timing offsets corresponding to each cross-correlation function across multiple channels to obtain the timing offset of each interleaved ADC channel. Finally, the timing offsets are dynamically calibrated to obtain the calibrated timing. The dynamic calibration includes coarse calibration in the analog domain, fine calibration in the digital domain, and real-time adjustment of the calibration mode. Therefore, in this application, since the correlation information of all interleaved ADC channel pairs is first utilized, and then the timing offset of each interleaved ADC channel is jointly estimated using the weighted least squares method, compared to existing technologies, this application does not require known input signals and injected calibration signals; timing estimation can be achieved using the cross-correlation of the output signals themselves, greatly improving calibration accuracy and robustness. Furthermore, since the dynamic calibration not only employs coarse calibration in the analog domain and fine calibration in the digital domain, but also adjusts the calibration mode in real time, this application can improve the convergence speed and reduce power consumption while further improving the calibration accuracy compared to existing technologies.

[0062] After introducing the design concept of the embodiments of this application, the following is a brief introduction to the application scenarios to which the technical solutions of the embodiments of this application can be applied. It should be noted that the application scenarios described below are only for illustrating the embodiments of this application and are not intended to limit the scope. In specific implementation, the technical solutions provided by the embodiments of this application can be flexibly applied according to actual needs.

[0063] like Figure 1 The diagram shown illustrates an application scenario provided by an embodiment of this application. This application scenario may include an interleaved ADC hybrid domain adaptive calibration device 10.

[0064] The interleaved ADC hybrid domain adaptive calibration device 10 can be used for ONNXRuntime inference without CGO constraints. For example, it can be an in-vehicle computer, a personal computer (PC), a server, or a laptop. The interleaved ADC hybrid domain adaptive calibration device 10 may include one or more processors 101, memory 102, I / O interfaces 103, and a database 104. Specifically, the processor 101 can be a central processing unit (CPU) or a digital processing unit, etc. The memory 102 can be volatile memory, such as random-access memory (RAM); the memory 102 can also be non-volatile memory, such as read-only memory, flash memory, hard disk drive (HDD), or solid-state drive (SSD); or the memory 102 can be any other medium capable of carrying or storing desired program code in the form of instructions or data structures that can be accessed by a computer, but is not limited thereto. The memory 102 can be a combination of the above-mentioned memories. The memory 102 can store some program instructions of the interleaved ADC hybrid domain adaptive calibration method provided in the embodiments of this application. When these program instructions are executed by the processor 101, they can be used to implement the steps of the interleaved ADC hybrid domain adaptive calibration method provided in the embodiments of this application, so as to solve the technical problems existing in the prior art, such as the inability to balance timing calibration accuracy and power consumption. The database 104 can be used to store data such as multiple preset cross-correlation functions involved in the solution provided in the embodiments of this application, the timing offsets corresponding to each cross-correlation function, the timing offsets, the calibrated timing, multiple convolutional cross-correlation functions, the timing after coarse calibration, the timing after fine calibration, the gain after fine calibration, and the gain after fine calibration.

[0065] In this embodiment, the interleaved ADC hybrid domain adaptive calibration device 10 can obtain calibration instructions through the I / O interface 103. Then, the processor 101 of the interleaved ADC hybrid domain adaptive calibration device 10 will solve the technical problems existing in the prior art, such as the inability to balance timing calibration accuracy and power consumption, according to the program instructions of the interleaved ADC hybrid domain adaptive calibration method provided in this embodiment, stored in the memory 102. In addition, multiple cross-correlation functions, the timing offsets corresponding to each cross-correlation function, the timing offset, the calibrated timing, multiple convolutional cross-correlation functions, the timing after coarse calibration, the timing after fine calibration, the gain after fine calibration, and the gain after fine calibration can be stored in the database 104.

[0066] Of course, the methods provided in the embodiments of this application are not limited to... Figure 1 The application scenarios shown can also be used in other possible scenarios, and this application embodiment does not impose any limitations. Figure 1 The functions that the various devices in the application scenarios shown can achieve will be described in subsequent method embodiments, and will not be elaborated on here. Below, the methods of the embodiments of this application will be described in conjunction with the accompanying drawings.

[0067] like Figure 2 The diagram shown is a flowchart illustrating an interleaved ADC hybrid domain adaptive calibration method provided in this application embodiment. This method can... Figure 1 The method is performed using the interleaved ADC hybrid domain adaptive calibration device 10. The specific process is described below.

[0068] Step 201: Obtain the output signal of each interleaved ADC channel in the target interleaved ADC matrix.

[0069] Specifically, assuming the input signal in the target interleaved ADC matrix is ​​s(t), after sampling by the N interleaved ADC channels in the target interleaved ADC matrix, the output signal of the i-th interleaved ADC channel can be expressed by the following formula:

[0070]

[0071] in, The sampling period is The number of sampling points. Let be the sampling time offset of the i-th interleaved ADC channel. For the i-th interleaved ADC channel Quantization noise at each sampling point.

[0072] For example, to obtain the output signals of N=4 interleaved ADC channels, each output signal has a length of L=4096 points, a sampling rate of 1GS / s, and a sampling period of =1ns.

[0073] Step 202: Perform cross-correlation calculations on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions.

[0074] In this application, the cross-correlation function corresponding to any two interleaved ADC channels can be specifically expressed by the following formula:

[0075]

[0076] in, The output signal of the i-th interleaved ADC channel. This represents the output signal of the j-th interleaved ADC channel. When there is a timing offset between the i-th and j-th signals, the cross-correlation function... exist The peak value is achieved at such a location, such as Figure 3 The diagram shown is a schematic representation of the cross-correlation function provided in an embodiment of this application.

[0077] Step 203: Determine the time offset corresponding to each cross-correlation function based on the peak value of each cross-correlation function.

[0078] Specifically, for any cross-correlation function, firstly, to reduce computational complexity, this application employs fast convolution on any cross-correlation function to obtain the convolutional cross-correlation function. For example, consider the cross-correlation function between the first interleaved ADC channel and the second interleaved ADC channel. A fast convolution algorithm can be used to reduce computational complexity, thereby obtaining the convolution cross-correlation function. .

[0079] Then, to achieve subsampling accuracy estimation, this application employs parabolic interpolation to fit the convolutional cross-correlation function to obtain the target fitting curve. Specifically, multiple sampling points within a preset distance of the peak position of the convolutional cross-correlation function are first determined; then, parabolic interpolation is used to fit these multiple sampling points to obtain the target fitting curve. It is evident that this application can improve the detection accuracy from one sampling point to subsampling accuracy by performing parabolic fitting near the peak. For example, assuming three sampling points near the peak are determined (k-1, R[k-1]), (k, R[k]), and (k+1, R[k+1]), then parabolic fitting of these three sampling points directly yields the following target fitting curve: .

[0080] Finally, based on the peak value of the target fitted curve, the time offset corresponding to any cross-correlation function can be determined. For example, continuing with the previous example, the target fitted curve is... Therefore, the peak position is: The timing offset is: .

[0081] Step 204: Using the weighted least squares method, perform multi-channel joint estimation of the timing offset corresponding to each cross-correlation function to obtain the timing offset of each interleaved ADC channel.

[0082] For example, continuing with the previous example, if the target interleaved ADC matrix has 4 interleaved ADC channels, then there are 6 pairs of channel combinations. Using the weighted least squares method, the time offsets corresponding to each cross-correlation function can be jointly estimated across multiple channels to obtain the time offsets of each interleaved ADC channel. The time offsets can be calculated using the following formula:

[0083]

[0084] in, This is the timing offset vector. H is the linear constraint matrix, W is the weight matrix, and y is the relative time delay observation vector.

[0085] Step 205: Dynamically calibrate the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel.

[0086] Dynamic calibration includes coarse calibration in the analog domain, fine calibration in the digital domain, and real-time adjustment of the calibration mode.

[0087] Specifically, to improve calibration accuracy and convergence speed, this application employs a hierarchical architecture of hybrid domain collaborative calibration, combining "analog domain coarse calibration" and "digital domain fine calibration," to achieve this goal. Figure 4 The diagram shown is a framework diagram of hybrid domain collaborative calibration provided in an embodiment of this application, wherein each interleaved ADC channel is calibrated independently.

[0088] Based on this, in any iteration, for any interleaved ADC channel, a delay line array can be used to perform a coarse calibration of the timing offset of the interleaved ADC channel in the analog domain to obtain the coarsely calibrated timing of any interleaved ADC channel, thereby reducing the error to less than 10% of the original.

[0089] Then, a Farrow fractional delay filter can be used to perform digital domain fine calibration on the timing of any interleaved ADC channel after coarse calibration, to obtain the timing of any interleaved ADC channel after fine calibration. For example... Figure 5The diagram illustrates a method for fine calibration of the Farrow fractional delay filter provided in this application. Specifically, multiple parallel FIR filters within the Farrow fractional delay filter can be used to filter the coarsely calibrated timing data of any interleaved ADC channel, resulting in multiple filtered timing data. Then, these multiple filtered timing data are interpolated to obtain multiple interpolated timing data. Finally, these multiple interpolated timing data can be linearly combined to obtain the finely calibrated timing data for any interleaved ADC channel.

[0090] In this application, during iterative convergence, the result of coarse calibration in the analog domain is used as the initial value in the digital domain, and the result of fine calibration in the digital domain is then fed back to the analog domain for iterative optimization, forming a closed-loop convergence. This achieves a typical convergence count of N≤5, and each iteration can reduce the error by an order of magnitude. Compared with existing technologies, this hierarchical architecture of hybrid domain collaborative calibration fully leverages the advantages of low latency and low power consumption in the analog domain and high precision and programmability in the digital domain, achieving the goal of significantly improving calibration accuracy and reducing power consumption.

[0091] In this application, after obtaining the timing offset of each interleaved ADC channel, only "digital domain fine calibration" is performed when calibrating the gain error and bias error.

[0092] Specifically, for any interleaved ADC channel, firstly, the gain error of any interleaved ADC channel can be estimated based on the variance of its output signal; then, the bias error of any interleaved ADC channel can be estimated based on the mean of its output signal; next, a multiplier (e.g., a 16-bit multiplier) can be used to finely calibrate the gain error to obtain the finely calibrated gain of any interleaved ADC channel; finally, an adder (e.g., a 16-bit adder) can be used to finely calibrate the bias error to obtain the finely calibrated bias of any interleaved ADC channel.

[0093] Furthermore, to reduce power consumption, this application employs an "event-driven adaptive calibration strategy" to adaptively switch calibration modes when dynamically calibrating the timing offsets of each interleaved ADC channel to obtain the calibrated timings of each interleaved ADC channel. In practical applications, a state machine can be designed in advance, specifically for five states: power-on initialization (STATE_POWER_ON), ​​steady-state monitoring (STATE_MONITOR), transition calibration (STATE_TRANSITION), forced calibration (STATE_FORCE_CAL), and sleep / standby (STATE_SLEEP). These correspond to the power-on initialization mode, steady-state monitoring mode, transition calibration mode, forced calibration mode, and sleep / standby mode, respectively.

[0094] Specifically, if the target interleaved ADC matrix is ​​powered on, the timing offset is calibrated using the power-on initialization mode to obtain the calibrated timing. In this application, the power-on initialization mode is used to perform a complete calibration after power-on and establish an initial calibration parameter table. The typical calibration time is <50ms.

[0095] If the target interleaved ADC matrix is ​​working normally and the temperature change value is not greater than the temperature change threshold, then the steady-state monitoring mode is used to calibrate the timing offset to obtain the calibrated timing. In this application, the steady-state monitoring mode is used to monitor only the error trend, the power consumption is reduced to 10% of the normal mode, and the monitoring interval is 100ms.

[0096] If the target interleaved ADC matrix is ​​working normally and the temperature change value is greater than the temperature change threshold, the timing offset is calibrated using the transition calibration mode to obtain the calibrated timing. In this application, the transition calibration mode is used to automatically enter medium-speed calibration when the temperature drift exceeds the threshold or the signal characteristics change, with a monitoring interval of 10ms.

[0097] If the target interleaved ADC matrix malfunctions and then recovers, the timing offset is calibrated using a forced calibration mode to obtain the calibrated timing. In this application, the forced calibration mode is used to perform full-speed calibration during abnormal recovery, achieving rapid convergence with a monitoring interval of 1ms.

[0098] If the unsampled duration of the target interleaved ADC matrix exceeds a preset duration, the timing offset is calibrated using a sleep / standby mode to obtain the calibrated timing. In this application, the sleep / standby mode is used to enter a low-power state and stop calibration when there is no activity for a long time.

[0099] As can be seen, compared with the prior art, the "event-driven adaptive calibration strategy" of this application can dynamically adjust the calibration intensity according to the actual scenario, and reduce the average power consumption by more than 80%.

[0100] In one possible implementation, based on the same inventive concept, this application provides an interleaved ADC hybrid domain adaptive calibration system, wherein the system includes: a data acquisition module, an error estimation module, a hybrid domain calibration module, an adaptive control module, and an iterative convergence control module.

[0101] Specifically, the error estimation module includes a cross-correlation calculation circuit, a peak detection circuit, and a subsampling accuracy estimation circuit; the hybrid domain calibration module includes an analog domain coarse calibration submodule and a digital domain fine calibration submodule; the analog domain coarse calibration submodule includes a delay line array; and the digital domain fine calibration submodule includes a multiplier, an adder, and a Farrow fractional delay filter.

[0102] The adaptive control module includes a scene detection submodule, a calibration strategy selection submodule, and a dynamic power consumption management submodule.

[0103] Example 1:

[0104] Assuming the input signal is wideband noise (100MHz bandwidth), the target interleaved ADC matrix has 4 interleaved ADC channels, each output signal length is L=4096 points, the sampling rate is 1GS / s, and the sampling period is... =1ns. When fitting a parabola, curve fitting can be performed on three sampling points near the peak.

[0105] Based on this, the "time series offset estimation based on signal cross-correlation" of this application can be directly simulated and verified. The simulation results are as follows: the estimation accuracy-root mean square error (RMSE) is 0.45ps, the estimation bias is <0.1ps, and the convergence data is 4096 points.

[0106] Example 2:

[0107] Continue to use the various parameters of Example 1.

[0108] Based on this, the "hybrid domain collaborative calibration" of this application can be directly verified by simulation.

[0109] For coarse calibration in the analog domain, timing coarse calibration can use a delay line array with a delay resolution of 1 ps and an adjustment range of 0 to 15 ps.

[0110] For fine calibration in the digital domain, a 16-bit multiplier can be used for gain fine calibration with an accuracy of 1 LSB; a 16-bit adder can be used for bias fine calibration with an accuracy of 1 LSB; and a Farrow fractional delay filter can be used for timing fine calibration with an accuracy of 0.1 ps.

[0111] For iterative convergence control, the typical number of convergence iterations N≤5, and each iteration can reduce the error by an order of magnitude.

[0112] The simulation results are as follows: the timing error after analog domain calibration is ±2ps, and the timing error after digital domain calibration is ±0.5ps.

[0113] Example 3:

[0114] Continue to use the various parameters of Example 1.

[0115] Based on this, the "time-series fine calibration of the Farrow fractional delay filter" in this application can be directly verified by simulation. The simulation results are as follows: the time delay adjustment range is 0~15ps, the time delay resolution is 0.1ps, the passband ripple is <0.1dB, and the stopband attenuation is >60dB.

[0116] In summary, this application, by first utilizing the correlation information of all interleaved ADC channel pairs and then jointly estimating the timing offset of each interleaved ADC channel using weighted least squares, achieves timing estimation without requiring prior knowledge of the input signal and injected calibration signal, significantly improving calibration accuracy and robustness compared to existing technologies. Furthermore, since dynamic calibration employs not only coarse analog-domain calibration and fine digital-domain calibration but also real-time adjustments to the calibration mode, this application further enhances calibration accuracy while also improving convergence speed and reducing power consumption compared to existing technologies.

[0117] Based on the same inventive concept, embodiments of this application provide an interleaved ADC hybrid domain adaptive calibration device 60, such as... Figure 6 As shown, the interleaved ADC hybrid domain adaptive calibration device 60 includes:

[0118] The output signal acquisition unit 601 is used to acquire the output signals of each interleaved ADC channel in the target interleaved ADC matrix respectively.

[0119] The cross-correlation function acquisition unit 602 is used to perform cross-correlation calculations on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions.

[0120] The timing offset determination unit 603 is used to determine the timing offset corresponding to each cross-correlation function based on the peak value of each cross-correlation function.

[0121] The multi-channel joint estimation unit 604 is used to perform multi-channel joint estimation of the timing offset corresponding to each cross-correlation function using the weighted least squares method, so as to obtain the timing offset of each interleaved ADC channel.

[0122] The dynamic calibration unit 605 is used to dynamically calibrate the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel.

[0123] Optionally, the timing offset determination unit 603 is also used for:

[0124] For any cross-correlation function, perform fast convolution on the cross-correlation function to obtain the convolutional cross-correlation function;

[0125] The parabolic interpolation method is used to fit the convolution cross-correlation function to obtain the target fitting curve;

[0126] Based on the peak value of the target fitted curve, determine the time offset corresponding to any cross-correlation function.

[0127] Optionally, the timing offset determination unit 603 is also used for:

[0128] Determine multiple sampling points within a preset distance of the peak position of the convolutional cross-correlation function;

[0129] The parabolic interpolation method is used to fit curves to multiple sampling points to obtain the target fitted curve.

[0130] Optionally, the dynamic calibration unit 605 is also used for:

[0131] In any iteration, for any interleaved ADC channel, a delay line array is used to perform a coarse calibration of the timing offset of any interleaved ADC channel in the analog domain to obtain the coarsely calibrated timing of any interleaved ADC channel.

[0132] By employing a Farrow fractional delay filter, the timing of any interleaved ADC channel after coarse calibration is finely calibrated in the digital domain to obtain the timing of any interleaved ADC channel after fine calibration.

[0133] Optionally, the dynamic calibration unit 605 is also used for:

[0134] Multiple parallel FIR filters in the Farrow fractional delay filter are used to filter the timing of any interleaved ADC channel after coarse calibration, resulting in multiple filtered timing sequences.

[0135] Interpolate the multiple filtered time series separately to obtain multiple interpolated time series;

[0136] By linearly combining multiple interpolated timing sequences, the finely calibrated timing sequence of any interleaved ADC channel can be obtained.

[0137] Optionally, the dynamic calibration unit 605 is also used for:

[0138] For any interleaved ADC channel, estimate the gain error of any interleaved ADC channel based on the variance of the output signal of any interleaved ADC channel;

[0139] Estimate the bias error of any interleaved ADC channel based on the mean of the output signal of any interleaved ADC channel;

[0140] A multiplier is used to finely calibrate the gain error, and the gain of any interleaved ADC channel after fine calibration is obtained.

[0141] An adder is used to finely calibrate the bias error, obtaining the finely calibrated bias of any interleaved ADC channel.

[0142] Optionally, the dynamic calibration unit 605 is also used for:

[0143] If the target interleaved ADC matrix is ​​powered on, the timing offset is calibrated using the power-on initialization mode to obtain the calibrated timing.

[0144] If the target interleaved ADC matrix is ​​working normally and the temperature change value is not greater than the temperature change threshold, then the steady-state monitoring mode is used to calibrate the timing offset to obtain the calibrated timing.

[0145] If the target interleaved ADC matrix is ​​working normally and the temperature change value is greater than the temperature change threshold, then the timing offset is calibrated using the transition calibration mode to obtain the calibrated timing.

[0146] If the target interleaved ADC matrix becomes abnormal and then returns to normal, the timing offset is calibrated using the forced calibration mode to obtain the calibrated timing.

[0147] If the unsampled duration of the target interleaved ADC matrix is ​​longer than the preset duration, the timing offset is calibrated using sleep / standby mode to obtain the calibrated timing.

[0148] The interleaved ADC hybrid domain adaptive calibration device 60 can be used to perform... Figure 2 The method performed by the interleaved ADC hybrid domain adaptive calibration device in the illustrated embodiment is described above. Therefore, the functions that each functional module of the interleaved ADC hybrid domain adaptive calibration device 60 can be implemented can be found by referring to [the relevant documentation / reference]. Figure 2 The embodiments shown are described in detail below.

[0149] In some possible implementations, various aspects of the methods provided in this application can also be implemented as a program product comprising program code that, when run on a computer device, causes the computer device to perform the steps of the methods according to the various exemplary embodiments of this application described above. For example, the computer device may perform actions such as... Figure 2 The method performed by the interleaved ADC hybrid domain adaptive calibration device in the illustrated embodiment.

[0150] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks. Alternatively, if the integrated units of this application are implemented as software functional modules and sold or used as independent products, they can also be stored in a computer-readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, or the parts that contribute to the prior art, can be embodied in the form of software products. These computer software products are stored in a storage medium and include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as mobile storage devices, ROM, RAM, magnetic disks, or optical disks.

[0151] Although preferred embodiments of this application have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of this application.

[0152] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. A hybrid domain adaptive calibration method for an interleaved ADC, characterized in that, The method includes: Obtain the output signal of each interleaved ADC channel in the target interleaved ADC matrix; Perform cross-correlation calculations on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions; The time offset corresponding to each cross-correlation function is determined based on the peak value of each cross-correlation function; The weighted least squares method is used to perform multi-channel joint estimation of the timing offsets corresponding to each cross-correlation function to obtain the timing offsets of each interleaved ADC channel. The timing offset of each interleaved ADC channel is dynamically calibrated to obtain the calibrated timing of each interleaved ADC channel; wherein, the dynamic calibration includes analog domain coarse calibration, digital domain fine calibration, and real-time adjustment of calibration mode; the step of dynamically calibrating the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel includes: In any iteration, for any interleaved ADC channel, a delay line array is used to perform a coarse calibration of the timing offset of the interleaved ADC channel in the analog domain to obtain the coarsely calibrated timing of the interleaved ADC channel. By employing a Farrow fractional delay filter, the timing of any interleaved ADC channel after coarse calibration is finely calibrated in the digital domain to obtain the timing of any interleaved ADC channel after fine calibration.

2. The method as described in claim 1, characterized in that, The step of determining the time offset corresponding to each cross-correlation function based on the peak value of each cross-correlation function includes: For any cross-correlation function, perform fast convolution on the cross-correlation function to obtain the convolutional cross-correlation function; The convolution cross-correlation function is curve-fitted using parabolic interpolation to obtain the target fitting curve; Based on the peak value of the target fitted curve, determine the time offset corresponding to any cross-correlation function.

3. The method as described in claim 2, characterized in that, The step of using parabolic interpolation to perform curve fitting on the convolution cross-correlation function to obtain the target fitted curve includes: Determine multiple sampling points within a preset distance of the peak position of the convolutional cross-correlation function; The target fitted curve is obtained by using parabolic interpolation to fit the multiple sampling points.

4. The method as described in claim 1, characterized in that, The step of using a Farrow fractional delay filter to perform digital domain fine calibration on the timing of any interleaved ADC channel after coarse calibration, to obtain the finely calibrated timing of any interleaved ADC channel, includes: Multiple parallel FIR filters in the Farrow fractional delay filter are used to filter the timing of any interleaved ADC channel after coarse calibration, resulting in multiple filtered timing sequences. Interpolate the multiple filtered time series respectively to obtain multiple interpolated time series; By linearly combining the multiple interpolated timing sequences, the timing sequence of any interleaved ADC channel after fine calibration can be obtained.

5. The method as described in claim 1, characterized in that, After using the weighted least squares method to perform multi-channel joint estimation of the time offsets corresponding to each cross-correlation function to obtain the time offsets of each interleaved ADC channel, the method further includes: For any interleaved ADC channel, estimate the gain error of any interleaved ADC channel based on the variance of the output signal of any interleaved ADC channel; Estimate the bias error of any interleaved ADC channel based on the mean of the output signal of any interleaved ADC channel; A multiplier is used to finely calibrate the gain error, and the gain of any interleaved ADC channel after fine calibration is obtained. An adder is used to finely calibrate the bias error, obtaining the finely calibrated bias of any interleaved ADC channel.

6. The method as described in claim 1, characterized in that, The step of dynamically calibrating the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel includes: If the target interleaved ADC matrix is ​​powered on, the timing offset is calibrated using the power-on initialization mode to obtain the calibrated timing. If the target interleaved ADC matrix is ​​working normally and the temperature change value is not greater than the temperature change threshold, then the steady-state monitoring mode is used to calibrate the timing offset to obtain the calibrated timing. If the target interleaved ADC matrix is ​​working normally and the temperature change value is greater than the temperature change threshold, then the timing offset is calibrated using the transition calibration mode to obtain the calibrated timing. If the target interleaved ADC matrix malfunctions and then returns to normal, the timing offset is calibrated using a forced calibration mode to obtain the calibrated timing. If the unsampled duration of the target interleaved ADC matrix is ​​longer than the preset duration, the timing offset is calibrated using a sleep / standby mode to obtain the calibrated timing.

7. An interleaved ADC hybrid domain adaptive calibration device, characterized in that, The device includes: The output signal acquisition unit is used to acquire the output signals of each interleaved ADC channel in the target interleaved ADC matrix; The cross-correlation function acquisition unit is used to perform cross-correlation calculations on the output signals of any two interleaved ADC channels to obtain multiple cross-correlation functions. The timing offset determination unit is used to determine the timing offset corresponding to each cross-correlation function based on the peak value of each cross-correlation function. The multi-channel joint estimation unit is used to perform multi-channel joint estimation of the timing offsets corresponding to each cross-correlation function using the weighted least squares method, so as to obtain the timing offsets of each interleaved ADC channel. A dynamic calibration unit is used to dynamically calibrate the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel. The dynamic calibration includes analog domain coarse calibration, digital domain fine calibration, and real-time adjustment of the calibration mode. The step of dynamically calibrating the timing offset of each interleaved ADC channel to obtain the calibrated timing of each interleaved ADC channel includes: in any iteration, for any interleaved ADC channel, using a delay line array, performing analog domain coarse calibration on the timing offset of that interleaved ADC channel to obtain the coarsely calibrated timing of that interleaved ADC channel; and using a Farrow fractional delay filter, performing digital domain fine calibration on the coarsely calibrated timing of that interleaved ADC channel to obtain the finely calibrated timing of that interleaved ADC channel.

8. An electronic device, characterized in that, The device includes: Memory, used to store program instructions; A processor is configured to invoke program instructions stored in the memory and execute the method described in any one of claims 1-6 according to the obtained program instructions.

9. A storage medium, characterized in that, The storage medium stores computer-executable instructions for causing a computer to perform the method described in any one of claims 1-6.

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