Multilayer ceramic electronic component and method of manufacturing the same

Abstract

The laminated ceramic electronic component of the present invention includes: a main body in which a plurality of internal electrodes and a plurality of dielectric layers having a ceramic as a main component are alternately laminated in a first direction, and has a pair of end surfaces facing each other in a second direction, the plurality of internal electrodes being alternately exposed to the pair of end surfaces; and a pair of external electrodes respectively in contact with the plurality of internal electrodes exposed from the pair of end surfaces, a capacitance region being a region of the second direction of the main body observed from the first direction and in which the plurality of internal electrodes overlap, when one of the dielectric layers in the capacitance region is hypothetically divided into three at equal intervals, a pair of first regions in contact with the internal electrodes and a second region sandwiched by the pair of first regions, a first molar ratio of phosphorus with respect to a main component metal element of the ceramic in the pair of first regions is higher than a second molar ratio of phosphorus with respect to the main component metal element in the second region.

Description

Technical Field

[0001] This invention relates to laminated ceramic electronic components and their manufacturing methods. Background Technology

[0002] It is known that in stacked ceramic electronic components such as stacked ceramic capacitors with stacked internal electrodes and dielectric layers, the particle size of ceramic particles in the first region on the internal electrode side of the dielectric layer is smaller than the particle size of ceramic particles in the second region in the central part of the dielectric layer (e.g., Patent Document 1). Furthermore, it is known that in the same stacked ceramic electronic component, phosphorus is added to the internal electrode on the main surface side (e.g., Patent Document 2).

[0003] Existing technical documents

[0004] Patent documents

[0005] Patent Document 1: Japanese Patent Application Publication No. 2014-35384

[0006] Patent Document 2: Japanese Patent Application Publication No. 2022-84400 Summary of the Invention

[0007] The technical problem that the invention aims to solve

[0008] When the ceramic particles, which are mainly composed of ceramics, have a large particle size within the dielectric layer, the dielectric life is shortened due to insulation breakdown and other issues. On the other hand, when the ceramic particle size is small, the strength of the dielectric layer weakens.

[0009] Furthermore, regarding Patent Document 1, by making the particle size of the first region smaller than that of the second region, insulation breakdown can be suppressed. However, in order to change the particle size of ceramic particles within a dielectric layer, complex manufacturing processes are required, such as forming a dielectric layer using three green sheets.

[0010] In view of the above-mentioned technical problems, the first objective of the present invention is to provide a multilayer ceramic electronic component with long life and high strength and a method for manufacturing the same.

[0011] A second objective of this invention is to provide a laminated ceramic electronic component and a method thereof that can simplify the manufacturing process.

[0012] Technical solutions for solving technical problems

[0013] The present invention is a laminated ceramic electronic component comprising: a main body, wherein a plurality of internal electrodes and a plurality of dielectric layers, mainly composed of ceramic, are alternately stacked in a first direction and have a pair of end faces opposite each other in a second direction, the stacked plurality of internal electrodes being alternately exposed on the pair of end faces; and a pair of external electrodes respectively in contact with the plurality of internal electrodes exposed from the pair of end faces, wherein when a dielectric layer in a capacitance region is imaginarily divided at equal intervals into a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, a first molar ratio of phosphorus in the pair of first regions relative to the main component metal element of the ceramic is higher than a second molar ratio of phosphorus in the second region relative to the main component metal element, wherein the capacitance region is the central portion of the main body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes overlap.

[0014] In the above configuration, the following configuration can be adopted: the first particle size of the ceramic particles in the first region is smaller than the second particle size of the ceramic particles in the second region.

[0015] In the above configuration, the following configuration can be adopted: the first molar ratio is more than 1.2 times the second molar ratio.

[0016] In the above configuration, the following configuration can be adopted: the third molar ratio of phosphorus in a pair of third regions to the main component metal element is 1.5 times or more the fourth molar ratio of phosphorus in the dielectric layer to the main component metal element, wherein the pair of third regions is a range of 0.1 times the width of the dielectric layer in the first direction from the internal electrode.

[0017] In the above configuration, the following configuration can be adopted: in the above dielectric layer, the particle size of the ceramic particles that are not adjacent to the above internal electrode but are adjacent to the ceramic particles adjacent to the above internal electrode is smaller than the particle size of the ceramic particles in the above second region.

[0018] In the above configuration, the following configuration can be adopted: the number of ceramic particles in the first direction of the dielectric layer is 5 or more.

[0019] In the above configuration, the following configuration can be adopted: the main component of the ceramic is barium titanate, and the main component of the plurality of internal electrodes is nickel.

[0020] The present invention is a laminated ceramic electronic component comprising: a body, wherein a plurality of internal electrodes and a plurality of dielectric layers, mainly composed of ceramic, are alternately laminated in a first direction and have a pair of end faces opposite each other in a second direction, the laminated plurality of internal electrodes being alternately exposed on the pair of end faces; and a pair of external electrodes respectively in contact with the plurality of internal electrodes exposed from the pair of end faces, wherein a first molar ratio of phosphorus in the dielectric layer in a capacitance region relative to the main component metal element of the ceramic is higher than a second molar ratio of phosphorus in the dielectric layer in an end edge region relative to the main component metal element, wherein the capacitance region is the central portion of the body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes overlap, and the end edge region is the end portion of the body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes are not disposed.

[0021] In the above configuration, the following configuration can be adopted: the first particle size of the ceramic particles in the dielectric layer in the capacitor region is smaller than the second particle size of the ceramic particles in the dielectric layer in the end edge region.

[0022] In the above configuration, the following configuration can be adopted: the third molar ratio of phosphorus in the outermost covering dielectric layer of the plurality of dielectric layers is lower than the first molar ratio of the main component metal element.

[0023] In the above configuration, the following configuration can be adopted: the first particle size of the ceramic particles in the dielectric layer in the capacitor region is smaller than the second particle size of the ceramic particles in the dielectric layer in the edge region, and the third particle size of the ceramic particles in the covering dielectric layer is larger than the first particle size.

[0024] In the above configuration, the following configuration can be adopted: the third molar ratio is lower than the second molar ratio.

[0025] In the above configuration, the following configuration can be adopted: the first particle size of the ceramic particles in the dielectric layer in the capacitor region is smaller than the second particle size of the ceramic particles in the dielectric layer in the edge region, and the third particle size of the ceramic particles covering the dielectric layer is larger than the second particle size.

[0026] In the above configuration, the following configuration can be adopted: the fourth molar ratio of phosphorus in the dielectric layer in the side edge region relative to the main component metal element is lower than the first molar ratio, wherein the side edge region is the third-direction end of the main body that intersects the first direction and the second direction when viewed from the first direction and is not provided with multiple internal electrodes.

[0027] In the above configuration, the following configuration can be adopted: the fourth molar ratio is less than or equal to the second molar ratio.

[0028] This invention relates to a method for manufacturing a laminated ceramic electronic component, comprising: a step of preparing a body, wherein the body is formed by alternately stacking a plurality of green sheets containing ceramic particles and a plurality of phosphorus-containing metal patterns in a first direction; a step of forming a plurality of internal electrodes alternately exposed from a pair of opposite end faces in a second direction from the plurality of metal patterns by firing the body; and a step of forming a pair of external electrodes respectively in contact with the plurality of internal electrodes exposed from the pair of end faces. After firing the body, when a dielectric layer in a capacitor region is imaginarily divided at equal intervals into a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, a first molar ratio of phosphorus to the main component metal element of the ceramic particles in the pair of first regions is higher than a second molar ratio of phosphorus to the main component metal element in the second region. The capacitor region is the central portion of the body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes overlap.

[0029] In the above configuration, the following configuration can be adopted: the main component of the ceramic particles is barium titanate, and the main component of the plurality of internal electrodes is nickel.

[0030] This invention relates to a method for manufacturing a laminated ceramic electronic component, comprising: a step of preparing a body formed by laminating laminated sheets in a first direction, wherein the laminated sheets have a metal pattern formed on a green sheet containing ceramic particles and a dielectric pattern containing ceramic particles between the metal patterns; a step of forming a plurality of internal electrodes alternately exposed from a pair of opposite end faces in a second direction from the metal pattern by firing the body, and forming a plurality of dielectric layers from the green sheet and the dielectric pattern; and a step of forming a pair of external electrodes respectively in contact with the plurality of internal electrodes exposed from the pair of end faces, wherein a first molar ratio of phosphorus to the main component metal element of the ceramic particles in the green sheet sandwiched by the metal pattern in the first direction is higher than a second molar ratio of phosphorus to the main component metal element in the dielectric pattern.

[0031] In the above configuration, the following configuration can be adopted: the third molar ratio of phosphorus in the green sheet located on the outermost side of the main body in the first direction is lower than the first molar ratio of the main component metal element.

[0032] In the above configuration, the following configuration can be adopted: the process of preparing the main body includes: a process of preparing a laminate in which the metal pattern is exposed from a side facing upward from a third direction intersecting the first direction and the second direction; and a process of attaching a lateral sheet containing ceramic particles to the side of the laminate, wherein the fourth molar ratio of phosphorus in the lateral sheet relative to the main component metal element is lower than the first molar ratio.

[0033] In the above configuration, the following configuration can be adopted: after the main body is fired, the first molar ratio of phosphorus in the dielectric layer of the capacitor region to the main component metal element is higher than the second molar ratio of phosphorus in the dielectric layer of the end edge region to the main component metal element, wherein the capacitor region is the central part of the main body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes overlap, and the end edge region is the end part of the main body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes are not provided.

[0034] This invention relates to a method for manufacturing a laminated ceramic electronic component, comprising: a step of preparing a body formed by laminating laminated sheets in a first direction, wherein the laminated sheets have a phosphorus-containing metal pattern and a dielectric pattern containing ceramic particles between the metal patterns; a step of forming a plurality of internal electrodes alternately exposed from a pair of opposite end faces in a second direction from the metal pattern by firing the body, and forming a plurality of dielectric layers from the green sheet and the dielectric pattern; and a step of forming a pair of external electrodes respectively in contact with the plurality of internal electrodes exposed from the pair of end faces, wherein after firing the body, a first molar ratio of phosphorus to the main component metal element in the dielectric layer in the capacitance region is higher than a second molar ratio of phosphorus to the main component metal element in the dielectric layer in the end edge region, wherein the capacitance region is the central portion of the body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes overlap, and the end edge region is the portion of the body in the second direction when viewed from the first direction and where the plurality of internal electrodes are not disposed.

[0035] Invention Effects

[0036] According to the present invention, it is possible to provide a multilayer ceramic electronic component with long life and high strength, and a method for manufacturing the same.

[0037] Furthermore, according to the present invention, it is possible to provide a laminated ceramic electronic component and a method thereof that simplifies the manufacturing process. Attached Figure Description

[0038] Figure 1This is a partial cross-sectional perspective view of the stacked ceramic capacitor according to the embodiment.

[0039] Figure 2 yes Figure 1 AA-line cross-section diagram.

[0040] Figure 3 yes Figure 1 BB line cross-section diagram.

[0041] Figure 4 yes Figure 1 CC line cross-section diagram.

[0042] Figure 5 This is an enlarged schematic diagram of the dielectric layer of the multilayer ceramic capacitor according to the first embodiment.

[0043] Figure 6 This is a flowchart illustrating an example of a method for manufacturing a multilayer ceramic capacitor according to the first embodiment.

[0044] Figure 7A This is a plan view showing an example of the laminated sheets in the manufacturing method of the laminated ceramic capacitor according to the first embodiment.

[0045] Figure 7B yes Figure 7A AA-line cross-section diagram.

[0046] Figure 8 This is a cross-sectional view showing an example of the laminated sheets in the manufacturing method of the laminated ceramic capacitor according to the first embodiment.

[0047] Figure 9 This is a schematic diagram showing the molar ratio of phosphorus in the capacitor region relative to the position within the dielectric layer.

[0048] Figure 10 This is a schematic diagram representing the average molar ratio of phosphorus in different regions of the dielectric.

[0049] Figure 11A This is a diagram illustrating an example of a particle size measurement method.

[0050] Figure 11B This is a diagram illustrating another example of a particle size measurement method.

[0051] Figure 12 This is an enlarged schematic diagram of the dielectric layer between the internal electrodes in the capacitor region of the stacked ceramic capacitor according to the second embodiment.

[0052] Figure 13 This is an enlarged schematic diagram of the dielectric layer between the internal electrodes in the end edge region of the stacked ceramic capacitor according to the second embodiment.

[0053] Figure 14This is an enlarged schematic diagram of the covering dielectric layer of the stacked ceramic capacitor according to the second embodiment.

[0054] Figure 15A This is a plan view showing an example of the laminated sheets in the manufacturing method of the laminated ceramic capacitor according to the second embodiment.

[0055] Figure 15B yes Figure 15A AA-line cross-section diagram.

[0056] Figure 16 This is a cross-sectional view showing an example of the laminated sheets in the manufacturing method of the laminated ceramic capacitor according to the second embodiment.

[0057] Figure 17 This is a flowchart illustrating an example of a method for manufacturing a multilayer ceramic capacitor according to the second embodiment.

[0058] Figure 18 This is a cross-sectional view showing an example of the laminate in the manufacturing method of the laminated ceramic capacitor according to the second embodiment.

[0059] Figure 19 This is a cross-sectional view showing an example of the main body before firing in the manufacturing method of the multilayer ceramic capacitor according to the second embodiment. Detailed Implementation

[0060] Hereinafter, with reference to the accompanying drawings, the implementation method will be described using a multilayer ceramic capacitor as an example of a multilayer ceramic electronic component.

[0061] (Implementation Method)

[0062] Figure 1 This is a partial cross-sectional perspective view of the stacked ceramic capacitor 100 according to the embodiment. Figure 2 yes Figure 1 AA-line cross-section diagram. Figure 3 yes Figure 1 BB line cross-section diagram. Figure 4 yes Figure 1 CC line cross-section diagram.

[0063] exist Figures 1-4 In this diagram, the Z direction (first direction) is the stacking direction of the dielectric layer 14 and the internal electrodes 12a and 12b, and is the direction in which the lower surface 55 and the upper surface 56 of the main body 10 are opposite each other. The X direction (second direction) is the length direction of the main body 10, and is the direction in which a pair of end faces 51 and 52 of the main body 10 are opposite each other. The Y direction (third direction) is the width direction of the internal electrodes 12a and 12b, and is the direction in which a pair of side faces 53 and 54 of the main body 10 are opposite each other. The X, Y, and Z directions intersect or are orthogonal to each other.

[0064] The multilayer ceramic capacitor 100 includes a body 10 having a generally cuboid shape and external electrodes 20a and 20b. The body 10 has multiple dielectric layers 14, multiple internal electrodes 12a and 12b, and a covering dielectric layer 16. Multiple internal electrodes 12a (first internal electrodes) and multiple internal electrodes 12b (second internal electrodes) are alternately stacked. One of the multiple dielectric layers 14 is disposed between one of the multiple internal electrodes 12a and one of the multiple internal electrodes 12b. The outermost layer in the stacking direction (Z direction) of the multilayer formed by the dielectric layers 14, internal electrodes 12a and 12b is the internal electrodes 12a and 12b, and the lower and upper surfaces of the multilayer are covered by the covering dielectric layer 16. The covering dielectric layer 16 is located on the outermost side in the Z direction.

[0065] Internal electrodes 12a and 12b are alternately exposed on end faces 51 and 52. Internal electrode 12a is exposed from end face 51, while internal electrode 12b is not exposed from end face 51. Internal electrode 12b is exposed from end face 52, while internal electrode 12a is not exposed from end face 52. That is, internal electrodes 12a and 12b are connected to different end faces 51 and 52.

[0066] External electrode 20a contacts internal electrode 12a exposed from body 10 at end face 51. External electrode 20b contacts internal electrode 12b exposed from body 10 at end face 52. External electrode 20a covers end face 51 and also the ends of sides 53 and 54, lower surface 55, and upper surface 56 in the -X direction. External electrode 20b contacts internal electrode 12b at end face 52. External electrode 20b covers end face 52 and also the ends of sides 53 and 54, lower surface 55, and upper surface 56 in the +X direction.

[0067] like Figure 2 and Figure 3 As shown, the central portion of the main body 10 in the X direction when viewed from the Z direction, where the internal electrodes 12a and 12b overlap, is the capacitor region 62. The end portion of the main body 10 in the X direction when viewed from the Z direction, where one (part) of the internal electrodes 12a and 12b is provided but the other is not provided, is the end edge region 64. Figure 3 and Figure 4 As shown, the central portion of the main body 10 in the Y direction, where the internal electrodes 12a and 12b are opposite to each other, is the capacitor region 62. The end portion of the main body 10 in the Y direction, where the internal electrodes 12a and 12b are not provided, is the side edge region 66.

[0068] The dimensions of the multilayer ceramic capacitor 100 are, for example: length (length in the X direction) 0.25 mm, width (width in the Y direction) 0.125 mm, height (height in the Z direction) 0.125 mm, or length 0.4 mm, width 0.2 mm, height 0.2 mm, or length 0.6 mm, width 0.3 mm, height 0.3 mm, or length 1.0 mm, width 0.5 mm, height 0.5 mm, or length 3.2 mm, width 1.6 mm, height 1.6 mm, or length 4.5 mm, width 3.2 mm, height 2.5 mm, but are not limited to these dimensions.

[0069] The thickness of the side edge region 66 is, for example, 10 μm to 30 μm. The length of the end edge region 64 in the X direction is, for example, 10 μm to 50 μm.

[0070] The internal electrodes 12a and 12b are primarily composed of base metals such as nickel (Ni), copper (Cu), and tin (Sn). Noble metals such as platinum (Pt), palladium (Pd), silver (Ag), or gold (Au), or alloys containing them, may also be used as the internal electrodes 12a and 12b. The thickness of the internal electrodes 12a and 12b is, for example, 0.1 μm or more and 1 μm or less.

[0071] The dielectric layer 14 is, for example, a ceramic material having a perovskite structure represented by the general formula ABO3 as the main phase. This perovskite structure includes ABO3, which deviates from its stoichiometric composition. 3-α For example, as this ceramic material, materials selected from barium titanate (BaTiO3), calcium zirconate (CaZrO3), calcium titanate (CaTiO3), strontium titanate (SrTiO3), magnesium titanate (MgTiO3), and Ba, which forms a perovskite structure, can be used. 1-x-y Ca x Sr y Ti 1-z Zr z O3 (0≤x≤1, 0≤y≤1, 0≤z≤1), etc. Ba 1-x- y Ca x Sr y Ti 1-z Zr z O3 can be barium strontium titanate, barium calcium titanate, barium zirconate, barium zirconate titanate, calcium zirconate titanate, or barium calcium zirconate titanate. For example, in dielectric layer 14, the main component ceramic contains 90 at% or more. The thickness of dielectric layer 14 is, for example, 0.3 μm or more and 2 μm or less.

[0072] Additives may be added to the dielectric layer 14. Examples of additives added to the dielectric layer 14 include oxides of zirconium (Zr), hafnium (Hf), magnesium (Mg), manganese (Mn), molybdenum (Mo), vanadium (V), chromium (Cr), rare earth elements (yttrium (Y), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), and ytterbium (Yb)), or oxides containing cobalt (Co), nickel (Ni), lithium (Li), boron (B), sodium (Na), potassium (K), or silicon (Si), or glasses containing cobalt, nickel, lithium, boron, sodium, potassium, or silicon.

[0073] The composition of the main component ceramic covering the dielectric layer 16 can be the same as or different from that of the main component ceramic covering the dielectric layer 14.

[0074] The external electrodes 20a and 20b are primarily composed of metals such as copper, nickel, aluminum (Al), and zinc (Zn), or alloys of two or more of them (e.g., copper-nickel alloys). They contain a glass component for densifying the external electrodes 20a and 20b, and a ceramic component such as a comaterial for controlling the sinterability of the external electrodes 20a and 20b. The glass component is an oxide of barium (Ba), strontium (Sr), calcium (Ca), zinc, aluminum, silicon, or boron. The comaterial is, for example, a ceramic component with the same main component as the dielectric layer 14. Alternatively, a plating film primarily composed of base metals such as nickel, copper, or tin may be formed on the surface of the external electrodes 20a and 20b. A film of conductive resin such as epoxy resin or polyurethane resin may also be formed on the surface of the plating film.

[0075] (First Implementation)

[0076] Figure 5 This is an enlarged schematic diagram of the dielectric layer of the multilayer ceramic capacitor 100 according to the first embodiment. Figure 5 This is an enlarged schematic diagram of the dielectric layer 14 between the internal electrodes 12a and 12b in capacitor region 62. In reality, the ceramic particles 40 (hereinafter referred to as particles) vary widely in shape and size, but... Figure 5 In the diagram, particles 40 are schematically represented by hexagons. The particle size diagrams of particles 40 in region 45 are the same, and the particle size diagrams of particles 40 in region 46 are the same.

[0077] In the dielectric layer 14, multiple particles 40, mainly composed of ceramic, are densely arranged (covered). The boundaries of the particles 40 are grain boundaries 42. The contact points of three particles 40 and the intersection points of three grain boundaries 42 are called triple points 41. When the particle size of the particles 40 increases, the number of triple points 41 per unit area decreases. A pair of regions 45 contact the internal electrodes 12a and 12b in the Z direction. Region 46 is sandwiched between regions 45 in the Z direction. The particle size of the particles 40 in region 45 is smaller than that of the particles 40 in region 46. If the particle size of the region 45 in contact with the internal electrodes 12a and 12b is large, insulation breakdown is more likely to occur, resulting in a shorter lifespan. On the other hand, if the particle size of the particles 40 in region 46 is small, the strength is insufficient, the dielectric constant is small, and the multilayer ceramic capacitor 100 will be larger. Therefore, the particle size of the particles 40 in region 46 should be larger than that in region 45. Therefore, it is possible to suppress insulation breakdown of the multilayer ceramic capacitor 100, thereby extending its lifespan, improving its strength and dielectric constant, and realizing the miniaturization of the multilayer ceramic capacitor 100.

[0078] To form multiple regions with different particle sizes within a dielectric layer 14, one could consider forming the dielectric layer 14 from multiple green sheets of ceramic particles with different particle sizes. However, it is difficult to make each green sheet thin. Moreover, the manufacturing process becomes complex.

[0079] (Manufacturing method of the multilayer ceramic capacitor according to the first embodiment)

[0080] The manufacturing method of the multilayer ceramic capacitor 100 is described. Figure 6 This is a flowchart illustrating an example of a method for manufacturing a multilayer ceramic capacitor according to the first embodiment.

[0081] (Green slice formation process)

[0082] First, a green sheet 30 is formed (step S10). In step S10, a dielectric material is prepared, for example, by adding various additive compounds (sintering aids, etc.) to a ceramic powder such as barium titanate. Phosphorus is not added to the dielectric material. A binder, an organic solvent such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material, and wet mixing is performed to generate a slurry. The binder is, for example, an organic binder such as polyvinyl butyral (PVB) resin, acrylic resin, or cellulose-based resin. Using the generated slurry, the green sheet 30 is coated onto a substrate, for example, by a molding method or a doctor blade method. The substrate is, for example, a PET (polyethylene terephthalate) film. Then, the green sheet 30 is dried. Similarly, a green sheet 31 for covering the dielectric layer 16 is formed.

[0083] (Pattern forming process)

[0084] Next, a metal pattern 32 is formed on the green sheets 30 and 31 (process S12). Figure 7A This is a plan view illustrating an example of the laminated sheet 34 in the manufacturing method of the laminated ceramic capacitor 100 according to the first embodiment. Figure 7B yes Figure 7A AA-line cross-section diagram. Figure 7A The cutting line 36 is the cutting line for cutting the laminate 35 in process S18.

[0085] In step S12, a metal paste is first prepared, comprising metal powder such as nickel powder, a phosphorus compound, an organic binder, and an organic solvent. The phosphorus compound is, for example, phosphoric acid, a phosphate compound, or a phosphoric acid compound. The metal paste may contain ceramic particles as a co-material. Figure 7A and Figure 7B As shown, for example, a metal paste is printed onto a green sheet 30 using gravure printing to form a metal pattern 32. This forms a laminate 34 with the metal pattern 32 formed on the green sheet 30. Similarly, a metal pattern 32 is formed on a green sheet 31 used to cover the dielectric layer 16, thereby forming a laminate 34a.

[0086] (Layering process)

[0087] Next, the green films are stacked (process S14). Figure 8 This is a cross-sectional view showing an example of the laminated sheet 35 in the manufacturing method of the laminated ceramic capacitor according to the first embodiment, which is equivalent to... Figure 7A The AA cross section. In process S14, multiple laminates 34 are laminated on laminate 34a, and finally a green sheet 31 for covering the dielectric layer 16 is laminated. Thus, a laminate 35 is formed by laminating laminate 34a and multiple laminates 34.

[0088] (Crimping process)

[0089] Next, the laminated sheets 35 are crimped together (step S16). In step S16, pressure is applied to the laminated sheets 35 formed in step S14, thereby crimping together the multiple laminated sheets 34a and 34. As a crimping method, a hydrostatic press is used, for example.

[0090] (Cutting process)

[0091] Next, the laminated sheet 35 is cut (step S18). In step S18, the laminated sheet is cut along a predetermined cutting line 36 in the lamination direction using a cutting blade, thereby preparing multiple main bodies 10. After step S18, the main bodies 10 can be ground by methods such as tumbling. As a result, the corners of the main bodies 10 are rounded.

[0092] (External electrode formation process)

[0093] Next, external electrodes 20a and 20b are formed (step S20). In step S20, a conductive paste, for example, comprising metal powder, glass powder, binder, and solvent, is applied to end faces 51 and 52. After applying the conductive paste, the base metal layer of the external electrodes 20a and 20b is formed by sintering. The binder and solvent evaporate during sintering. The conductive paste is applied, for example, using an impregnation method.

[0094] (Firing process)

[0095] Next, the main body 10 is fired (step S22). In step S22, the main body 10 is subjected to a binder removal treatment in a nitrogen atmosphere at 250°C to 500°C, and then fired in a reducing atmosphere at 1300°C to 1400°C. This sinters the particles within the main body 10. After step S22, a plated metal layer can be formed on the surface of the base metal layer of the external electrodes 20a and 20b by a plating method.

[0096] Alternatively, the external electrodes 20a and 20b can be formed before the firing process, and then fired during the firing process. Alternatively, during the cutting process S18, the metal pattern 32 can be exposed from the Y-direction side of the laminate, forming a lateral sheet on the side of the laminate.

[0097] During the debinding process in the firing process, phosphorus within the metal pattern 32 diffuses into the green sheet 30. The phosphorus increases the decomposition temperature of the binder and other resins contained in the green sheet 30. Therefore, when the phosphorus concentration is high, carbon from the resin tends to remain at the boundaries of the ceramic powder. This inhibits the sintering of the ceramic powder. Consequently, the particle size of the ceramic particles 40 becomes smaller. This is based on the discovery of the inventors of this invention.

[0098] exist Figure 5 In the dielectric, phosphorus is mainly distributed in the following locations: near the region 43 where the internal electrode 12a or 12b contacts the grain boundary 42; near the triple point 41a of the particle 40a that contacts the internal electrode 12a or 12b; and near the triple point 41b of the particle 40b that does not contact the internal electrodes 12a and 12b but is adjacent to the particle 40a that contacts the internal electrode 12a or 12b. Thus, phosphorus exists near the triple points 41a and 41b, thereby hindering the sintering of the dielectric. Therefore, the particle size of particles 40a and 40b will not become larger than that of other particles 40.

[0099] Figure 9 This is a schematic diagram showing the molar ratio of phosphorus in the capacitor region relative to the position within the dielectric layer. Figure 9The horizontal axis represents the position Z in the Z direction. The vertical axis represents the molar ratio of phosphorus. The molar ratio of phosphorus is the molar ratio of phosphorus relative to the main component metal element of the ceramic within the dielectric layer 14. For example, if the main component of the ceramic within the dielectric layer 14 is barium titanate, the main component metal element is either titanium or barium. Thus, the molar ratio is defined by the molar ratio of phosphorus relative to titanium or the molar ratio of phosphorus relative to barium.

[0100] like Figure 9 As shown, the molar ratio of phosphorus is high at the boundaries between the internal electrodes 12a and 12b and the dielectric layer 14. The molar ratio of phosphorus decreases with distance from the internal electrodes 12a and 12b. The molar ratio of phosphorus is lowest near the center of the dielectric layer 14.

[0101] Figure 10 This is a schematic diagram representing the average molar ratio of phosphorus in different regions of the dielectric. Figure 10 In the middle, the dashed line represents Figure 9 The molar ratio of phosphorus in dielectric layer 14 within capacitor region 62. A dielectric layer 14 in capacitor region 62, such as... Figure 5 As shown, the area is hypothetically divided into three regions: a pair of first regions A1 in contact with the internal electrodes 12a and 12b, and a second region A2 sandwiched between the pair of first regions A1. In this case, the first molar ratio P1 of phosphorus relative to the main component metal element in the first region A1 is higher than the second molar ratio P2 of phosphorus relative to the main component metal element in the second region A2.

[0102] The first molar ratio P1 is preferably 1.2 times or more than the second molar ratio P2, and more preferably 1.5 times or more. The first molar ratio P1 is, for example, 0.002 to 0.02 (0.2% to 2%). The second molar ratio P2 is, for example, 0.001 to 0.01 (0.1% to 1%).

[0103] Because the first molar ratio P1 is higher than the second molar ratio P2, the particle size W1 (first particle size) of the particles 40 in the dielectric layer 14 in the first region A1 is smaller than the particle size W2 (second particle size) of the particles 40 in the dielectric layer 14 in the second region A2. This improves the lifetime. On the other hand, because the particle size W4 of the particles 40 is large, a high dielectric constant can be obtained. Furthermore, in Figure 7A and Figure 7B In this process, by adding phosphorus to the metal pattern 32, it is possible to achieve... Figure 5 The structure allows for the suppression of complex manufacturing processes. The particle size W1 is preferably 1.2 times or more than the particle size W2, more preferably 1.5 times or more. The particle size W1 is, for example, 80 nm to 500 nm. The particle size W2 is, for example, 100 nm to 1 μm.

[0104] Phosphorus is distributed near internal electrodes 12a and 12b. Therefore, as... Figure 5As shown, in the dielectric layer 14, the particle size W3 (third particle size) of the ceramic particles 40b that are not adjacent to the internal electrodes 12a and 12b but are adjacent to the ceramic particles 40a that contact the internal electrodes 12a or 12b is smaller than the particle size W2 of the ceramic particles 40 in the second region A2. The particle size W3 of the ceramic particles 40b is preferably 0.8 times or less than the particle size W2 of the ceramic particles 40 in the second region A2, more preferably 0.5 times or less.

[0105] In addition, Figure 10 In the dielectric layer 14, within a range of 0.1 times the width W0 in the Z direction from the internal electrodes 12a and 12b (i.e., in a pair of third regions A3), the third molar ratio P3 of phosphorus relative to the main component metal element is at least 1.5 times the fourth molar ratio P0 of phosphorus relative to the main component metal element in the entire dielectric layer 14. The third molar ratio P3 is preferably at least 2 times the fourth molar ratio P0, and more preferably at least 3 times.

[0106] If the number of ceramic particles 40 in the Z direction of the dielectric layer 14 is small, the molar ratio distribution of phosphorus in the Z direction within the dielectric layer 14 will become nearly uniform. Therefore, compared with Figure 5 The number of ceramic particles 40 overlapping the straight lines 44 within the dielectric layer 14 (i.e., the number of ceramic particles 40 in the Z direction of the dielectric layer 14) is preferably 5 or more, more preferably 7 or more, and even more preferably 10 or more. From the viewpoint of not reducing the dielectric constant of the dielectric layer 14, the number of ceramic particles 40 in the Z direction of the dielectric layer 14 is 20 or less.

[0107] In order for phosphorus to diffuse into dielectric layer 14, Figure 7A and Figure 7B The molar ratio of phosphorus to the main component metal element in the metal pattern 32 is preferably 0.0003 to 0.003 (0.03% to 0.3%). In addition, the firing temperature in the firing process S22 is preferably 1500°C or lower, and more preferably 950°C to 1300°C.

[0108] The diffusion of phosphorus from the internal electrodes 12a and 12b to the dielectric layer 14 mainly occurs when the ceramic main component of the dielectric layer 14 is barium titanate and the main component of the internal electrodes 12a and 12b is nickel.

[0109] Thus, according to the manufacturing method of the first embodiment, by diffusing phosphorus in the metal pattern 32 into the dielectric layer 14, the particle size and molar ratio of the particles 40 in the first to third regions A1 to A3 are adjusted. Therefore, compared with the complex manufacturing process of forming a dielectric layer 14 from multiple green sheets with different particle sizes, the manufacturing process can be simplified.

[0110] Figure 11A and Figure 11B This is a diagram illustrating an example of a particle size measurement method. For example... Figure 11A and Figure 11B As shown, cross-sections of dielectric layer 14 and overlying dielectric layer 16 are observed using an electron microscope. The area S of particle 40 is calculated. Assuming a circle 47 with area S, the diameter 48 (Heywood diameter: diameter equivalent to projected area) of this circle 47 is defined as the particle diameter W of particle 40. That is, regarding the particle diameter W, if the area of ​​particle 40 is S, then... .

[0111] The particle sizes W1 and W2 in the first and second regions A1 and A2, respectively, are defined as follows: (e.g.) Figure 5 As shown, for example in an electron microscope image, a straight line 44 is drawn that traverses the first and second regions A1 and A2 and extends in the Z direction. The particle size W of all particles 40 within the first region A1 that overlap with the straight line 44 but not with the second region A2 is measured. The number of particles 40 whose particle size W is measured is 10 to 100. If the number of particles 40 whose particle size is measured is less than 10, another straight line 44 is drawn, and the particle size W of the particles 40 that overlap with the other straight line 44 is measured. The median (middle value) of the measured particle size W of the particles 40 is defined as particle size W1. For particle size W2, also using an electron microscope image, the particle size W of all particles 40 within the second region A2 that overlap with the straight line 44 but not with the first region A1 is measured. The particle size W of 10 to 100 particles 40 is measured in the same manner as for particle size W1, and the median of particle size W is defined as particle size W2. For the particle size W3 of ceramic particles 40b, for example, the particle size W of 10 to 20 particles 40b as the object is measured in an electron microscope image, and the median of the measured particle sizes W is defined as particle size W3.

[0112] The molar ratio of phosphorus relative to the main metallic element of ceramics can be measured, for example, using inductively coupled plasma atomic emission spectrometry (ICP-AES), energy-dispersive X-ray spectroscopy (EDX-ray spectroscopy), or electron probe microscopy. For instance, EDX-AES or electron probe microscopy can be used to investigate the regions where phosphorus is present, and ICP-AES can be used to measure the molar concentration of phosphorus and the molar concentration of the target element in those regions. The molar ratio of phosphorus is calculated based on the ratio of molar concentrations. The molar ratio within the first to third regions A1 to A3 is determined by drawing a straight line in the Z direction that crosses the first to third regions A1 to A3 (e.g., ...). Figure 5 The molar ratio of the part overlapping with the straight line (44) is obtained by averaging the values ​​in each of the first to third regions A1 to A3.

[0113] The number of particles 40 in the Z direction can be defined, for example, by drawing a straight line 44 extending in the Z direction in the dielectric layer 14 in an electron microscope image, and counting the number of particles 40 that the straight line 44 passes through. Straight lines can be drawn at five or more different locations, and the average number of particles passing through each line can be used to determine the number of particles 40 in the Z direction.

[0114] (Second Implementation)

[0115] Figure 12 This is an enlarged schematic diagram of the dielectric layer 14 between the internal electrodes 12a and 12b in the capacitor region 62 of the stacked ceramic capacitor of the second embodiment. Figure 13 This is an enlarged schematic diagram of the dielectric layer 14 between the internal electrodes 12a and 12a in the end edge region 64 of the stacked ceramic capacitor of the second embodiment. Figure 14 This is an enlarged schematic diagram of the covering dielectric layer 16 of the multilayer ceramic capacitor according to the second embodiment. Figures 12-14 In the middle, to and Figure 5 The same structures are labeled with the same reference numerals, and their descriptions are omitted. Figures 12-14 In, with Figure 5 Particle 40 is also schematically represented by a hexagon, and further indicated by the same particle size.

[0116] In the dielectric layer 14 and the covering dielectric layer 16, multiple particles 40, mainly composed of ceramic, are densely arranged (covered). When the particle size of the particles 40 increases, the number of triple points 41 per unit area decreases. When the particle size of the particles 40 increases, insulation breakdown is more likely to occur in the dielectric layer, resulting in a shorter lifespan. On the other hand, when the particle size of the particles 40 increases, the strength of the dielectric layer 14 increases. Phosphorus in the dielectric layer 14 is, for example, mostly distributed near the triple points 41.

[0117] The molar ratio of phosphorus in the dielectric layer 14 of capacitor region 62 to the main component metal element of ceramic is set as P1 (first molar ratio), and the particle size of particle 40 is set as W1 (first particle size). The molar ratio of phosphorus in the dielectric layer 14 of end edge region 64 to the main component metal element is set as P2 (second molar ratio), and the particle size of particle 40 is set as W2 (second particle size). The molar ratio of phosphorus in the covering dielectric layer 16 to the main component metal element of ceramic is set as P3 (third molar ratio), and the particle size of particle 40 is set as W3 (third particle size). The molar ratio of phosphorus in the dielectric layer 14 of side edge region 66 to the main component metal element of ceramic is set as P4 (fourth molar ratio), and the particle size of particle 40 is set as W4 (fourth particle size).

[0118] Regarding the first to fourth molar ratios P1 to P4, the relationships P1 > P2, P3, and P4 hold. Regarding the particle diameters W1 to W4, the relationships W1 < W2, W3, and W4 hold. For example, when the main component of the ceramic in the dielectric layer 14 is barium titanate, the main component metal elements of the ceramic are titanium and barium. Therefore, the phosphorus ratio (proportion of phosphorus) is defined by the molar ratio of phosphorus to titanium or the molar ratio of phosphorus to barium.

[0119] In the end-edge region 64, the distance between the internal electrodes 12a is large, and the same voltage is applied to the internal electrodes 12a. Therefore, dielectric breakdown is not likely to occur. In the capacitance region 62, the distance between the internal electrodes 12a and 12b is small, and different voltages are applied to the internal electrodes 12a and 12b. Therefore, dielectric breakdown is likely to occur. Thus, the particle diameter relationship is set as W1 < W2. Thereby, dielectric breakdown is not likely to occur in the capacitance region 62. On the other hand, in the end-edge region 64, since dielectric breakdown is not likely to occur, even if the particle diameter W2 is large, the influence is small. Therefore, by increasing the particle diameter W2, the strength of the dielectric layer 14 can be improved. In the covering dielectric layer 16 and the side-edge region 66, almost no voltage is applied. Therefore, the particle diameter relationships are set as W1 < W3, W4. Thereby, the strength of the covering dielectric layer 16 and the side-edge region 66 can be improved. By improving the strength of the covering dielectric layer 16, the end-edge region 64, and the side-edge region 66, the strength of the main body 10 can be improved.

[0120] (Example 1 of the manufacturing method of the multilayer ceramic capacitor of the second embodiment)

[0121] An example 1 of the manufacturing method of the multilayer ceramic capacitor 100 of the second embodiment will be described. The process of this manufacturing method is the same as the process of the manufacturing method of the first embodiment, so reference will be made in the following description Figure 6 .

[0122] (Green sheet forming process)

[0123] First, a green sheet 30 is formed (step S10). In step S10, for example, a phosphorus compound and various additive compounds (sintering aids, etc.) are added to a ceramic powder such as barium titanate to prepare a dielectric material. The phosphorus compound is, for example, phosphoric acid, a phosphate compound, or a phosphoric acid compound. A binder, an organic solvent such as ethanol or toluene, and a plasticizer are added to the prepared dielectric material, and wet mixing is performed to generate a slurry. The binder is, for example, an organic binder such as polyvinyl butyral (PVB) resin, an acrylic resin, or a cellulose resin. Using the generated slurry, the green sheet 30 is coated on a substrate, for example, by a doctor blade method or a knife coating method. The substrate is, for example, a PET (polyethylene terephthalate) film. Then, the green sheet 30 is dried.

[0124] Similar to the above description, a green sheet 31 is formed for covering the dielectric layer 16. A phosphorus compound is added to the dielectric material used for the green sheet 31, or no phosphorus compound is added. The molar ratio M3 of phosphorus in the green sheet 31 relative to the main component element of the ceramic particles is lower than the molar ratio M1 of phosphorus in the green sheet 30 relative to the main component element of the ceramic particles. The molar ratio M1 of phosphorus in the green sheet 30 relative to the main component element of the ceramic particles is, for example, 0.002 to 0.02 (0.2% to 2%), and the molar ratio M3 of phosphorus in the green sheet 31 relative to the main component element of the ceramic particles is, for example, approximately 0%. The molar ratio M1 is preferably more than twice the molar ratio M3, more preferably more than ten times, and even more preferably more than 100 times.

[0125] (Pattern forming process)

[0126] Next, a metal pattern 32 and a dielectric pattern 33 are formed on the green sheet 30 or 31 (process S12). Figure 15A This is a plan view illustrating an example of the laminated sheet 34 in the manufacturing method of the laminated ceramic capacitor 100 according to the second embodiment. Figure 15B yes Figure 15A AA-line cross-section diagram. Figure 15A The cutting line 36 is the cutting line for cutting the laminate 35 in process S18.

[0127] In step S12, a metal paste containing metal powders such as nickel powder, an organic binder, and an organic solvent is first prepared. The metal paste may contain ceramic particles as a co-material. For example... Figure 15A and Figure 15B As shown, for example, a metal paste is printed onto a raw film 30 using gravure printing to form a metal pattern 32.

[0128] Next, a dielectric paste containing ceramic powder such as barium titanate powder, organic binder, organic solvent, and plasticizer is prepared. A phosphorus compound is added to the dielectric paste, or no phosphorus compound is added. For example, the dielectric paste is printed onto the green sheet 30 using gravure printing to form a dielectric pattern 33. The dielectric pattern 33 is the inverse pattern of the metal pattern 32, and preferably there is almost no gap between the dielectric pattern 33 and the metal pattern 32. This suppresses the height difference between the capacitor region 62 and the edge region 64 after firing. The molar ratio M2 of phosphorus in the dielectric pattern 33 relative to the main component metal element of the ceramic particles is, for example, approximately 0%, lower than the molar ratio M1 of phosphorus in the green sheet 30 relative to the main component metal element of the ceramic particles. The molar ratio M1 is preferably more than twice the molar ratio M2, more preferably more than 10 times, and even more preferably more than 100 times.

[0129] Through the above processes, a laminated sheet 34 is formed on the green sheet 30 with a metal pattern 32 and a dielectric pattern 33 formed thereon. On the green sheet 31 for covering the dielectric layer 16, a metal pattern 32 and a dielectric pattern 33 are also formed in the same manner as the green sheet 31, thereby forming a laminated sheet 34a.

[0130] (Lamination process)

[0131] Next, laminate the green sheets (process S14). Figure 16 It is a cross-sectional view showing an example of the laminated sheet 35 in the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment, corresponding to the Figure 15A A-A cross-section. In process S14, a plurality of laminated sheets 34 are laminated on the laminated sheet 34a, and finally the green sheet 31 for covering the dielectric layer 16 is laminated. Thus, a laminated sheet 35 formed by laminating the laminated sheet 34a and a plurality of laminated sheets 34 is formed.

[0132] Then, in the same manner as in the first embodiment, a crimping process S16, a cutting process S18, an external electrode forming process S20, and a firing process S22 are performed. As described above, in the firing process, phosphorus raises the decomposition temperature of resins such as adhesives contained in the green sheets 30 and 31 and the dielectric paste. Therefore, if the molar ratio of phosphorus is high, carbon from the resin is likely to remain at the boundaries of the ceramic powder. Therefore, the sintering of the ceramic powder is suppressed. As a result, the particle size of the ceramic particles 40 becomes smaller. This is based on the findings of the inventors of the present invention.

[0133] The molar ratio M1 of phosphorus in the green sheet 30 is higher than the molar ratio M3 of phosphorus in the green sheet 31 (i.e., the outermost green sheet in the main body) with respect to the main component metal element of the ceramic particles. Therefore, after firing, the molar ratio P1 > P3, and the particle size W1 < W3.

[0134] When the molar ratio M2 of phosphorus in the dielectric pattern 33 is at the same level as the molar ratio M3 of phosphorus in the green sheet 31, the dielectric layer 14 in the end edge region 64 is formed by the green sheet 30 with a high molar ratio M1 of phosphorus and the dielectric pattern 33 with a low molar ratio M2 of phosphorus. On the other hand, the covering dielectric layer 16 is formed by the green sheet 31 with a low molar ratio M3 of phosphorus. Thus, after firing, the molar ratio P2 > P3, and the particle size W2 < W3. On the other hand, the side edge region 66 is formed by the green sheet 30. Thus, the first molar ratio P1 and the fourth molar ratio P4 are substantially the same, and the particle size W1 and the particle size W4 are substantially the same. Thus, P4 ≤ P2.

[0135] (Example 2 of the manufacturing method of the multilayer ceramic capacitor according to the second embodiment)

[0136] An example 2 of the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment will be described. Figure 17This is a flowchart of Example 2 of the manufacturing method of the multilayer ceramic capacitor according to the second embodiment. As Figure 17 shown, processes S10 to S18 are the same as Figure 6 those.

[0137] Figure 18 This is a cross-sectional view showing an example of the laminate 11 in the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment. Figure 18 This corresponds to the B-B cross-section in Figures 2-4 after process S18. The metal pattern 32 is exposed from the side surfaces 53a and 54a of the laminate 11 formed by laminating the green sheets 30, 31 and the metal pattern 32.

[0138] (Side green sheet pasting)

[0139] After process S18, side green sheets are pasted to form the pre-firing body 10 (process S19). Figure 19 This is a cross-sectional view showing an example of the pre-firing body 10 in the manufacturing method of the multilayer ceramic capacitor 100 according to the second embodiment. In process S19, the green sheet 31 for the side dielectric layer is pressed against the side surface 53a of the laminate 11, and the green sheet 31 is pasted onto the side surface 53a. Similarly, the green sheet 31 is pasted onto the side surface 54a of the laminate 11. The green sheet 31 does not contain phosphorus added, or the molar ratio M3 of phosphorus in it is lower than the molar ratio M1 of phosphorus in the green sheet 30. Then, the processes S20 for forming the external electrodes 20a and 20b are performed.

[0140] (Firing process)

[0141] Next, a firing process (process S22) is performed. Thereby, the side edge regions 66 are formed from the green sheets pasted onto the side surfaces 53a and 54a.

[0142] Then, the same processes as Figure 6 S22 are performed.

[0143] In the multilayer ceramic capacitor manufactured by the manufacturing method of this example, the molar ratio M3 of phosphorus in the green sheet 31 pasted onto the side surfaces 53a and 54 before the firing process is lower than the molar ratio M1 of phosphorus in the green sheet 30. Therefore, after the firing process, the molar ratio P1 > P4 and the particle size W1 < W4. When the molar ratio M2 of phosphorus in the dielectric pattern 33 is at the same level as the molar ratio M3 of phosphorus in the green sheet 31, the dielectric layer 14 in the end edge region 64 is formed from the green sheet 30 with a high molar ratio M1 of phosphorus and the dielectric pattern 33 with a low molar ratio M2 of phosphorus. On the other hand, the side edge regions 66 are formed from the green sheet 31 with a low molar ratio M3 of phosphorus. Therefore, after firing, the molar ratio P2 > P4 and the particle size W2 < W4.

[0144] (Example 3 of the manufacturing method of the multilayer ceramic capacitor according to the second embodiment)

[0145] Example 3 of the manufacturing method of the multilayer ceramic capacitor 100 of the second embodiment will be described. The manufacturing process of the multilayer ceramic capacitor 100 is the same as Figure 6 or Figure 17 the same. A phosphorus compound is not added to the green sheets 30 and 31 in process S10 or to the dielectric pattern 33 in process S12. A phosphorus compound is added to the metal pattern 32 in process S12. The phosphorus compound is, for example, phosphoric acid, a phosphate compound, or a phosphorous acid compound.

[0146] The other processes S10 to S20 are the same as those in Examples 1 and 2 of the manufacturing method. Then, in the debinding process in process S22 as the firing process, phosphorus in the metal pattern 32 diffuses into the green sheet 30. In addition, the diffusion of phosphorus from the metal pattern 32 to the green sheet 30 can be controlled by the temperature of the debinding process, the molar ratio of phosphorus in the metal pattern 32, etc. Then, the same process as the firing process S22 is performed.

[0147] In the multilayer ceramic capacitor 100 manufactured by the manufacturing method of this example, in the capacitance region 62, phosphorus diffuses from both the internal electrodes 12a and 12b into the dielectric layer 14. As a result, the molar ratio P1 of phosphorus in the dielectric layer 14 becomes the highest. In the end edge region 64, phosphorus diffuses from one of the internal electrodes 12a and 12b into the dielectric layer 14. Therefore, the molar ratio P2 of phosphorus in the dielectric layer 14 is lower than P1. In the covering dielectric layer 16 and the side edge region 66, since the internal electrodes 12a and 12b are not provided inside, the third molar ratio P3 and the fourth molar ratio P4 of phosphorus in the covering dielectric layer 16 and the side edge region 66 are lower than the second molar ratio P2.

[0148] As described above, after firing, the molar ratio becomes P1 > P2 ≥ P3 and P4, and the particle size becomes W1 < W2 ≤ W3 and W4. Phosphorus may be added to the metal pattern 32, and, similar to Examples 1 and 2 of the manufacturing method, phosphorus may be added to the green sheet 30. In the green sheet 31 and the dielectric pattern 33, phosphorus is not added or phosphorus with a lower molar ratio than that of the green sheet 30 is added.

[0149] In order for phosphorus to diffuse into the dielectric layer 14, the molar ratio M2 of phosphorus in the metal pattern 32 in process S12 with respect to the main component metal element is preferably 0.0003 to 0.003 (0.03% to 0.3%). In addition, the firing temperature in the firing process S22 is preferably 1500°C or lower, more preferably 950°C to 1300°C.

[0150] To suppress insulation breakdown, extend lifespan, and improve the strength of the body 10, achieving a desired particle size relationship between W1 and W4 requires complex processes such as altering the size of ceramic particles within the green sheets 30 and 31 and the dielectric pattern 33. In Examples 1 to 3 of the manufacturing method, by adjusting the molar ratio of phosphorus in the green sheets 30 and 31, the metal pattern 32, and the dielectric pattern 33 to a desired ratio, the particle size relationship between W1 and W4 can be achieved. This allows for a simplified manufacturing method that extends lifespan and improves the strength of the body 10.

[0151] The molar ratio P1 of phosphorus in the dielectric layer 14 within capacitor region 62 relative to the main component metal element of the ceramic is, for example, 0.002 to 0.02. The molar ratio P2 of phosphorus in the dielectric layer 14 within end edge region 64 relative to the main component metal element of the ceramic is, for example, 0.001 to 0.01. The third molar ratio P3 of phosphorus in the covering dielectric layer 16 relative to the main component metal element of the ceramic is, for example, 0 to 0.01. The fourth molar ratio P4 of phosphorus in the dielectric layer 14 within side edge region 66 relative to the main component metal element of the ceramic is, for example, 0 to 0.01.

[0152] The first molar ratio P1 is preferably more than 2 times the second to fourth molar ratios P2, P3, and P4, more preferably more than 5 times, and even more preferably more than 10 times. The second molar ratio P2 is preferably more than 1 times the third molar ratio P3 and the fourth molar ratio P4, more preferably more than 2 times, even more preferably more than 5 times, and even more preferably more than 10 times. In Example 1 of the method for manufacturing a multilayer ceramic capacitor, the fourth molar ratio P4 is less than 1 / 2 times, less than 1 / 5 times, or less than 1 / 10 times the second molar ratio P2.

[0153] The particle size W1 of the ceramic particles 40 in the dielectric layer 14 within the capacitor region 62 is, for example, 80 nm to 1.5 μm or 80 nm to 500 nm. The particle size W2 of the ceramic particles 40 in the dielectric layer 14 within the end edge region 64 is, for example, 150 nm to 2 μm or 100 nm to 1 μm. The particle size W3 of the ceramic particles 40 in the covering dielectric layer 16 is, for example, 150 nm to 2 μm or 100 nm to 1 μm. The particle size W4 of the ceramic particles 40 in the dielectric layer 14 within the side edge region 66 is, for example, 150 nm to 2 μm or 100 nm to 1 μm.

[0154] The particle size W1 is preferably 0.9 times or less than the particle sizes W2, W3, and W4, more preferably 0.7 times or less, and even more preferably 0.5 times or less. The particle size W2 is preferably 1 times or less than the particle sizes W3 and W4, more preferably 0.9 times or less, even more preferably 0.7 times or less, and even more preferably 0.5 times or less.

[0155] In the second embodiment, the particle size W of particle 40 is also determined by reference. Figure 11A and Figure 11B The following method is used to define particle sizes W1, W2, and W3 when the particle sizes W1, W2, and W3 in the dielectric layer 14 of capacitor region 62, end edge region 64, and covering dielectric layer 16 are different in the Z direction. In an electron microscope image, draw a straight line extending in the Z direction across the dielectric layer 14 between adjacent internal electrodes 12a and 12b of capacitor region 62. Measure the particle size W of all particles 40 in dielectric layer 14 that overlap with the straight line. The number of particles 40 whose particle size W is measured is between 10 and 100. If the number of particles 40 whose particle size is measured is less than 10, draw another straight line and measure the particle size W of the particles 40 that overlap with the other straight line. Define the median (or median value) of the particle sizes W of the particles 40 measured as described above as particle size W1. For particle size W2, a straight line extending in the Z direction is drawn across the dielectric layer 14 between adjacent internal electrodes 12a in the end-edge region 64 in the electron microscope image. The particle size W of 10 to 100 particles 40 is measured in the same manner as for particle size W1, and the median value of particle size W is defined as particle size W2. For particle size W3, a straight line extending in the Z direction is also drawn across the dielectric layer 16 in the electron microscope image. The particle size W of 10 to 100 particles 40 is measured in the same manner as for particle size W1, and the median value of particle size W is defined as particle size W3.

[0156] The molar ratio of phosphorus relative to the main component metal element of the ceramic is measured and calculated using the same method as in the first embodiment. The molar ratios within the dielectric layer 14 of the capacitor region 62, the dielectric layer 14 of the end edge region 64, and the covering dielectric layer 16 are obtained by drawing a straight line in the Z direction through the dielectric layer 14 or the covering dielectric layer 16, and averaging the molar ratios of the portions overlapping the straight line in each dielectric layer 14 and the covering dielectric layer 16.

[0157] In addition, in this specification, the term "a component is mainly composed of a certain element" means that the component contains the element to the extent that it can achieve the effect of the implementation method. For example, the molar ratio of the element in the component is 50 mol% or more, 80 mol% or more, or 90 mol% or more.

[0158] The embodiments of the present invention have been described in detail above. However, the present invention is not limited to this specific embodiment. Various modifications and alterations can be made within the scope of the spirit of the present invention as described in the scope of the claims.

[0159] Explanation of reference numerals in the attached figures

[0160] 10 main body

[0161] Internal electrodes 12a and 12b

[0162] 14 Dielectric layer

[0163] 16. Covering dielectric layer

[0164] 20a, 20b External electrodes

[0165] 30, 31 raw slices

[0166] 32 Metal Patterns

[0167] 33 Dielectric Pattern

[0168] 34, 34a, 35 laminated sheets

[0169] 40 pieces

[0170] 41 Three Points

[0171] 42 Grain boundary

[0172] 51 and 52 end faces

[0173] 53, 54 Side View

[0174] 55 Lower surface

[0175] 56. Upper surface

[0176] 62 Capacitor Region

[0177] 64 edge regions

[0178] 66 Side edge region.

Claims

1. A laminated ceramic electronic component, characterized in that, include: A body in which multiple internal electrodes and multiple dielectric layers, primarily composed of ceramic, are alternately stacked in a first direction and have a pair of end faces facing each other in a second direction, the stacked internal electrodes being alternately exposed on the pair of end faces; and A pair of external electrodes that are in contact with the plurality of internal electrodes exposed from the pair of end faces. When a dielectric layer in a capacitor region is imaginarily divided into three regions at equal intervals: a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, the first molar ratio of phosphorus in the pair of first regions relative to the main component metal element of the ceramic is higher than the second molar ratio of phosphorus in the second region relative to the main component metal element, wherein the capacitor region is the central part of the main body in the second direction when viewed from the first direction and the region where the plurality of internal electrodes overlap.

2. The laminated ceramic electronic component according to claim 1, characterized in that: The first particle size of the ceramic particles in the first region is smaller than the second particle size of the ceramic particles in the second region.

3. The laminated ceramic electronic component according to claim 1 or 2, characterized in that: The first molar ratio is more than 1.2 times the second molar ratio.

4. The laminated ceramic electronic component according to claim 1 or 2, characterized in that: The third molar ratio of phosphorus in a pair of third regions relative to the main component metal element is more than 1.5 times the fourth molar ratio of phosphorus in the dielectric layer relative to the main component metal element, and the pair of third regions is a range of 0.1 times the width of the dielectric layer in the first direction from the inner electrode.

5. The laminated ceramic electronic component according to claim 1 or 2, characterized in that: In the dielectric layer, the particle size of the ceramic particles that are not adjacent to the internal electrode but are adjacent to the ceramic particles adjacent to the internal electrode is smaller than the particle size of the ceramic particles in the second region.

6. The laminated ceramic electronic component according to claim 1 or 2, characterized in that: The number of ceramic particles in the first direction of the dielectric layer is five or more.

7. The laminated ceramic electronic component according to claim 1 or 2, characterized in that: The main component of the ceramic is barium titanate, and the main component of the plurality of internal electrodes is nickel.

8. A laminated ceramic electronic component, characterized in that, include: A body in which multiple internal electrodes and multiple dielectric layers, primarily composed of ceramic, are alternately stacked in a first direction and have a pair of end faces facing each other in a second direction, the stacked internal electrodes being alternately exposed on the pair of end faces; and A pair of external electrodes that are in contact with the plurality of internal electrodes exposed from the pair of end faces. The first molar ratio of phosphorus in the dielectric layer of the capacitor region to the main component metal element of the ceramic is higher than the second molar ratio of phosphorus in the dielectric layer of the end edge region to the main component metal element. The capacitor region is the central part of the body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes overlap. The end edge region is the end part of the body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes are not provided.

9. The laminated ceramic electronic component according to claim 8, characterized in that: The first particle size of the ceramic particles in the dielectric layer of the capacitor region is smaller than the second particle size of the ceramic particles in the dielectric layer of the end edge region.

10. The laminated ceramic electronic component according to claim 8, characterized in that: The third molar ratio of phosphorus in the outermost covering dielectric layer of the plurality of dielectric layers is lower than the first molar ratio relative to the main component metal element.

11. The laminated ceramic electronic component according to claim 10, characterized in that: The first particle size of the ceramic particles in the dielectric layer of the capacitor region is smaller than the second particle size of the ceramic particles in the dielectric layer of the end edge region, and the third particle size of the ceramic particles in the covering dielectric layer is larger than the first particle size.

12. The laminated ceramic electronic component according to claim 10, characterized in that: The third molar ratio is lower than the second molar ratio.

13. The laminated ceramic electronic component according to claim 12, characterized in that: The first particle size of the ceramic particles in the dielectric layer of the capacitor region is smaller than the second particle size of the ceramic particles in the dielectric layer of the end edge region, and the third particle size of the ceramic particles covering the dielectric layer is larger than the second particle size.

14. The laminated ceramic electronic component according to claim 10, characterized in that: The fourth molar ratio of phosphorus in the dielectric layer in the side edge region relative to the main component metal element is lower than the first molar ratio, wherein the side edge region is the third upward end of the body that intersects the first direction and the second direction when viewed from the first direction and is not provided with the plurality of internal electrodes.

15. The laminated ceramic electronic component according to claim 14, characterized in that: The fourth molar ratio is lower than or equal to the second molar ratio.

16. A method for manufacturing a laminated ceramic electronic component, characterized in that, include: The process of preparing the main body, wherein the main body is formed by alternately stacking multiple green sheets containing ceramic particles and multiple metal patterns containing phosphorus in the first direction; The process of forming multiple internal electrodes alternately exposed from a pair of opposite end faces in a second direction from the multiple metal patterns by firing the main body; and the process of forming multiple dielectric layers from the multiple green sheets; and The process of forming a pair of external electrodes that are in contact with the plurality of internal electrodes exposed from the pair of end faces. After firing the main body When a dielectric layer in a capacitor region is imaginarily divided into three regions at equal intervals: a pair of first regions in contact with the internal electrodes and a second region sandwiched between the pair of first regions, the first molar ratio of phosphorus in the pair of first regions relative to the main component metal element of the ceramic particles is higher than the second molar ratio of phosphorus in the second region relative to the main component metal element. The capacitor region is the central part of the main body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes overlap.

17. The method for manufacturing a laminated ceramic electronic component according to claim 16, characterized in that: The main component of the ceramic particles is barium titanate, and the main component of the multiple internal electrodes is nickel.

18. A method for manufacturing a laminated ceramic electronic component, characterized in that, include: The process of preparing a body formed by stacking laminated sheets in the first direction, wherein the laminated sheets have metal patterns formed on a green sheet containing ceramic particles and dielectric patterns containing ceramic particles between the metal patterns. The process of forming multiple internal electrodes alternately exposed from a pair of end faces opposite each other in a second direction by firing the main body; and forming multiple dielectric layers from the green sheet and the dielectric pattern. and The process of forming a pair of external electrodes that are in contact with the plurality of internal electrodes exposed from the pair of end faces. The first molar ratio of phosphorus in the green sheet sandwiched by the metal pattern in the first direction to the main component metal element of the ceramic particles is higher than the second molar ratio of phosphorus in the dielectric pattern to the main component metal element.

19. The method for manufacturing a laminated ceramic electronic component according to claim 18, characterized in that: The phosphorus in the outermost green sheet in the first direction of the main body has a third molar ratio relative to the main component metal element that is lower than the first molar ratio.

20. The method for manufacturing a laminated ceramic electronic component according to claim 19, characterized in that: The process of preparing the main body includes: The process of preparing a laminate, wherein the metal pattern in the laminate is exposed from a side facing upwards at a third direction intersecting the first and second directions; and The process of attaching a side sheet containing ceramic particles to the side surface of the laminate. The fourth molar ratio of phosphorus in the lateral sheet relative to the main component metal element is lower than the first molar ratio.

21. A method for manufacturing a laminated ceramic electronic component according to any one of claims 18 to 20, characterized in that: After the main body is fired, the first molar ratio of phosphorus in the dielectric layer of the capacitor region relative to the main component metal element is higher than the second molar ratio of phosphorus in the dielectric layer of the end edge region relative to the main component metal element. The capacitor region is the central part of the main body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes overlap. The end edge region is the part of the main body in the second direction when viewed from the first direction, and the part where the plurality of internal electrodes are not provided.

22. A method for manufacturing a laminated ceramic electronic component, characterized in that, include: The process of preparing a body formed by stacking laminated sheets in the first direction, wherein the laminated sheets have phosphorus-containing metal patterns and dielectric patterns containing ceramic particles between the metal patterns on a green sheet containing ceramic particles. The process of forming multiple internal electrodes alternately exposed from a pair of end faces opposite each other in a second direction by firing the main body; and forming multiple dielectric layers from the green sheet and the dielectric pattern. and The process of forming a pair of external electrodes that are in contact with the plurality of internal electrodes exposed from the pair of end faces. After the main body is fired, the first molar ratio of phosphorus in the dielectric layer of the capacitor region relative to the main component metal element is higher than the second molar ratio of phosphorus in the dielectric layer of the end edge region relative to the main component metal element. The capacitor region is the central part of the main body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes overlap. The end edge region is the end part of the main body in the second direction when viewed from the first direction, and the region where the plurality of internal electrodes are not provided.

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