A boost converter topology and control method

Abstract

This invention belongs to the field of power electronics and DC power system protection technology, specifically relating to a boost converter topology and control method. The structure includes: a power supply and a boost inductor L. boost Main switch tube Q 1. Converter circuit breaker Q conv capacitor circuit breaker Q cap The components include a first resistor R1, a second resistor R2, a load resistor R3, a first capacitor C1, a second capacitor C2, a third capacitor C3, a first diode Dsnub1, a second diode Dsnub2, a varistor MOV, and a line inductor Lline. This invention can replace traditional DC circuit breakers, improving system operating efficiency and protection performance. It can interrupt the discharge current of the DC bus capacitor in microseconds and safely release the inductor's stored energy in milliseconds, avoiding voltage overshoot in semiconductor devices and effectively improving the safety and reliability of the DC power grid.

Description

Technical Field

[0001] This invention belongs to the field of power electronics and DC power system protection technology, specifically relating to a boost converter topology and control method. Background Technology

[0002] Compared with AC power grids, DC power grids have advantages such as fewer energy conversion links, higher transmission efficiency, and less conductor usage, making them particularly suitable for applications such as photovoltaic power generation, energy storage devices, electric vehicle charging facilities, and data centers.

[0003] However, due to the lack of a natural zero-crossing point in DC systems, the short-circuit fault current rises extremely rapidly, typically reaching several times the rated current within microseconds. Simultaneously, the large capacitance of DC bus capacitors and the small inductance of lines cause the fault current to exhibit a steep rise characteristic, making it difficult for traditional AC-based circuit breakers to meet the requirements for rapid disconnection.

[0004] Current solutions primarily rely on solid-state DC circuit breakers or hybrid DC circuit breakers. While these devices can achieve rapid disconnection, they are costly, bulky, and have significant power losses, and they also impose certain limitations on the scalability of the power grid topology. Furthermore, with the widespread application of power electronic converters in DC systems, researchers have begun to explore utilizing the semiconductor devices within the converters themselves to perform some fault isolation functions, forming what are known as "converter-based protection" or "circuit breaker-less protection."

[0005] A key drawback of traditional boost converters is the lack of fully controllable switching devices between their input and output terminals. The power transmission path always has a conducting branch, making it impossible to independently disconnect polarity-to-polarity short-circuit faults on the load side. This deficiency limits the use of boost converters in DC grid protection, restricting their widespread application in photovoltaic power generation and DC microgrids.

[0006] Chinese patent publication number CN108599120A, entitled "A DC Current-Limiting Circuit Breaker," includes a first combined circuit, a second combined circuit, a fast-acting mechanical switch, a first inductor, a second inductor, a third inductor, and a first surge arrester. One end of the first inductor is connected to one end of the fast-acting mechanical switch at a second connection point; the other end of the fast-acting mechanical switch is connected to one end of the third inductor at a third connection point; the other end of the third inductor is connected to one end of the second inductor at a fourth connection point; and the first surge arrester is connected between the second and fourth connection points. The first and second combined circuits are connected to the second and fourth connection points, respectively. This patent application has a complex structure and suffers from significant power loss. Summary of the Invention

[0007] To overcome the problems existing in the prior art, the present invention aims to provide a boost converter topology and control method. By introducing controllable power switching devices in the capacitor branch and output branch, rapid detection and isolation of polarity-to-polarity short-circuit faults on the load side can be achieved, thereby replacing traditional DC circuit breakers and improving system operating efficiency and protection performance. It can interrupt the discharge current of the DC bus capacitor in microseconds and safely release the inductor energy in milliseconds, avoiding voltage overshoot of semiconductor devices and effectively improving the safety and reliability of the DC power grid.

[0008] To achieve the above objectives, the technical solution adopted by the present invention is as follows: In a first aspect, the present invention provides a boost converter topology, comprising: a power supply and a boost inductor L. boost Main switch tube Q 1. Converter circuit breaker Q conv capacitor circuit breaker Q cap The components are: first resistor R1, second resistor R2, load resistor R3, first capacitor C1, second capacitor C2, third capacitor C3, first diode Dsnub1, second diode Dsnub2, varistor MOV, and line inductor Lline. The positive terminal of the power supply is connected to the boost inductor L. boost The first terminal, the boost inductor L boost The second end is connected to the main switch transistor. Q 1 Collector and Converter Circuit Breaker Q conv collector; main switch transistor Q The collector of diode 1 is connected to the first terminal of the first resistor R1 and the first terminal of the first capacitor C1; the second terminals of the first resistor R1 and the first capacitor C1 are both connected to the cathode of the first diode Dsnub1; the anode of the first diode Dsnub1 is connected to the main switch transistor. Q 1's emitter; converter circuit breaker Q conv The collector of the converter is connected to the first terminal of the varistor MOV, the first terminal of the second capacitor C2, and the first terminal of the second resistor R2; the second terminal of the second capacitor C2 and the second terminal of the second resistor R2 are both connected to the cathode of the second diode Dsnub2; the anode of the second diode Dsnub2 and the second terminal of the varistor MOV are both connected to the converter circuit breaker. Q conv emitter connection; converter circuit breaker Q conv The emitter of the capacitor is connected to the first terminal of the third capacitor C3 and the first terminal of the line inductance Lline; the second terminal of the third capacitor C3 is connected to the capacitor circuit breaker. Q capThe collector connection is such that the second terminal of the line inductance Lline is connected to the first terminal of the load resistor R3; capacitor circuit breaker Q cap The emitter, the second terminal of the load resistor R3, and the main switch transistor Q The collectors of 1 are all connected to the negative terminal of the power supply.

[0009] Optionally, the converter circuit breaker Q conv It uses IGBT components without built-in anti-parallel diodes.

[0010] Optionally, capacitor circuit breaker Q cap This is an IGBT device with an anti-parallel diode.

[0011] Optionally, the third capacitor C3 is a thin-film capacitor.

[0012] Optionally, the capacitance of the third capacitor C3 is less than or equal to 1. mF.

[0013] Optionally, the resistance values ​​of the first resistor R1 and the second resistor R2 are both in the range of 30Ω to 50Ω.

[0014] Optionally, the capacitance range of the first capacitor C1 and the second capacitor C2 is both 3μF to 5μF.

[0015] Optionally, both the first diode Dsnub1 and the second diode Dsnub2 are fast recovery diodes.

[0016] Optionally, the clamping voltage of the varistor MOV is 1.8-2.2 times the rated output voltage of the converter.

[0017] Secondly, the present invention provides a control method for a boost converter topology, comprising the following steps: Capacitor circuit breaker Q cap Boost inductor L boost The current through the load resistor R3; Setting capacitor circuit breakers Q cap The current threshold is a set multiple of the rated ripple current, and the boost inductor L is set accordingly. boost The current threshold is a set multiple of the rated inductor current, and the current threshold of the load resistor R3 is a set multiple of the rated output current. When any sampled current exceeds the set current threshold, the main switch is synchronously turned off via the PWM drive signal. Q 1. Converter circuit breaker Q conv and capacitor circuit breakerQ cap .

[0018] Compared with the prior art, the present invention has the following beneficial effects: Compared with traditional DC grid protection schemes (such as those relying on independent DC circuit breakers, unmodified boost converter topologies) and existing converter-based protection designs, this invention achieves breakthroughs in multiple dimensions in terms of fault response speed, system operating efficiency, device safety, and scenario adaptability. In terms of fault isolation speed, traditional DC circuit breakers are limited by the response delay of mechanical actions or solid-state switches, and fault current blocking usually requires milliseconds. However, this invention, through the coordinated design of capacitor circuit breaking and converter circuit breaking, combined with fault detection logic, can simultaneously cut off the discharge path of the DC bus capacitor and the power supply path to the source-side fault point within 5-10μs, effectively avoiding the problem of the fault current rapidly increasing to several times the rated value within microseconds, and significantly reducing the impact of faults on grid equipment.

[0019] In traditional solutions, a standalone DC circuit breaker is connected in series with the main power path for extended periods, resulting in conduction losses accounting for 3%-8% of the total system losses. This invention eliminates the traditional DC circuit breaker, and the newly added capacitor circuit breaker remains normally open during operation. Its IGBT with anti-parallel diode has a forward voltage drop of only 1.2V. The converter circuit breaker uses an IGBT without a built-in anti-parallel diode, and its conduction losses during complementary switching with the main switch are close to those of a traditional output diode. The overall system operating efficiency is improved by 2-5% compared to traditional solutions, with significant advantages, especially in efficiency-sensitive renewable energy scenarios such as photovoltaics. Furthermore, it improves device safety... In terms of protection, some existing protection designs based on converters do not consider the problem of inductor current interruption caused by switching delay, which can easily lead to voltage spikes of hundreds or even thousands of volts. However, this invention ensures seamless switching of inductor current between the main switch and the converter circuit breaker through a negative dead-time control strategy. Combined with the energy absorption unit composed of buffers and varistors, it can strictly clamp the voltage stress of semiconductor devices within twice the rated operating voltage, avoiding damage to devices due to overvoltage. At the same time, the branch where the capacitor circuit breaker is located has extremely small inductance, so no additional buffer is needed to achieve voltage stability, further simplifying the protection structure.

[0020] In terms of scenario adaptability, this invention can directly adapt to the unidirectional power transmission requirements of different scenarios such as photovoltaic MPPT systems, DC microgrids, and electric vehicle charging facilities. The transformation cost is only 1 / 3 to 1 / 2 of the traditional independent DC circuit breaker solution, and it is compatible with the control logic of existing converters, which lowers the threshold for engineering applications and provides a practical solution for the high efficiency and miniaturization of DC grid protection. Attached Figure Description

[0021] The accompanying drawings described herein are for illustrative purposes only and are not intended to limit the scope of the invention in any way. Furthermore, the shapes and proportions of the components in the drawings are merely schematic to aid in understanding the invention and do not specifically limit the shapes and proportions of the components. In the drawings: Figure 1 This is a topology diagram of a boost converter according to an embodiment of the present invention; Figure 2 This is a logic diagram for generating negative dead time in an embodiment of the present invention. Detailed Implementation

[0022] To enable those skilled in the art to better understand the technical solutions of this invention, the technical solutions of the embodiments of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this invention, and not all embodiments. Based on the embodiments of this invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this invention.

[0023] Therefore, the following detailed description of embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention.

[0024] In the description of the embodiments of the present invention, it should be noted that if terms such as "upper", "lower", "horizontal", "inner" indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product of the invention is usually placed during use, they are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the present invention.

[0025] When an element is referred to as being "set on" another element, it can be directly on the other element or there may be an intervening element. When an element is referred to as being "connected to" another element, it can be directly connected to the other element or there may be an intervening element. The terms "vertical," "horizontal," "left," "right," and similar expressions used herein are for illustrative purposes only and do not represent the only embodiments. The use of the term "horizontal" does not imply that the component is required to be absolutely horizontal, but rather that it may be slightly tilted. "Horizontal" simply means that its direction is more horizontal than "vertical," and does not mean that the structure must be completely horizontal, but rather that it may be slightly tilted.

[0026] It should be noted that similar reference numerals and letters in the following figures denote similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In the description of this invention, it should be understood that the terms "comprising" and "including" indicate the presence of the described features, integrals, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof.

[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of the invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used in the specification and appended claims, the singular forms “a,” “an,” and “the” are intended to include the plural forms unless the context clearly indicates otherwise.

[0028] The present invention will now be described in detail with reference to the accompanying drawings.

[0029] The present invention provides a boost converter topology, characterized in that it includes: a power supply and a boost inductor L. boost Main switch tube Q 1. Converter circuit breaker Q conv capacitor circuit breaker Q cap The components are: first resistor R1, second resistor R2, load resistor R3, first capacitor C1, second capacitor C2, third capacitor C3, first diode Dsnub1, second diode Dsnub2, varistor MOV, and line inductor Lline. The positive terminal of the power supply is connected to the boost inductor L. boost The first terminal, the boost inductor L boost The second end is connected to the main switch transistor. Q 1 Collector and Converter Circuit Breaker Q conv collector; main switch transistor Q The collector of diode 1 is connected to the first terminal of the first resistor R1 and the first terminal of the first capacitor C1; the second terminals of the first resistor R1 and the first capacitor C1 are both connected to the cathode of the first diode Dsnub1; the anode of the first diode Dsnub1 is connected to the main switch transistor. Q 1's emitter; converter circuit breaker Q convThe collector of the converter is connected to the first terminal of the varistor MOV, the first terminal of the second capacitor C2, and the first terminal of the second resistor R2; the second terminal of the second capacitor C2 and the second terminal of the second resistor R2 are both connected to the cathode of the second diode Dsnub2; the anode of the second diode Dsnub2 and the second terminal of the varistor MOV are both connected to the converter circuit breaker. Q conv emitter connection; converter circuit breaker Q conv The emitter of the capacitor is connected to the first terminal of the third capacitor C3 and the first terminal of the line inductance Lline; the second terminal of the third capacitor C3 is connected to the capacitor circuit breaker. Q cap The collector connection is such that the second terminal of the line inductance Lline is connected to the first terminal of the load resistor R3; capacitor circuit breaker Q cap The emitter, the second terminal of the load resistor R3, and the main switch transistor Q The collectors of 1 are all connected to the negative terminal of the power supply.

[0030] This invention uses a converter circuit breaker Q conv and capacitor circuit breaker Q cap The coordinated design can simultaneously cut off the discharge path of the DC bus capacitor and the power supply path to the source-side fault point within 5-10μs, effectively avoiding the problem of the fault current rapidly increasing to several times the rated value within microseconds, and significantly reducing the impact of the fault on the power grid equipment.

[0031] Example 1 The load-side inter-electrode fault of the boost converter is divided into three stages: the DC bus capacitor discharge stage, the freewheeling diode conduction stage, and the source-side current feed-in stage. During this stage, the DC bus capacitor forms an RLC discharge circuit through the fault loop, and the fault current rises rapidly within microseconds. Its voltage and current changes satisfy the following formula:

[0032]

[0033] In the formula, L f For the faulty circuit inductance, R f For the fault circuit resistance, C For DC bus capacitors, V c The voltage across the capacitor. I f Fault current , V c0 , If0 These represent the initial capacitor voltage and the initial line current at the time of the fault; the freewheeling diode conduction phase begins when the capacitor voltage drops to zero, and the fault current decays accordingly. ( t 1 is the start time of this stage); during the source-side current feeding stage, if it is not blocked in time, the fault current will increase further with the source-side power supply capacity.

[0034] like Figure 1 The diagram shows the improved boost converter topology circuit for enhanced DC protection in this invention, including: a power supply and a boost inductor L. boost Main switch tube Q 1. Converter circuit breaker Q conv capacitor circuit breaker Q cap The components are: first resistor R1, second resistor R2, load resistor R3, first capacitor C1, second capacitor C2, third capacitor C3, first diode Dsnub1, second diode Dsnub2, varistor MOV, and line inductor Lline.

[0035] Specifically, the positive terminal of the power supply is connected to the boost inductor L. boost The first terminal, the boost inductor L boost The second end is connected to the main switch transistor. Q 1 Collector and Converter Circuit Breaker Q conv collector; main switch transistor Q The collector of diode 1 is connected to the first terminal of the first resistor R1 and the first terminal of the first capacitor C1; the second terminals of the first resistor R1 and the first capacitor C1 are both connected to the cathode of the first diode Dsnub1; the anode of the first diode Dsnub1 is connected to the main switch transistor. Q 1's emitter; converter circuit breaker Q conv The collector of the converter is connected to the first terminal of the varistor MOV, the first terminal of the second capacitor C2, and the first terminal of the second resistor R2; the second terminal of the second capacitor C2 and the second terminal of the second resistor R2 are both connected to the cathode of the second diode Dsnub2; the anode of the second diode Dsnub2 and the second terminal of the varistor MOV are both connected to the converter circuit breaker. Q conv emitter connection; converter circuit breaker Q conv The emitter of the capacitor is connected to the first terminal of the third capacitor C3 and the first terminal of the line inductance Lline; the second terminal of the third capacitor C3 is connected to the capacitor circuit breaker. Q cap The collector connection is such that the second terminal of the line inductance Lline is connected to the first terminal of the load resistor R3; capacitor circuit breakerQ cap The emitter, the second terminal of the load resistor R3, and the main switch transistor Q The collectors of 1 are all connected to the negative terminal of the power supply.

[0036] Furthermore, the boost inductor L boost The second terminal, the main switch transistor Q 1 Collector and Converter Circuit Breaker Q conv The collectors are connected via a node. (Converter circuit breaker) Q conv The emitter, the first terminal of the third capacitor C3, and the first terminal of the line inductance Lline are connected by a node.

[0037] The first resistor R1, the first capacitor C1, and the first diode Dsnub1 constitute the first set of buffers; the second resistor R2, the second capacitor C2, and the second diode Dsnub2 constitute the second set of buffers.

[0038] The first set of buffers is used to absorb the main switching transistor. Q 1. Eliminate leakage inductance energy during the moment of shutdown, suppress overvoltage during switching, and suppress voltage stress during the switching process.

[0039] The clamping voltage of the varistor MOV is set to 1.8-2.2 times the rated output voltage of the converter. During normal operation, the second set of buffers mainly suppresses switching losses. In case of a fault, the varistor MOV assists in absorbing the energy stored in the inductor and activating the converter circuit breaker. Q conv The voltage clamping is within a safe range.

[0040] capacitor circuit breaker Q cap Because the inductance of the branch is extremely small (<100nH), no additional buffer is required. Capacitor circuit breaker Q cap The IGBT uses an anti-parallel diode, which remains on during normal operation and shuts off during faults (1-3). μs Internal rapid shutdown to block capacitor discharge current.

[0041] Converter circuit breaker Q conv An IGBT without an internal anti-parallel diode is used instead of the output diode of a traditional boost converter, and connected to the inductor. L boost Between the load R3 and the main switch during normal operation. Q 1. Complementary switching: In case of a fault, the path between the source side and the fault point is cut off; the traditional DC circuit breaker is removed, and a capacitor circuit breaker is used instead. Q cap With converter circuit breakerQ conv The coordinated action of the two achieves fault isolation, and the two conduct in opposite directions to avoid short circuit of DC bus capacitor when they conduct at the same time.

[0042] By employing a PWM generation module and controlling the main switch through control logic... Q The drive signal delay of 1 is 20-200. n.s. , or to Q conv The drive signal is 20-200 seconds ahead. n.s. This allows the inductor current to be seamlessly connected. Q 1 and Q conv Switching between these modes suppresses voltage spikes.

[0043] By main switch Q An increment is superimposed on the PWM reference signal of 1 to ensure the converter circuit breaker Q conv The conduction time is slightly earlier than that of the main switch. Q The turn-off time of 1, or Q conv The shutdown time is slightly later than Q The conduction time of 1 is to avoid interruption of inductor current during the switching gap.

[0044] Specifically, to avoid inductor current interruption caused by switch switching delay, a PWM generator is used to control the main switch. Q Fine-tuning of the drive signal of 1, so that Q conv The conduction time is compared to Q The turn-off time of 1 is advanced by 50-100ns, or Q conv The shutdown time is higher than Q The conduction time delay of 1 is 50-100ns. Hardware logic circuitry is used to implement negative dead-time adjustment, avoiding the impact of software delays, ensuring seamless switching of inductor current, and suppressing voltage spikes.

[0045] Example 2 In this embodiment, the capacitance of both the first capacitor C1 and the second capacitor C2 is 3-5μF; the resistance of both the first resistor R1 and the second resistor R2 is 30-50Ω. The clamping voltage of the varistor MOV is 700V, which is compatible with a 380V rated output.

[0046] In this embodiment, the fault detection logic employs multi-parameter fusion judgment, acquiring data from the capacitor circuit breaker through a series sampling resistor or Hall sensor. Q cap The current is used as the capacitor current. I cap The step-up inductor L is sampled through a current transformer.boost The current of 3 is used as the inductor current. I L The current of the load resistor R3 is collected by the shunt as the output current. I o .

[0047] Set the corresponding threshold, when I cap Exceeding five times the rated capacitor ripple current, or I L Exceeding three times the rated inductor current, or I o A fault signal is triggered when the current exceeds ten times the rated output current; after the fault signal is generated, within 1-5... μs Internal synchronous transmission of shutdown command to main switch Q 1. Capacitor circuit breaker Q cap and converter circuit breaker Q conv This ensures that all three components are shut down within a microsecond, blocking the fault current path.

[0048] In this embodiment, the rated capacitor ripple current is 1A. I cap The threshold is set to 5A; the rated inductor current is 2A, the IL threshold is 6A; the rated output current is 5.26A. I o The threshold is 52.6A.

[0049] In this embodiment, the main switching transistor Q 1. Converter circuit breaker Q conv and capacitor circuit breaker Q cap The rated voltage is not less than twice the highest voltage of the system, the on-state voltage drop is 1.2V, and the reverse recovery time is less than 100ns, ensuring stable operation of the system at high frequencies.

[0050] In this embodiment, the first resistor R 1 and the second resistor R 2 is 40Ω, the first capacitor C 1 and the second capacitor C 2. Capacity is 3.2 µF The clamping voltage of the varistor MOV is 700V to prevent overvoltage damage to the IGBT components. The third capacitor C3 is a film capacitor with a capacitance of 1. mF It is used to smooth the output voltage.

[0051] Under normal operating conditions, the improved boost converter of this invention maintains a DC output voltage of 380V through PWM control, with continuous inductor current and low ripple. When a polarity short circuit fault occurs on the load side, the system can complete fault detection and clearing within 5–10μs, ensuring stable DC bus voltage and avoiding energy backflow and device overvoltage.

[0052] This invention achieves rapid fault isolation based on the converter itself, eliminating the need for an external DC circuit breaker. Its system efficiency is improved by approximately 3% compared to traditional solutions, and fault clearing time is reduced to the microsecond level. It can be widely applied in scenarios such as photovoltaic power generation, DC microgrids, and energy storage interfaces.

[0053] Unless otherwise specified, the equipment components involved in the above embodiments are all conventional equipment components, and the structural settings, working methods or control methods involved are all conventional settings, working methods or control methods in the art unless otherwise specified.

[0054] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Any other modifications or equivalent substitutions made by those skilled in the art to the technical solutions of the present invention, as long as they do not depart from the spirit and scope of the technical solutions of the present invention, should be covered within the scope of the claims of the present invention.

Claims

1. A boost converter topology, characterized by, include: Power supply, boost inductor L boost , main switch Q 1. Converter circuit breaker Q conv , capacitor circuit breaker Q cap , first resistor R1, second resistor R2, load resistor R3, first capacitor C1, second capacitor C2, third capacitor C3, first diode Dsnub1, second diode Dsnub2, voltage-dependent resistor MOV and line inductor Lline; The positive terminal of the power supply is connected to the boost inductor L. boost The first terminal, the boost inductor L boost The second end is connected to the main switch transistor. Q 1 Collector and Converter Circuit Breaker Q conv collector; main switch transistor Q The collector of diode 1 is connected to the first terminal of the first resistor R1 and the first terminal of the first capacitor C1; the second terminals of the first resistor R1 and the first capacitor C1 are both connected to the cathode of the first diode Dsnub1; the anode of the first diode Dsnub1 is connected to the main switch transistor. Q 1's emitter; converter circuit breaker Q conv The collector of the converter is connected to the first terminal of the varistor MOV, the first terminal of the second capacitor C2, and the first terminal of the second resistor R2; the second terminal of the second capacitor C2 and the second terminal of the second resistor R2 are both connected to the cathode of the second diode Dsnub2; the anode of the second diode Dsnub2 and the second terminal of the varistor MOV are both connected to the converter circuit breaker. Q conv emitter connection; converter circuit breaker Q conv The emitter of the capacitor is connected to the first terminal of the third capacitor C3 and the first terminal of the line inductance Lline; the second terminal of the third capacitor C3 is connected to the capacitor circuit breaker. Q cap The collector connection is such that the second terminal of the line inductance Lline is connected to the first terminal of the load resistor R3; capacitor circuit breaker Q cap The emitter, the second terminal of the load resistor R3, and the main switch transistor Q The collectors of 1 are all connected to the negative terminal of the power supply.

2. A boost converter topology according to claim 1, characterized in that, Converter circuit breaker Q conv It uses IGBT components without built-in anti-parallel diodes.

3. The boost converter topology of claim 1, wherein, capacitor circuit breaker Q cap This is an IGBT device with an anti-parallel diode.

4. The boost converter topology of claim 1, wherein, The third capacitor C3 is a thin-film capacitor.

5. The boost converter topology of claim 1, wherein, The capacitance of the third capacitor C3 is less than or equal to 1 mF.

6. The boost converter topology of claim 1, wherein, The resistance values ​​of the first resistor R1 and the second resistor R2 are both in the range of 30Ω to 50Ω.

7. The boost converter topology of claim 1, wherein, The capacitance range of the first capacitor C1 and the second capacitor C2 is 3μF to 5μF.

8. The boost converter topology of claim 1, wherein, Both the first diode Dsnub1 and the second diode Dsnub2 are fast recovery diodes.

9. The boost converter topology of claim 1, wherein, The clamping voltage of the varistor MOV is 1.8-2.2 times the rated output voltage of the converter.

10. A control method for a boost converter topology as described in any one of claims 1 to 9, characterized in that, Includes the following steps: Capacitor circuit breaker Q cap , a boost inductor L boost and a load resistor R3; Setting capacitor circuit breakers Q cap The current threshold is a set multiple of the rated ripple current, and the boost inductor L is set accordingly. boost The current threshold is a set multiple of the rated inductor current, and the current threshold of the load resistor R3 is a set multiple of the rated output current. When any sampled current exceeds the set current threshold, the main switch is synchronously turned off via the PWM drive signal. Q 1. Converter circuit breaker Q conv and capacitor circuit breaker Q cap .

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