Continuous j / f mode asymmetric doherty amplifier design method

By employing a continuous J/F mode asymmetric Doherty amplifier design method, this paper solves the problems of difficulty in determining the target impedance trajectory and the reliance on repeated trial and error in phase tuning in broadband deep back-off Doherty power amplifiers. It achieves efficient output matching network synthesis and is applicable to board-level, module-level, and chip-level Doherty power amplifier designs.

CN122528791BActive Publication Date: 2026-09-08CHENGDU YITONG TECH CO LTD
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Patent Information

Application Number
CN202611017801.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2026-07-09
Publication Date
2026-09-08
Estimated Expiration
2046-07-09

AI Technical Summary

Technical Problem

Existing broadband deep back-off Doherty power amplifier designs face challenges such as difficulty in determining the target impedance trajectory, phase tuning relying on repeated trial and error, and high complexity in output matching network synthesis, lacking an integrated design methodology.

Method used

A continuous J/F mode asymmetric Doherty amplifier design method is adopted. By determining the target operating frequency band, center frequency, and optimal output impedance of the carrier amplifier tube of the asymmetric Doherty power amplifier, the load modulation parameters are calculated, a hybrid high-efficiency impedance solution space of continuous Class-J/F mode is constructed, the correspondence between the back-off load impedance and phase parameters of the carrier amplifier is established, the phase response and phase tuning curves are constructed, the target fundamental load impedance trajectory is determined, and the characteristic impedance, phase response, and harmonic impedance are used as design constraints for the output matching network.

Benefits of technology

It improves design certainty and engineering implementation efficiency, reduces reliance on human experience, and is suitable for board-level, module-level, and chip-level output matching network synthesis, enabling broadband and high-efficiency Doherty power amplifier design.

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Abstract

The application belongs to the technical field of radio frequency and microwave power amplifier, and particularly discloses a continuous J / F mode asymmetric Doherty amplifier design method, the response of the phase of a peak output matching network and the phase of a peak branch synthesis network is set, so that the peak branch presents high resistance or nearly open circuit condition under deep output power backoff state; a hybrid high-efficiency impedance solution space of continuous Class-J / F mode is constructed, the load requirement under deep output power backoff state is converted into a characteristic impedance and a phase tuning curve which can directly guide the design of an output matching network; a target fundamental load impedance trajectory is generated, and the target impedance of the post-matching network at the second harmonic and the third harmonic is back calculated, so as to realize the collaborative design of the fundamental load modulation and the harmonic impedance control. The application solves the problems in the prior art, such as difficulty in determining the target impedance trajectory, dependence of phase tuning on repeated trial and error, and high difficulty in synthesizing the output matching network.
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