A packaging method for preventing flux contamination of pads

Abstract

The application provides a packaging method for preventing flux from contaminating a pad, comprising the following steps: step 1: mounting a chip and forming a barrier layer; any one of the following methods is used: method 1: growing the barrier layer on the chip grid first, and then mounting the chip on an empty frame; method 2: mounting the chip on the empty frame first, and then mounting the barrier layer on the chip grid; step 2: mounting a copper clip on the chip; step 3: removing the barrier layer; and step 4: bonding and plastic packaging. The application can further improve the yield of chip packaging.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor power device packaging technology, and relates to a packaging method to prevent flux and solder ball splashing and contamination of the pads during reflow. Background Technology

[0002] The copper clip process for semiconductor packaging is a mature chip packaging process. During the copper clip assembly process, the solvent and flux in the solder paste on the chip source electrode boil and vaporize first, which can easily cause solder powder to splatter and spray to the side with liquid droplets, thereby contaminating the gate pads. This contamination of the gate pads can lead to poor contact and other quality problems in subsequent bonding processes.

[0003] Chinese Patent Publication No. 122294402A discloses a method for manufacturing printed circuit boards (PCBs) to prevent circuit scratches and pad contamination, relating to the field of PCB manufacturing technology. The method includes: coating, exposing, and developing a film on the surface of a multilayer copper foil layer to form circuit and pad patterns; electroplating copper and tin in the patterned areas; etching the copper foil layer in the non-patterned areas after film removal, leaving a tin layer on the surface of the circuits and pads; sequentially performing outer layer AOI inspection, solder mask imaging, and text printing; and finally removing the tin layer from the surface of the circuits and pads. This method, by retaining a tin layer after etching, provides temporary protection during transport, inspection, solder mask, and text printing processes, preventing circuit scratches and pad contamination by ink, ensuring the conductivity stability of the circuits and the wetting effect of the pads, reducing problems such as cold solder joints and weak solder joints, and effectively improving the yield of PCBs. This method is applicable to the PCB field but cannot be applied to the chip packaging field.

[0004] Therefore, it is necessary to design a packaging method that prevents flux from contaminating the solder pads. Summary of the Invention

[0005] The purpose of this invention is to provide a packaging method that prevents flux from contaminating the solder pads, thereby improving the packaging yield.

[0006] To achieve the above objectives, the specific hardware technical solution adopted by the present invention is as follows: A packaging method for preventing flux contamination of solder pads includes the following steps: Step 1: Loading and forming the barrier layer; carried out using any of the following methods; Method 1: First, grow a barrier layer on the chip gate, and then mount the chip on an empty frame; Method 2: First, mount the chip on an empty frame, and then attach a barrier layer to the chip gate; The chip in question is a power device chip; Step 2: Install copper clips on the chip; Step 3: Remove the barrier layer; Step 4: Bonding and encapsulation.

[0007] The size of the barrier layer must be large enough to cover the area where the solder pads are bonded.

[0008] There are no detailed requirements for the thickness of the barrier layer. As long as the size can cover the solder pad bonding area and ensure that the solder pad bonding area is not contaminated when solder balls splatter; In Method 1, photoresist is used to grow the material through a coating, exposure, and development process.

[0009] In Method 2, the barrier layer uses an adhesive film with adhesion properties. It is installed using an adhesive method.

[0010] For the barrier layer formed during growth, the photoresist is removed by plasma ashing or wet photoresist removal.

[0011] Beneficial effects of the present invention The process of this invention uses a barrier layer to prevent solder pads from being contaminated. The steps are simple, effective, and easy to implement. This process is effective in preventing solder resist from contaminating solder pads and is suitable for widespread implementation. Attached Figure Description

[0012] Figure 1 : A schematic diagram (top view) of the chip structure after packaging using existing technology.

[0013] Figure 2 : A schematic diagram illustrating solder resist contamination of solder pads using existing processes; Figure 3 : Existing process flow diagram; Figure 4 : A schematic diagram of the process flow for Example 1; Figure 5 Example 2: Schematic diagram of the process flow.

[0014] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort. Detailed Implementation Example Example 1: As Figure 4 A packaging method for preventing flux contamination of solder pads includes the following steps: Step 1: Loading wafers and forming a barrier layer; First, a barrier layer is grown on the chip gate, and then the chip is mounted on an empty frame. Step 2: Install copper clips on the chip; The chip is a power device chip.

[0015] Step 3: Remove the barrier layer; Step 4: Bonding and encapsulation.

[0016] It is grown using photoresist through a coating, exposure, and development process. Example 2: Figure 4 A packaging method for preventing flux contamination of solder pads includes the following steps: Step 1: Loading wafers and forming a barrier layer; First, the chip is mounted on an empty frame, and then a barrier layer is attached to the chip gate. The barrier layer is made of an adhesive film with adhesive properties and is mounted by adhesive bonding.

[0017] Step 2: Install copper clips on the chip; The chip is a power device chip.

[0018] Step 3: Remove the barrier layer; Step 4: Bonding and encapsulation.

[0019] There are no detailed requirements for the thickness of the barrier layer. As long as the size can cover the solder pad bonding area and ensure that the solder pad bonding area is not contaminated when solder balls splatter, it is acceptable.

[0020] The definitions of the terms in the diagram are as follows: Soft solder: The frame is heated on the track, soft solder is applied to the frame → the chip is installed on the soft solder → the frame cools and fixes the chip. Dispensing: The track is not heated, silver paste is applied to the frame → the chip is installed on the silver paste → the frame undergoes silver paste curing treatment; Solder paste: No heating on the track, solder paste is applied / brushed onto the frame → chip is mounted on the solder paste → frame reflow soldering; Copper clip installation: The track is not heated. Apply soft solder / solder paste to the chip → install the copper clip on the chip → reflow soldering of the frame.

Claims

1. A packaging method for preventing flux contamination of solder pads, characterized in that, Includes the following steps: Step 1: Loading and forming the barrier layer; carried out using any of the following methods; Method 1: First, grow a barrier layer on the chip gate, and then mount the chip on an empty frame; Method 2: First, mount the chip on an empty frame, and then attach a barrier layer to the chip gate; The chip in question is a power device chip; Step 2: Install copper clips on the chip; Step 3: Remove the barrier layer; Step 4: Bonding and encapsulation.

2. The encapsulation method for preventing flux contamination of solder pads according to claim 1, characterized in that, The size of the barrier layer must be large enough to cover the area where the solder pads are bonded.

3. The encapsulation method for preventing flux contamination of solder pads according to claim 1, characterized in that, In Method 1, photoresist is used to grow the material through a coating, exposure, and development process.

4. The encapsulation method for preventing flux contamination of solder pads according to claim 1, characterized in that, The barrier layer in Method 2 uses an adhesive film with adhesion properties.

5. The encapsulation method for preventing flux contamination of solder pads according to claim 3, characterized in that, For the barrier layer formed during growth, the photoresist is removed by plasma ashing or wet photoresist removal.

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