Navigation computer board card compatible with large data volume storage

Abstract

The navigation computer board card comprises an information processing module (1), and the information processing module (1) is respectively connected with an antenna interface module (2), an inertial navigation interface module (3), a DDR module (4), a FLASH storage module (5), an EMMC storage module (6), a serial port updating module (7), a CAN bus updating module (8), a network port updating module (9), a USB downloading module (10), a clock module (11) and a power supply module (12). The information processing module (1) is a JFMQL20S all-programmable fusion chip and comprises four-core processors, and the processors carry out data communication through inter-core interruption and a shared memory. The system can be compatible with large-data-volume storage, and is small in size and low in power consumption; meanwhile, IO expansion interfaces are abundant, peripheral expansion is flexible, and upgrading and maintenance are convenient.

Description

Technical Field

[0001] The utility model relates to a computer board, in particular to a navigation computer board compatible with large data volume storage. Background Art

[0002] The inertial navigation system is a system that uses gyroscopes and accelerometers to measure the acceleration and angular velocity of the carrier and calculate its speed, position and attitude in real time. In the inertial navigation system, the navigation computer board is a key component of the inertial navigation system. The basic work content of the navigation computer board is reflected in three aspects, namely acquisition, calculation and communication. The navigation computer board first collects the data output by the gyroscope and accelerometer through the serial port, receives the positioning and timing information output by the satellite antenna through the TTL interface, and then uses the navigation information of the previous moment to calculate the navigation information of the current moment, including attitude, speed, and position, and finally outputs the processed data to the storage module.

[0003] However, most traditional navigation computer boards use ARM+DSP+FPGA, dual DSP+FPGA, SOC, SOPC and other architectures, which are not only large in size and high in power consumption, but also have few IO interfaces, inflexible peripherals, and inconvenient for later upgrades and maintenance. Therefore, it is urgent to develop a new navigation computer board to solve the above problems. Utility Model Content

[0004] The purpose of the utility model is to provide a navigation computer board compatible with large data storage. The utility model is not only compatible with large data storage, but also small in size and low in power consumption; at the same time, it has rich IO expansion interfaces, flexible peripheral expansion, and is convenient for upgrading and maintenance.

[0005] The technical solution of the utility model: a navigation computer board compatible with large data volume storage, comprising an information processing module, the information processing module is respectively connected with an antenna interface module, an inertial navigation interface module, a DDR module, a FLASH storage module, an EMMC storage module, a serial port update module, a CAN bus update module, a network port update module, a USB download module, a clock module and a power supply module; the information processing module is a JFMQL20S fully programmable fusion chip, comprising a quad-core processor, and data communication is performed between each processor through inter-core interrupts and shared memory.

[0006] In the aforementioned navigation computer board compatible with large data storage, the information processing module includes a zero-core processor, a one-core processor, a two-core processor and a three-core processor; the zero-core processor and the one-core processor constitute a dual-system processing unit, and the two-core processor and the three-core processor constitute a dual logic unit.

[0007] In the aforementioned navigation computer board compatible with large data storage, the zero-core processor communicates with the one-core processor, the two-core processor and the three-core processor respectively; the two-core processor communicates with the three-core processor.

[0008] In the aforementioned navigation computer board compatible with large data storage, the zero-core processor is respectively connected to the EMMC storage module, the FLASH storage module, the serial port update module, the CAN bus update module, the network port update module and the USB download module.

[0009] In the aforementioned navigation computer board compatible with large data storage, two core processors are respectively connected to the antenna interface module and the inertial navigation interface module.

[0010] In the aforementioned navigation computer board compatible with large data storage, the antenna interface module is an isolation chip; the input end of the antenna interface module is connected to the output end of the GNSS satellite antenna, and the output end of the antenna interface module is connected to the input end of the information processing module.

[0011] In the aforementioned navigation computer board compatible with large data storage, the inertial navigation interface module is an isolation chip; the input end of the inertial navigation interface module is connected to the output end of the inertial measurement unit, and the output end of the inertial navigation interface module is connected to the input end of the information processing module.

[0012] Compared with the prior art, the utility model is composed of an information processing module, an antenna interface module, an inertial navigation interface module, a DDR module, a FLASH storage module, an EMMC storage module, a serial port update module, a CAN bus update module, a network port update module, a USB download module, a clock module and a power supply module, and has the advantages of strong processing capability, small size, low power consumption, rich IO interfaces and flexible peripheral expansion. At the same time, the information processing module of the present application adopts the JFMQL20S fully programmable fusion chip, which is provided with a quad-core processor. The dual system + dual logic design architecture separates the navigation data preprocessing, algorithm calculation and data storage functions, and each processor core communicates data through inter-core interrupts and shared memory, so that each functional module is independent of each other but closely connected, and the modules are divided according to the function, so that the functions of each part are clearer and more convenient for later upgrades and maintenance.

[0013] The utility model provides three methods of updating the program of the information processing module and reading and writing the data of the EMMC storage chip through the mutual cooperation between the serial port update module, the CAN bus update module and the network port update module. The three methods improve the flexibility and stability of updating the navigation computer board program.

[0014] In summary, the utility model is not only compatible with large data volume storage, but also has a small size and low power consumption; at the same time, it has rich IO expansion interfaces, flexible peripheral expansion, and is convenient for upgrading and maintenance. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic diagram of the system composition of the utility model;

[0016] Figure 2 This is a schematic diagram of the internal resource distribution of the navigation computer board in Example 2.

[0017] The markings in the accompanying drawings are: 1-information processing module, 2-antenna interface module, 3-inertial navigation interface module, 4-DDR module, 5-FLASH storage module, 6-EMMC storage module, 7-serial port update module, 8-CAN bus update module, 9-network port update module, 10-USB download module, 11-clock module, 12-power module. DETAILED DESCRIPTION

[0018] The present invention is further described below in conjunction with the accompanying drawings and embodiments, but they are not intended to limit the present invention.

[0019] Embodiment 1. A navigation computer board compatible with large data storage, comprising: Figure 1 As shown, the navigation system includes a GNSS satellite antenna, an inertial measurement unit and a navigation computer board of the present application, and the navigation computer board includes an information processing module 1, an antenna interface module 2, an inertial navigation interface module 3, a DDR module 4, a FLASH storage module 5, an EMMC storage module 6, a serial port update module 7, a CAN bus update module 8, a network port update module 9, a USB download module 10, a clock module 11 and a power module 12;

[0020] The information processing module adopts the domestically produced JFMQL20S fully programmable fusion chip, which includes a quad-core processor processing system and programmable logic; including a quad-core processor, and data communication between each processor is carried out through inter-core interrupts and shared memory.

[0021] Specifically, the information processing module includes a zero-core processor, a one-core processor, a two-core processor and a three-core processor; the zero-core processor and the one-core processor constitute a dual-system processing unit, and the two-core processor and the three-core processor constitute a dual logic unit.

[0022] The zero-core processor communicates with the one-core processor, the two-core processor and the three-core processor respectively; the two-core processor communicates with the three-core processor.

[0023] The antenna interface module is an isolation chip, the input end of the antenna interface module is connected to the output end of the GNSS satellite antenna, and the output end of the antenna interface module is connected to the input end of the information processing module, and is used to obtain the positioning timing attitude information of the GNSS satellite antenna and input it into the information processing module.

[0024] The inertial navigation interface module is an isolation chip, the input end of the inertial navigation interface module is connected to the output end of the inertial measurement unit, and the output end of the inertial navigation interface module is connected to the input end of the information processing module, so as to obtain the load motion information of the inertial measurement unit and input it into the information processing module;

[0025] The DDR module is a memory, which is a volatile memory, and the DDR module is connected to the information processing module;

[0026] The FLASH storage module is a flash memory, which belongs to a non-volatile memory, and the FLASH storage module is connected to the information processing module;

[0027] The EMMC storage module is a flash memory, which belongs to a non-volatile memory, and the EMMC storage module is connected to the information processing module;

[0028] The serial port update module is a RS422, RS485, RS232 transceiver chip, and the serial port update module is connected to the information processing module;

[0029] The CAN bus update module is a CAN controller chip, and the CAN bus update module is connected to the information processing module;

[0030] The network port update module is an Ethernet transceiver chip, and the network port update module is connected to the information processing module;

[0031] The USB download module is a USB transceiver chip, and the USB download module is connected to the information processing module.

[0032] The antenna interface module input end receives the GNSS data signal and the GNSS second pulse signal output by the GNSS satellite antenna.

[0033] The input end of the inertial navigation interface module receives the inertial navigation data signal and the inertial navigation synchronization pulse signal output by the inertial measurement unit.

[0034] The DDR module caches the functional programs of the information processing module to ensure the normal operation of the system.

[0035] The FLASH storage module stores the BOOT file and the FSBL file of the quad-core processor core on the information processing module.

[0036] The EMMC storage module stores system files, software applications, hardware BIT stream files, received external data and intermediate processing data of the information processing module;

[0037] The serial port update module performs program upgrade on the information processing module, and the serial port update module reads and writes data in the EMMC storage module through the information processing module.

[0038] The CAN bus update module performs a program upgrade on the information processing module, and the CAN bus update module reads and writes data in the EMMC storage module through the information processing module;

[0039] The network port update module performs program upgrade on the information processing module, and the network port update module reads and writes data in the EMMC storage module through the information processing module.

[0040] The USB download module reads the storage data in the EMMC storage module through the information processing module.

[0041] The clock module is connected to the information processing module, and the clock module provides a clock signal for the information processing module.

[0042] The power supply module is connected to the information processing module, and the power supply module supplies power to the navigation computer board.

[0043] Embodiment 2. A navigation computer board compatible with large data storage, comprising: Figure 2 As shown, it includes a quad-core processor processing module, a serial communication module, a GPIO module, a CAN communication module, a network communication module, a DDR module, a FLASH module, an EMMC module, a serial update module, a CAN update module, a network update module, a USB download module, a JTAG module, a clock module and a power module (such as Figure 2 shown):

[0044] The serial communication module is an isolation chip. The input end of the serial communication module is respectively connected to the output end of the GNSS satellite signal and the output end of the inertial measurement unit, and is used to collect GNSS data output by the GNSS satellite signal and inertial navigation data output by the inertial measurement unit; the output end of the serial communication module is connected to the input end of the information processing module, and is used to transmit the GNSS satellite signal positioning timing attitude information and the inertial measurement unit payload motion information to the information processing module.

[0045] The GPIO module is an isolation chip. The input end of the GPIO module is respectively connected to the output end of the GNSS satellite signal and the output end of the inertial measurement unit, and is used to collect the GNSS second pulse output by the GNSS satellite signal and the inertial navigation synchronization pulse output by the inertial measurement unit; the output end of the GPIO module is connected to the input end of the information processing module, and is used to transmit the collected pulse information to the information processing module.

[0046] The CAN communication module is a CAN controller chip, which is connected to the information processing module and is used for data transmission and reception communication.

[0047] The network port communication module is an Ethernet transceiver chip, which is connected to the information processing module and is used for data transmission and reception communication.

[0048] The DDR module is a memory. The DDR module is connected to the information processing module to cache the functional programs of the information processing module to ensure the normal operation of the system.

[0049] The FLASH module is a flash memory, which is connected to the information processing module and stores the BOOT file and FSBL file of the quad-core processor core on the information processing module.

[0050] The EMMC module is a flash memory, which is connected to the information processing module to store system files, software applications, hardware BIT stream files, receive external data and intermediate processing data of the information processing module.

[0051] The serial port update module is an RS232 transceiver chip. The serial port update module is connected to the information processing module to upgrade the program of the information processing module and read and write data in the EMMC storage module through the information processing module.

[0052] The CAN update module is a CAN controller chip. The CAN update module is connected to the information processing module, performs program upgrades on the information processing module, and reads and writes data in the EMMC storage module through the information processing module.

[0053] The network port update module is an Ethernet transceiver chip. The network port update module is connected to the information processing module, performs program upgrades on the information processing module, and reads and writes data in the EMMC storage module through the information processing module.

[0054] The USB download module is a USB transceiver chip, which is connected to the information processing module and reads the storage data in the EMMC storage module through the information processing module.

[0055] The JTAG module is connected to the information processing module and is used for program function debugging and firmware burning.

[0056] The clock module is connected to the information processing module and provides a clock signal for the information processing module.

[0057] The power module is connected to the information processing module to supply power to the navigation computer board.

[0058] Specifically, the information processing module of the navigation computer board is the domestically produced JFMQL20S fully programmable fusion chip, which integrates a processing system based on a feature-rich quad-core processor and programmable logic on a single chip, including on-chip memory, external memory, and a rich set of IO peripherals. The JFMQL20S fully programmable fusion chip not only provides the flexibility and scalability of FPGA, but also provides the performance, power consumption, and ease of use associated with application-specific integrated circuits (ASICs) and application-specific standard products (ASSPs), greatly improving system performance and IO bandwidth, while also reducing chip area and power consumption.

[0059] The serial communication module is the MAX3490 chip of ADI Company, which has full-duplex communication function and supports a maximum transmission rate of 10Mbps. It is a 3.3V, low-power transceiver suitable for RS422 communication. The MAX3490 chip connects the GNSS satellite signal and the inertial measurement unit to the information processing module respectively, ensuring that the data output by the GNSS satellite signal and the data output by the inertial measurement unit are stably and reliably transmitted to the information processing module, so that the information processing module can correctly collect the input data for solution processing.

[0060] The GPIO module is TI's ISO7221A digital isolator, which supports a maximum transmission rate of 150Mbps, uses a 3.3V or 5V power supply, has 4kV electrostatic discharge (ESD) protection, and has an operating temperature range of -40°C to +125°C. The second pulse output of the GNSS satellite signal and the synchronization pulse output by the inertial measurement unit are converted to a level through the ISO7221A digital isolator, and are isolated from the information processing module, ensuring that each module is independent and avoids interference.

[0061] The DDR module is a MICRON MT41K256M16 chip, and the memory capacity of a single chip is 512MB. The utility model uses two MT41K256M16 chips cascaded to form a 1GB capacity, with a larger memory, caching the functional program of the information processing module to ensure stable operation of the system.

[0062] The FLASH module is a Winbond W25Q128FV chip, which consists of 65536 programmable pages, each page is 256 bytes, the total capacity is 128Mb, and the maximum transmission rate supports 416MHz. The FLASH module stores the BOOT file and FSBL file of the quad-core processor core on the information processing module to complete the initial configuration boot when the navigation computer board starts.

[0063] The EMMC module is a SAMSUNG KLM8G1GEME-B041 chip, which consists of a NAND flash memory and an MMC controller, with a capacity of 8GB, a clock frequency of up to 200MHz, and can be easily connected to any processor with an MMC controller. The EMMC module stores the system files, software applications, hardware BIT stream files, received external data, and intermediate processing data of the information processing module.

[0064] The serial port update module is ADI's MAX3490 chip and MAX3232ESE chip. The former is an RS422 / RS485 chip and the latter is an RS232 chip, which can support serial port updates and communication requirements in multiple levels such as RS422 / RS485 / RS232. The serial port update software can easily upgrade the information processing module and read and write data in the EMMC storage module through the level conversion chip.

[0065] The CAN update module is a TI SN65HVD23x 3.3V CAN bus transceiver, powered by a single 3.3V power supply, with high input impedance, allowing up to 120 nodes to be connected on one bus, with a transmission rate of up to 1Mbps. The CAN update software uses the SN65HVD23x 3.3V CAN bus transceiver to upgrade the information processing module and read and write data in the EMMC storage module.

[0066] The network port update module is the YT8531 chip of Yutai Micro, which is a highly integrated Ethernet transceiver that supports transmission rates of 10Mbps, 100Mbps, and 1000Mbps. The network port update software uses the YT8531 Ethernet transceiver to upgrade the information processing module and read and write data in the EMMC storage module.

[0067] The USB download module is a MICROCHIP USB3320 chip, which is a highly integrated full-featured high-speed USB2.0 ULPI transceiver with 1.8V to 3.3V IO voltage and a reference clock frequency of 12, 13, 19.2, 24, 26, 27, 38.4, 52 or 60MHz. The USB download module reads the storage data in the EMMC storage module through the information processing module.

[0068] The JFMQL20S fully programmable fusion chip is used as an information processing module, which integrates the processing system and programmable logic of a quad-core processor. The programmable logic collects the positioning timing attitude data output by the GNSS satellite antenna and the load motion data output by the inertial measurement unit. Each time a packet of data is collected, an interrupt signal is generated and transmitted to the processor. After the processor receives the interrupt signal, it reads the received data cached by the programmable logic according to the interrupt ID. The navigation computer board of the utility model designs the four cores of the processor part as a dual system + dual logic architecture, with core 0 and core 1 as the system, and core 2 and core 3 as logic. Core 0 and core 1 are scheduled through the Linux system, and the startup of core 2 and core 3 is managed at the same time; core 0 is mainly responsible for the data storage and program update functions of the information processing module, and the system files, software applications, hardware BIT stream files, external data and intermediate processing data of the information processing module are stored through EMMC; in actual working scenarios, the software program may be frequently modified, and the program update is mainly to update the program of the logic core. Core 1 is reserved in the utility model and can be expanded and used according to needs. Core 2 is responsible for receiving external input data collected by programmable logic, then preprocessing and parsing the navigation data, and accurately synchronizing other interface information based on the accurate time and pulse signal of GNSS, so that each set of data has an accurate time information tag. Core 3 is responsible for navigation solution processing of the data processed by core 2, including low-frequency 1-10Hz combined navigation filtering and high-frequency 200-1000Hz inertial navigation update; then the data processed by the algorithm is transmitted to core 1 for storage. The four cores communicate and transmit data through inter-core interrupts and shared memory.

[0069] The JFMQL20S fully programmable fusion chip is used as an information processing module. The distribution of core resources is described as follows: Core 0 is the main core of the system, and its main resources include EMMC module, FLASH module, USB download module, network port download module, CAN update module 0, and serial port update module 0; Core 1 is a supplement to Core 0, and mainly performs resource scheduling through the Linux system; Core 2 is the interface function core, and its main function is to receive and process external data. Its main resources include 8 serial port communication modules, 6 GPIO interface modules, 1 CAN communication module 1, and a reserved network port communication module 1; Core 2 is the algorithm core, responsible for complex navigation solutions for the system. The clock module, power module, JTAG module, and DDR module are shared resources of the four cores.

[0070] The effects of the present invention are described as follows in combination with the structure and working principle of the present invention:

[0071] The navigation computer board of the utility model is connected to the GNSS satellite signal, the inertial measurement unit and the external sensor respectively, collects the time information, speed, position information output by the GNSS satellite signal and the load motion data output by the inertial measurement unit, then pre-processes the data and solves the navigation algorithm, and finally outputs the data processed by the information processing module through the serial port, CAN bus or network port, and can also be stored through the EMMC so that the data can be analyzed by the data analysis software afterwards.

Claims

1. A navigation computer board compatible with large data storage, characterized in that: The invention comprises an information processing module (1), wherein the information processing module (1) is respectively connected to an antenna interface module (2), an inertial navigation interface module (3), a DDR module (4), a FLASH storage module (5), an EMMC storage module (6), a serial port update module (7), a CAN bus update module (8), a network port update module (9), a USB download module (10), a clock module (11) and a power supply module (12); the information processing module (1) is a JFMQL20S fully programmable fusion chip, comprising a quad-core processor, and data communication is performed between the processors via inter-core interrupts and shared memory.

2. A navigation computer board compatible with large data storage according to claim 1, characterized in that: The information processing module (1) comprises a zero-core processor, a one-core processor, a two-core processor and a three-core processor; the zero-core processor and the one-core processor constitute a dual-system processing unit, and the two-core processor and the three-core processor constitute a dual logic unit.

3. A navigation computer board compatible with large data storage according to claim 2, characterized in that: The zero-core processor communicates with the one-core processor, the two-core processor and the three-core processor respectively; the two-core processor communicates with the three-core processor.

4. The navigation computer board compatible with large data storage according to claim 2, characterized in that: The zero-core processor is respectively connected with the EMMC storage module, the FLASH storage module, the serial port update module, the CAN bus update module, the network port update module and the USB download module.

5. The navigation computer board compatible with large data storage according to claim 2, characterized in that: The two core processors are respectively connected to the antenna interface module and the inertial navigation interface module.

6. The navigation computer board compatible with large data storage according to claim 1, characterized in that: The antenna interface module (2) is an isolation chip; the input end of the antenna interface module (2) is connected to the output end of the GNSS satellite antenna, and the output end of the antenna interface module is connected to the input end of the information processing module.

7. The navigation computer board compatible with large data storage according to claim 1, characterized in that: The inertial navigation interface module (3) is an isolation chip; the input end of the inertial navigation interface module (3) is connected to the output end of the inertial measurement unit, and the output end of the inertial navigation interface module (3) is connected to the input end of the information processing module (1).

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