Novel three-dimensional integrated circuit heat dissipation mechanism
By designing a micro-channel heat dissipation mechanism through the chip in a three-dimensional integrated circuit and using coolant for internal cooling, the problem of separation of cooling functions and other functions in the existing technology is solved, efficient heat dissipation and high integration are achieved, and the chip is improved running speed and performance.
Patent Information
- Application Number
- CN202420754775.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-04-12
- Publication Date
- 2024-12-20
- Estimated Expiration
- 2034-04-12
AI Technical Summary
The cooling function of the existing three-dimensional integrated circuit has separation of cooling functions from other functions, resulting in low cooling efficiency and increased chip temperature, affecting computing performance and safety, and increasing the actual area of the chip, which violates the design concept of high integration.
A heat dissipation mechanism through the third microchannel through the chip is designed, and a hollow pipe is formed by using the combination of the first and second microchannels and the third microchannels to fill the coolant inside the chip to achieve uniform cooling, and the The heat dissipation function is integrated with other functions of the integrated circuit.
It significantly improves the heat dissipation efficiency of the chip, reduces the internal temperature gradient, improves computing performance and safety, and reduces the volume of the external cooling device, improving integration and production efficiency.
Smart Images

Figure CN222214169U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of three-dimensional integrated circuits, in particular to a novel three-dimensional integrated circuit heat dissipation mechanism. Background Art
[0002] With the development of the integrated circuit industry, people's requirements for chip computing efficiency have been greatly improved. Three-dimensional integrated circuits came into being, stacking multiple layers of integrated circuits together to integrate various components into a single multi-layer chip. This approach reduces the interconnection length between integrated circuits, and has better working performance and higher system integration than two-dimensional integrated circuits, but it also increases the heat generation power of electronic equipment, so heat dissipation design is one of the most important aspects of three-dimensional integrated circuit design.
[0003] At present, the heat dissipation design of integrated circuits mostly adopts air cooling or liquid cooling, which will bring the following problems: 1. The cooling function and other functions of the circuit are not integrated together, and the additional heat dissipation equipment increases the actual required area of the chip, which is contrary to the current concept of improving circuit integration; 2. The cooling efficiency is low, mainly because the current heat dissipation method can only be carried out on the surface of the chip, and the effective contact area for heat dissipation is small, which leads to an increase in the overall temperature of the chip and an increase in the internal temperature gradient, affecting the chip's computing performance, safety performance and life. Therefore, the performance of three-dimensional integrated circuits is limited by the current heat dissipation capacity, and an efficient three-dimensional integrated circuit heat dissipation device is needed to solve the above problems. Utility Model Content
[0004] In view of the problems existing in the prior art, the utility model provides a heat dissipation mechanism for a three-dimensional integrated circuit. By setting a third microchannel that runs through the chip, the heat is dissipated inside the chip, which is different from the general natural heat dissipation on the surface, thereby greatly improving the heat dissipation efficiency of the chip, so that the three-dimensional integrated circuit can accommodate a CPU with faster running speed and better performance.
[0005] The technical solution of the utility model is: a novel three-dimensional integrated circuit heat dissipation mechanism, including a heat sink, a U-shaped heat dissipation groove, a plurality of first microchannels, a plurality of second microchannels and a plurality of third microchannels;
[0006] The heat sink is connected above the chip body;
[0007] The U-shaped heat dissipation groove is connected above the heat sink;
[0008] The plurality of first microchannels are etched on the lower surface of the U-shaped heat dissipation groove;
[0009] The plurality of second microchannels are etched on the upper surface of the bottom plate connected below the chip body;
[0010] The plurality of third microchannels are located inside the chip body and the heat sink, and the plurality of third microchannels are connected to the first microchannel at their upper ends and to the second microchannel at their lower ends.
[0011] Furthermore, the plurality of first microchannels are arranged side by side, the plurality of second microchannels are also arranged side by side, and there is a second microchannel corresponding to each first microchannel; the two first microchannels and second microchannels facing each other are connected by a plurality of third microchannels arranged in parallel.
[0012] Furthermore, the chip body includes several layers of structural modules repeatedly stacked in height, the top layer of the repeatedly stacked structural modules is connected to the heat sink through the second heat conductive layer, and the bottom layer of the repeatedly stacked structural modules is connected to the base plate through the second heat conductive layer.
[0013] Further, the structural module includes a wafer layer, a device layer and a first heat-conducting layer which are fixedly connected in sequence from bottom to top;
[0014] The device layer contains regularly distributed CPUs 9;
[0015] The first heat-conducting layer contains regularly distributed micro solder balls, and the space around the micro solder balls is filled with thermal lubricant.
[0016] Furthermore, the wafer layer is a silicon plate.
[0017] Furthermore, the second heat-conducting layer contains regularly distributed C4 solder balls, and the space around the C4 solder balls is filled with thermal lubrication.
[0018] Compared with the prior art, the heat dissipation device through the chip microchannel set in the utility model can achieve the following: 1. By burying the liquid cooling channel inside the chip stack, the heat dissipation capacity of the coolant is improved, avoiding the circuit from generating too much heat during operation and causing the circuit to burn, which can improve the safety of the integrated circuit; 2. By evenly setting the microchannels inside the chip, the inside of the chip is evenly cooled, so that the temperature field gradient inside the chip is reduced, avoiding the damage of chip deformation and solder joint detachment caused by uneven thermal stress, and improving the stability of the chip mechanical structure; 3. By integrating the heat dissipation function with other functions of the integrated circuit, the volume of the chip external cooling device is reduced, and the chip integration can be improved. The utility model can solve the heat dissipation problem of three-dimensional integrated circuits, meet the requirements of efficient heat dissipation of modern chips, make higher density circuit integration possible, and greatly improve production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 is a schematic diagram of the structure of the microchannel that runs through the chip;
[0020] Figure 2It is a cross-sectional view of the three-dimensional integrated circuit of the utility model;
[0021] Figure 3 It is an enlarged schematic diagram of a three-dimensional integrated circuit chip.
[0022] Numbers in the figure: 1. Cooling liquid; 2. First microchannel etched on the lower surface of the U-shaped heat sink; 3. Second microchannel etched on the upper surface of the base plate; 4. Third microchannel passing through the chip; 5. Three-dimensional integrated chip body; 6. U-shaped heat sink; 7. Heat sink; 8. Base plate; 9. CPU; 10. Device layer; 11. Micro solder balls; 12. C4 solder balls; 13. Thermal lubrication; 14. First thermal conductive layer containing micro solder balls; 15. Second thermal conductive layer containing C4 solder balls; 16. Wafer. DETAILED DESCRIPTION
[0023] The utility model is further described below in conjunction with the accompanying drawings.
[0024] like Figure 1 As shown, the utility model provides a heat dissipation mechanism for a three-dimensional integrated circuit: comprising a chip body 5, a first microchannel 2, a second microchannel 3 and a third microchannel 4 passing through the chip; the first microchannel 2, the second microchannel 3 and the third microchannel 4 passing through the chip are hollow pipes filled with a coolant 1.
[0025] like Figure 2 As shown, the chip body 5 of the present invention is connected to a heat sink 7 at the top and to a base plate 8 at the bottom.
[0026] The upper side of the heat sink 7 is connected to the U-shaped heat sink 6 .
[0027] The first microchannel 2 is etched on the lower surface of the U-shaped heat dissipation groove, and the second microchannel 3 is etched on the upper surface of the bottom plate.
[0028] The third microchannel 4 passing through the chip is located inside the chip body 5 and the heat sink 7 , with its upper end connected to the first microchannel 2 and its lower end connected to the second microchannel 3 .
[0029] like Figure 3 As shown, the internal structure of the chip body mainly includes: a device layer 10, a wafer layer 16, a first heat-conducting layer 14 containing micro solder balls, and a second heat-conducting layer 15 containing C4 solder balls. From bottom to top, the wafer layer 16, the device layer 10 and the first heat-conducting layer 14 are fixedly connected in sequence to form a repeating structure of the integrated chip, and the repeating structure can be stacked in height. The top layer of the repeating structure is connected to the heat sink 7 through the second heat-conducting layer 15, and the bottom layer is connected to the bottom plate 8 through the second heat-conducting layer 15.
[0030] The device layer 10 contains regularly distributed CPUs 9, which generate heat with a fixed thermal power.
[0031] The first heat-conducting layer 14 contains regularly distributed micro solder balls 11 , and the space around the micro solder balls is filled with thermal lubricant 13 .
[0032] The second heat-conducting layer 15 contains regularly distributed C4 solder balls 12 , and the space around the solder balls is filled with thermal lubricant 13 .
[0033] like Figure 3 As shown, the heat transfer part inside the chip is mainly composed of micro solder balls 11, C4 solder balls 12 and thermal lubrication 13. Each wafer 16 is a silicon plate, and the device layer 10 integrated thereon includes a CPU 9, which generates heat during operation. The micro solder balls 11 with good thermal conductivity are evenly distributed between the layers, and heat is conducted along the height direction. The heat is transferred out through the C4 solder balls 12 and reaches the heat sink 7 and the base plate 8.
[0034] Specifically, in the heat dissipation mechanism of the three-dimensional integrated circuit of the utility model, the CPU 9 will generate heat when working. The heat dissipation part is mainly composed of the first microchannel 2 and the second microchannel 3, the U-shaped heat dissipation groove 6 and the heat sink 7. Among them, the first microchannel 2 is etched on the lower surface of the U-shaped heat dissipation groove, and the second microchannel 3 is etched on the upper surface of the bottom plate. The third microchannel 4 passes through the chip body 5 and the heat sink 7 from bottom to top, connecting the first microchannel 2 and the second microchannel 3. The low-temperature coolant 1 enters the second microchannel 3 from bottom to top, then flows through the third microchannel 4, and then flows into the first microchannel 2, taking away heat in the process. Finally, the high-temperature fluid flows out from the outlet of the first microchannel 2, which can force convection heat dissipation inside the three-dimensional integrated circuit. The micro solder balls 11 with good thermal conductivity are evenly distributed between the layers, and heat conduction is carried out in the height direction. The heat is transmitted through the C4 solder balls 12, reaching the heat sink 7, the U-shaped heat dissipation groove 6 and the bottom plate 8, and natural convection heat dissipation is carried out on the U-shaped surface of the U-shaped heat dissipation groove 6 and the lower surface of the bottom plate 8.
[0035] In this embodiment, a heat dissipation mechanism of a three-dimensional integrated circuit is provided, which dissipates heat inside the chip by setting a microchannel that penetrates the chip, which is different from the general natural heat dissipation on the surface, greatly improving the heat dissipation efficiency of the chip, so that the three-dimensional integrated circuit can accommodate a CPU with faster running speed and better performance.
[0036] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention.
Claims
1. A novel three-dimensional integrated circuit heat dissipation mechanism, characterized in that: It includes a heat sink, a U-shaped heat sink, a plurality of first microchannels, a plurality of second microchannels and a plurality of third microchannels; The heat sink is connected above the chip body; The U-shaped heat dissipation groove is connected above the heat sink; The plurality of first microchannels are etched on the lower surface of the U-shaped heat dissipation groove; The plurality of second microchannels are etched on the upper surface of the bottom plate connected below the chip body; The plurality of third microchannels are located inside the chip body and the heat sink, and the plurality of third microchannels are connected to the first microchannel at their upper ends and to the second microchannel at their lower ends.
2. A novel three-dimensional integrated circuit heat dissipation mechanism according to claim 1, characterized in that: The plurality of first microchannels are arranged side by side, the plurality of second microchannels are also arranged side by side, and a second microchannel corresponds to a lower portion of each first microchannel; two first microchannels and second microchannels facing each other are connected by a plurality of third microchannels arranged side by side.
3. The novel three-dimensional integrated circuit heat dissipation mechanism according to claim 1, characterized in that: The chip body comprises several layers of structural modules repeatedly stacked in height, the uppermost layer of the repeatedly stacked structural modules is connected to the heat sink via the second heat conducting layer, and the lowermost layer of the repeatedly stacked structural modules is connected to the base plate via the second heat conducting layer.
4. The novel three-dimensional integrated circuit heat dissipation mechanism according to claim 3, characterized in that: The structural module comprises a wafer layer, a device layer and a first heat-conducting layer which are fixedly connected in sequence from bottom to top; The device layer contains regularly distributed CPUs 9; The first heat-conducting layer contains regularly distributed micro solder balls, and the space around the micro solder balls is filled with thermal lubricant.
5. The novel three-dimensional integrated circuit heat dissipation mechanism according to claim 4, characterized in that: The wafer layer is a silicon plate.
6. The novel three-dimensional integrated circuit heat dissipation mechanism according to claim 3, characterized in that: The second heat-conducting layer contains regularly distributed C4 solder balls, and the space around the C4 solder balls is filled with thermal lubricant.
