Carrying jig for pressure measurement of semiconductor chip

Abstract

The utility model relates to a carrying jig for pressure measurement of a semiconductor chip. The carrying jig comprises a substrate, a material placing part and a limiting part, the substrate is provided with a plurality of connecting grooves, and the connecting grooves are communicated through the test grooves. A first fastening screw detachably fixes the material placing piece in the connecting groove through the first through hole and the first connecting hole; the limiting piece is vertically connected to the base plate. The utility model has the advantages that: (1) the material placing part and the base plate are arranged in a split manner, and when the material placing part is replaced, only the target material placing part needs to be independently disassembled and assembled, and the whole base plate does not need to be replaced, so that the maintenance efficiency is improved, and the cost is reduced; the limiting piece plays a role in protecting the substrate, especially the product to be tested, so that the substrate or the product is prevented from being crushed in the pressure testing process, the service life of the substrate is prolonged, and the damage rate of the product is also reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of semiconductor chip testing, in particular to a carrier jig for pressure testing of semiconductor chips. Background Art

[0002] When semiconductor chips are tested for performance through pressure testing, they need to be placed one by one in the various loading cavities of the carrier plate, and the semiconductor chips are transferred in batches to the test equipment through the carrier plate. After long-term loading on the carrier plate, the antistatic coating on the surface of the loading cavity is prone to wear, affecting the loading of semiconductor chips and the accuracy of test results. Regular replacement of the entire carrier plate causes unnecessary waste. In addition, products with special performance, such as high-temperature products, need to meet special testing requirements. In order to avoid affecting the test results, a carrier plate made of special materials needs to be specially customized to match, which also affects the test efficiency and test costs. Utility Model Content

[0003] The utility model aims to provide a transport fixture for pressure testing of semiconductor chips, which can quickly replace material placement parts and improve the applicability of the transport fixture to the semiconductor chips being tested.

[0004] In order to achieve the above-mentioned utility model object, the utility model provides a carrier jig for semiconductor chip pressure testing, including a substrate, a material placement member, and a limit member;

[0005] The substrate is provided with a plurality of connection slots, the substrate is provided with a plurality of test slots, and the connection slots are connected through the test slots; a first through hole is provided in the connection slot;

[0006] The material placement piece is provided with a material placement groove, and a first connecting hole is provided in the material placement groove; the sides of the material placement piece are provided with through grooves, and the through grooves are connected with the test groove; a first fastening screw is detachably fixed to the material placement piece in the connecting groove through the first through hole and the first connecting hole;

[0007] The limiting member is vertically connected to the base plate.

[0008] Preferably, the material placement component is an anti-static material placement component.

[0009] As a further improvement of the utility model, the four corners of the material placing trough are provided with yielding grooves.

[0010] As a further improvement of the utility model, a limiting tip is vertically provided on the top of the limiting member.

[0011] As a further improvement of the utility model, the limiting members are provided at two corner positions of each of the connecting grooves.

[0012] Furthermore, a second connecting hole is provided at the bottom of the limiting member, a second through hole is provided at the base plate, and a second fastening screw is passed through the second through hole and the second connecting hole to detachably fix the limiting member on the base plate.

[0013] The utility model discloses a transport jig for semiconductor chip stress testing, in which the semiconductor chip to be tested is stuck in a material placement slot and is transported through a substrate; the material placement piece is detachably fixed on the substrate, and the substrate carries multiple products at the same time and is placed in the stress testing device for testing; each material placement piece is separate from the substrate, and according to different test requirements of different categories of semiconductor chips, especially for the test of semiconductor chips with special performance, material placement pieces with different material properties can be quickly replaced in order not to affect the test results, thereby improving the applicability of the transported product; wherein, the limit piece can protect the substrate and the product during the test.

[0014] Compared with the prior art, the semiconductor chip pressure test carrier has the following advantages:

[0015] (1) The material placement parts and the substrate are separately set. When replacing the material placement parts, only the target material placement parts need to be disassembled and installed separately, without replacing the entire substrate, which improves maintenance efficiency and reduces costs;

[0016] (2) The limiter protects the substrate, especially the product to be tested, to prevent the substrate or product from being crushed during the pressure test, thereby increasing the life of the substrate and reducing the product damage rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 This is a schematic diagram of the structure of a semiconductor chip pressure test carrier jig of the utility model;

[0018] Figure 2 It is a schematic diagram of the material placement structure;

[0019] Figure 3 is a schematic diagram of the substrate structure;

[0020] Figure 4 It is a schematic diagram of the limiter structure;

[0021] Figure 5 It is a schematic diagram of the connection between the substrate and the material placement component 2. DETAILED DESCRIPTION

[0022] The specific implementation of the utility model is further described in detail below with reference to the accompanying drawings.

[0023] like Figure 1 As shown, the semiconductor chip pressure test carrier of the utility model includes a substrate 1, a material placement member 2, and a stopper 3;

[0024] like Figure 3As shown, the substrate 1 is provided with a plurality of connection slots 12, and the substrate 1 is provided with a plurality of test slots 11, and each connection slot 12 is connected through the test slot 11; a first through hole 13 is provided in the connection slot 12;

[0025] like Figure 2 As shown, the material placement member 2 is provided with a material placement slot 21, and a first connecting hole 211 is provided in the material placement slot 21; the side edges of the material placement member 2 are provided with through slots 22, and the through slots 22 are connected to the test slot 11; Figure 5 As shown, the first fastening screw 24 detachably fixes the material placement member 2 in the connecting groove 12 through the first through hole 13 and the first connecting hole 211;

[0026] The material placement component 2 is preferably an anti-static material placement component, which further improves the accuracy of the test results of the semiconductor chip in the material placement component 2 during pressure testing.

[0027] The material placement piece 2 can be quickly disassembled and quickly assembled on the substrate 1 through the first fastening screw 24, so that each material placement piece 2 on the substrate 1 is independent of each other. When the surface of the material placement piece 2 is worn, the worn material placement piece 2 can be replaced independently. And according to the product characteristics of the semiconductor chip being tested, the material placement piece 2 with different physical properties can be replaced to adapt to the testing requirements of products with different performances.

[0028] After the material holder 2 is fixed in the test slot 11, laser penetration is performed through the test slot 11 to ensure that when the semiconductor chip is pressure tested, there is only a single product to be tested in each material holder 2 on the substrate 1, avoiding repeated loading in the material holder 2, affecting the accuracy of the pressure test results, or even damaging the product.

[0029] The four corners of the material placement slot 21 are all provided with clearance slots 23. The clearance slots 23 can provide operating space for the clamping of the chip, facilitate the loading and unloading of the chip in the material placement slot 21, and improve the operation efficiency.

[0030] The limiter 3 is vertically connected to the substrate 1. After the substrate 1 is loaded with a number of semiconductor chips through the material placement member 2, it needs to be placed on the test equipment for pressure testing. The limiter 3 protects the substrate 1, especially the semiconductor chips, to avoid excessive downward pressure that may damage the substrate 1 or the product.

[0031] like Figure 4 As shown, a limiting tip 31 is vertically provided on the top of the limiting member 3. Compared with the limiting member 3 directly colliding with the pressure measuring device, the limiting tip 31 can reduce the contact area between the limiting member 3 and the pressure measuring device, enhance the limiting effect, and reduce the overall shaking degree of the substrate 1 when a collision occurs.

[0032] In order to facilitate material removal, the semiconductor chip is simply placed flat in the material placement groove 21 of the material placement member 2. Limiting members 3 are provided at the two corners of each connecting groove 12 to avoid uneven distribution of the limiting members 3, which causes the substrate 1 to shake violently when the limiting members 3 collide with the test equipment, causing the semiconductor chip in the connecting groove 12 to jump and affect the test.

[0033] The bottom of the limiting member 3 is provided with a second connecting hole 32. Figure 5 As shown, the base plate 1 is provided with a second through hole 14, and the second fastening screw 33 detachably fixes the stopper 3 on the base plate 1 through the second through hole 14 and the second connection hole 32. The stopper 3 of different heights can be replaced according to the pressure measurement requirements to adapt to different limit height requirements.

[0034] In the semiconductor chip pressure test carrier jig of the utility model, the semiconductor chip to be tested is stuck in the material placement groove 21 and is carried by the substrate 1; the material placement piece 2 is detachably fixed on the substrate 1, and the substrate 1 carries multiple products at the same time and is placed in the pressure test equipment for testing. Each material placement piece 2 is separated from the substrate 1, and according to different test requirements of different types of semiconductor chips, especially for the test of semiconductor chips with special performance, in order not to affect the test results, the material placement piece 2 with different material performance can be quickly replaced to improve the applicability of the carried product; wherein, the limit piece 3 can protect the substrate 1 and the product during the test.

[0035] The preferred embodiments of the present invention have been specifically described above, but the present invention is not limited to the described embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention, and these equivalent modifications or substitutions are all within the scope defined by the claims of this application.

Claims

1. A carrier jig for semiconductor chip pressure testing, characterized in that: It includes a base plate, a material placement part, and a limiting part; The substrate is provided with a plurality of connection slots, the substrate is provided with a plurality of test slots, and the connection slots are connected through the test slots; a first through hole is provided in the connection slot; The material placement piece is provided with a material placement groove, and a first connecting hole is provided in the material placement groove; the sides of the material placement piece are provided with through grooves, and the through grooves are connected with the test groove; a first fastening screw is detachably fixed to the material placement piece in the connecting groove through the first through hole and the first connecting hole; The limiting member is vertically connected to the base plate.

2. The semiconductor chip pressure test carrier as claimed in claim 1, characterized in that: The material placement piece is an anti-static material placement piece.

3. The semiconductor chip pressure test carrier as claimed in claim 1, characterized in that: The four corners of the material placing trough are all provided with giving way grooves.

4. The semiconductor chip pressure test carrier as claimed in claim 1, characterized in that: A limiting tip is vertically arranged on the top of the limiting member.

5. The semiconductor chip pressure test carrier as claimed in claim 1, characterized in that: The limiting members are arranged at two corner positions of each of the connecting grooves.

6. The semiconductor chip pressure test carrier as claimed in claim 1 or 5, characterized in that: A second connection hole is provided at the bottom of the limiting member, and a second through hole is provided at the base plate. A second fastening screw passes through the second through hole and the second connection hole to detachably fix the limiting member on the base plate.

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