Semiconductor processing device
By using closed wafer carrier and lifting device in the semiconductor processing device, the contact area between the wafer and the pallet is reduced, pollution and cleaning problems are solved, and convenient semiconductor processing and maintenance are achieved.
Patent Information
- Application Number
- CN202420544427.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-03-20
- Publication Date
- 2024-12-24
- Estimated Expiration
- 2034-03-20
AI Technical Summary
During semiconductor processing, contact between the pallet and wafer leads to contamination residues and cross-contamination, and the cleaning process is cumbersome and time-consuming.
A semiconductor processing device is designed, using a closed wafer carrier and a lifting device. By reducing the contact area between the wafer and the pallet, the cylinder and pallet structure is used to achieve sealing and convenient cleaning.
It effectively avoids cross-contamination of wafers, simplifies the cleaning process, and improves the productivity and maintenance convenience of the device.
Smart Images
Figure CN222233616U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of semiconductors, in particular to a semiconductor processing device. Background Art
[0002] During the etching process of the wafer in the chamber, the semiconductor processing device carries the wafer on a tray. Due to the large contact area between the tray and the bottom of the wafer, the contamination of the previous wafer will remain on the tray during the contact between the tray and different wafers, causing cross contamination of the subsequent wafers. When the tray needs to be cleaned, it needs to be manually disassembled, which is time-consuming and labor-intensive.
[0003] Therefore, it is necessary to provide a new technical solution. Utility Model Content
[0004] In order to solve the technical problems existing in the prior art, the utility model discloses a semiconductor processing device, and the specific technical solution is as follows:
[0005] The utility model provides a semiconductor processing device, comprising
[0006] a first cavity;
[0007] a second cavity disposed below the first cavity, wherein the second cavity and the first cavity can be sealed and buckled; and
[0008] A lifting device, one end of which is arranged inside the second cavity, and the other end of the lifting device extends upward from the top of the second cavity. The part of the lifting device extending out of the second cavity can be movably extended and retracted up and down. A wafer carrier is detachably arranged on the top of one end of the lifting device extending out of the second cavity, and the top of the wafer carrier is higher than the top of the lifting device.
[0009] Furthermore, the wafer carrier is a closed structure, and the wafer carrier is symmetrically arranged on the top of the lifting device.
[0010] Furthermore, a first groove is provided at the center of the bottom of the first cavity, a second groove is provided at the center of the first groove, and a diameter of the second groove is greater than a diameter of the wafer;
[0011] A first boss is arranged at the center of the top of the second cavity, and the first boss and the first groove can be locked and closed. A third groove is arranged at the center of the first boss, and a blocking plate is formed by extending the edge of the third groove upward, and the diameter of the blocking plate is smaller than the diameter of the wafer. A fourth groove is arranged at the center of the third groove, and a connecting channel connected to the internal accommodation space of the second cavity is arranged at the center of the fourth groove, and the bottom of the accommodation space passes through the bottom of the second cavity.
[0012] When the first cavity and the second cavity are locked and closed, the wafer is placed on the blocking plate, and the wafer is accommodated in the second groove, and the top of the wafer is in close contact with the second groove.
[0013] Furthermore, the lifting device includes a cylinder and a tray.
[0014] The cylinder is disposed in the accommodation space inside the second cavity, and the telescopic rod of the cylinder passes through the connecting channel and extends out of the second cavity, and the telescopic rod and the connecting channel are in close contact to form a seal.
[0015] The tray is fixed on the top of the telescopic rod and can move up and down as the telescopic rod is extended and retracted up and down. The tray is accommodated in the fourth groove when the telescopic rod is retracted.
[0016] Furthermore, the wafer carrier is arranged on the surface of the tray near the edge of the tray, and a slot is provided on the tray at a position corresponding to the wafer carrier, and the wafer carrier and the slot are interference fit.
[0017] Furthermore, the material of the wafer carrier includes rubber and plastic.
[0018] Furthermore, the overall shape of the wafer carrier is ring-shaped, and the cross-sectional shape of the wafer carrier includes circular, square and other irregular shapes.
[0019] Furthermore, a sealing ring is arranged in the fourth groove on the periphery of the connecting channel, and the top of the sealing ring can contact with the bottom of the tray to form a sealed partition.
[0020] Furthermore, a cylinder connection hole is provided at the center of the tray, and the tray is connected to the cylinder through the cylinder connection hole.
[0021] The tray is provided with a plurality of air holes within the inner range of the sealing ring, and the air holes communicate with the space above and below the tray.
[0022] Furthermore, a circle of drainage grooves is arranged on the periphery of the connecting channel in the third groove, and the drainage grooves are arranged in a slope shape. A drainage hole is arranged at the lowest point of the drainage grooves, and the drainage hole penetrates downward to the bottom of the second cavity.
[0023] The utility model has the following beneficial effects:
[0024] 1. The semiconductor processing device provided by the utility model has a simple structure and ingenious design, and is convenient for large-scale production and promotion.
[0025] 2. The semiconductor processing device provided by the utility model utilizes the annular structure of the wafer carrier to carry the wafer, which greatly reduces the contact area with the back of the wafer and avoids the contact between the wafer and the surface of the tray. While avoiding contact with the front of the wafer, cross contamination can also be prevented on the back of the wafer.
[0026] 3. In the semiconductor processing device provided by the present invention, the cross-section of the wafer carrier can be circular, square or other irregular shapes, and can be customized according to actual conditions, with a wider range of uses.
[0027] 4. The semiconductor processing device provided by the utility model has air holes on the surface of the tray, which can pile up the granular impurities on the surface of the tray into the sealed space between the wafer and the fourth groove through the air holes, preventing the granular impurities from accumulating on the surface of the tray and causing cross contamination.
[0028] 5. The semiconductor processing device provided by the utility model is convenient for maintenance and cleaning, and only the wafer carrier needs to be replaced each time.
[0029] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0031] Figure 1 It is a schematic diagram of the structure of a semiconductor processing device in one embodiment.
[0032] Figure 2 It is a schematic diagram of the structure of the second cavity in an embodiment.
[0033] Figure 3 It is a three-dimensional exploded schematic diagram of the second cavity in an embodiment.
[0034] Figure 4 It is a schematic diagram of the structure of a tray and a wafer carrier in an embodiment.
[0035] Figure 5 The figure is a schematic diagram of the top view of the tray in one embodiment.
[0036] Figure 6 It is a schematic diagram of the structure of the wafer carrier with different cross-sectional shapes in one embodiment.
[0037] Figure 7 The diagram is a schematic diagram of the structure of a tray, a wafer carrier and a wafer in an embodiment.
[0038] Figure 8 It is a schematic diagram of the top view of the second cavity in an embodiment.
[0039] Fig. 9 It is a schematic diagram of the cross-sectional structure of the second cavity in an embodiment. DETAILED DESCRIPTION
[0040] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.
[0041] In the description of the present invention, it should be understood that the terms "upper", "lower", "top", "bottom", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In the description of the present invention, "multiple" means two or more, unless otherwise clearly and specifically defined.
[0042] In the present invention, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0043] The utility model discloses a semiconductor processing device, referring to Figures 1 to 9, comprising a first cavity 10, a second cavity 20 and a lifting device 30. The second cavity 20 is arranged below the first cavity 10, and the second cavity 20 and the first cavity 10 can be sealed and buckled. One end of the lifting device 30 is arranged inside the second cavity 20, and the other end extends upward from the top of the second cavity 20. The part of the lifting device 30 extending out of the second cavity 20 can be movably extended and retracted up and down. A wafer carrier 21 is detachably arranged on the top of one end of the lifting device 30 extending out of the second cavity 20, and the top of the wafer carrier 21 is higher than the top of the lifting device 30.
[0044] In one embodiment, the wafer carrier 21 is a closed structure, and the wafer carrier 21 is symmetrically arranged on the top of the lifting device 30 .
[0045] In one embodiment, reference Figure 1 A first groove 11 is disposed at the center of the bottom of the first cavity 10, a second groove 12 is disposed at the center of the first groove 11, and the diameter of the second groove 12 is greater than the diameter of the wafer 40. A first boss 22 is disposed at the center of the top of the second cavity 20, and the first boss 22 and the first groove 11 can be engaged and closed, a third groove 23 is disposed at the center of the first boss 22, and a blocking plate 25 is formed on the edge of the third groove 23 extending upward, and the diameter of the blocking plate 25 is smaller than the diameter of the wafer 40. Reference Fig. 9 A fourth groove 24 is disposed in the center of the third groove 23 , a connecting channel 241 connected to an internal accommodating space 242 of the second cavity 20 is disposed in the center of the fourth groove 24 , and the bottom of the accommodating space 242 passes through to the bottom of the second cavity 20 .
[0046] When the first cavity 10 and the second cavity 20 are locked and closed, the wafer 40 is placed on the blocking plate 25 , and the wafer 40 is accommodated in the second groove 12 , and the top of the wafer 40 is in close contact with the second groove 12 .
[0047] In one embodiment, reference Figure 2 and Figure 3 The lifting device 30 includes a cylinder 31 and a tray 32. The cylinder 31 is disposed in the accommodation space 242 inside the second cavity 20. The telescopic rod of the cylinder 31 extends outward from the second cavity 20 through the connecting channel 241. The telescopic rod and the connecting channel 241 are in close contact to form a seal. The tray 32 is fixed to the top of the telescopic rod and can move up and down as the telescopic rod is extended and retracted. The tray 32 is accommodated in the fourth groove 24 when the telescopic rod is retracted.
[0048] In one embodiment, reference Figure 4and Figure 5 The wafer carrier 21 is arranged on the surface of the tray 32 near the edge of the tray 32 , and a slot 321 is arranged on the tray 32 corresponding to the position of the wafer carrier 21 , and the wafer carrier 21 and the slot 321 are interference fit.
[0049] The wafer carrier 21 is made of rubber and plastic.
[0050] refer to Figure 6 and Figure 7 The overall shape of the wafer carrier 21 is ring-shaped, and the cross-sectional shape of the wafer carrier 21 includes a circle, a square and other irregular shapes.
[0051] In one embodiment, reference Figure 2 A sealing ring 243 is disposed in the fourth groove 24 on the periphery of the connecting channel 241 , and the top of the sealing ring 243 can contact the bottom of the tray 32 to form a sealed partition.
[0052] refer to Figure 4 and Figure 5 A cylinder connecting hole 322 is provided in the center of the tray 32, and the tray 32 is connected to the cylinder 31 through the cylinder connecting hole 322. The tray 32 is provided with a plurality of air holes 323 within the inner range of the sealing ring 243, and the air holes 323 connect the space above and below the tray 32.
[0053] In one embodiment, reference Figure 8 and Fig. 9 A circle of drainage grooves 231 are arranged in the third groove 23 on the periphery of the connecting channel 241. The drainage grooves 231 are arranged in a slope shape. A drainage hole 232 is arranged at the lowest point of the drainage grooves 231. The drainage hole 232 passes downward to the bottom of the second cavity 20.
[0054] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example" or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.
[0055] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify and vary the above embodiments within the scope of the present invention.
Claims
1. A semiconductor processing device, characterized in that: include a first cavity; A second cavity is arranged below the first cavity, and the second cavity and the first cavity can be sealed and buckled; and A lifting device, one end of which is arranged inside the second cavity, and the other end of the lifting device extends upward from the top of the second cavity. The part of the lifting device extending out of the second cavity can be movably extended and retracted up and down. A wafer carrier is detachably arranged on the top of one end of the lifting device extending out of the second cavity, and the top of the wafer carrier is higher than the top of the lifting device.
2. The semiconductor processing device according to claim 1, wherein: The wafer carrier is a closed structure, and the wafer carrier is symmetrically arranged on the top of the lifting device.
3. The semiconductor processing device according to claim 1, wherein: A first groove is arranged at the center of the bottom of the first cavity, a second groove is arranged at the center of the first groove, and a diameter of the second groove is larger than a diameter of the wafer; A first boss is provided at the top center of the second cavity, and the first boss and the first groove can be snap-fitted and closed, a third groove is provided at the center of the first boss, and a blocking plate is formed by extending the edge of the third groove upward, and the diameter of the blocking plate is smaller than the diameter of the wafer, a fourth groove is provided at the center of the third groove, and a connecting channel connected to the internal accommodating space of the second cavity is provided at the center of the fourth groove, and the bottom of the accommodating space passes through the bottom of the second cavity, and when the first cavity and the second cavity are snap-fitted and closed, the wafer is placed on the blocking plate, and at the same time the wafer is accommodated in the second groove and the top of the wafer is in close contact with the second groove.
4. The semiconductor processing device according to claim 3, characterized in that The lifting device includes a cylinder and a tray. The cylinder is arranged in the accommodating space inside the second cavity. The telescopic rod of the cylinder passes through the connecting channel and extends out of the second cavity. The telescopic rod and the connecting channel are in close contact to form a seal. The tray is fixed on the top of the telescopic rod and can move up and down as the telescopic rod is extended and retracted up and down. The tray is accommodated in the fourth groove when the telescopic rod is retracted.
5. The semiconductor processing device according to claim 4, characterized in that: The wafer carrier is arranged on the surface of the tray at a position close to the edge of the tray, and a slot is arranged on the tray at a position corresponding to the wafer carrier, and the wafer carrier and the slot are interference fit.
6. The semiconductor processing device according to claim 5, characterized in that The material of the wafer carrier includes rubber and plastic.
7. The semiconductor processing device according to claim 5, characterized in that The overall shape of the wafer carrier is ring-shaped, and the cross-sectional shape of the wafer carrier includes circular, square and other irregular shapes.
8. The semiconductor processing device according to claim 4, characterized in that A sealing ring is arranged in the fourth groove on the periphery of the connecting channel, and the top of the sealing ring can contact with the bottom of the tray to form a sealed partition.
9. The semiconductor processing device according to claim 8, characterized in that: A cylinder connection hole is provided at the center of the tray, and the tray is connected to the cylinder through the cylinder connection hole. The tray is provided with a plurality of air holes within the inner range of the sealing ring, and the air holes communicate with the space above and below the tray.
10. The semiconductor processing device according to claim 3, wherein: A circle of drainage grooves is arranged in the third groove on the periphery of the connecting channel. The drainage grooves are arranged in a slope shape. A drainage hole is arranged at the lowest point of the drainage grooves. The drainage hole penetrates downward to the bottom of the second cavity.