Display panel and display device

Abstract

The embodiment of the utility model discloses a display panel and a display device, the display panel comprises a plurality of first switch modules and a plurality of first test signal lines, and the first test signal lines are connected with corresponding first test pads; a plurality of second switch modules and a plurality of second test signal lines, the first switch modules and the second switch modules are oppositely arranged relative to the two sides of the display area, and the second test signal lines are connected with the corresponding first test bonding pads; a plurality of third switch modules and a plurality of third test signal lines, wherein the third test signal lines are connected with the corresponding second test bonding pads; wherein at least part of the first test bonding pads are connected with the first test signal line and the second test signal line at the same time, and the first switch module and the second switch module are conducted in a time-sharing mode so that test signals accessed by the first test bonding pads can be transmitted to the corresponding scanning lines. According to the scheme, the width of the non-display area on the terminal side is reduced, and then the frame of the display panel is reduced.

Description

Technical Field

[0001] The embodiments of the utility model relate to the field of display technology, and in particular to a display panel and a display device. Background Art

[0002] Liquid crystal display (LCD) has become the leading product in the current flat panel display due to its small size and low power consumption. LCD includes an array substrate and a color filter substrate, and the color filter substrate and the array substrate are formed into a liquid crystal cell through a cell-matching process.

[0003] In the LCD manufacturing process, the liquid crystal box needs to be tested for screen and terminal abnormalities. At present, the LCDQuick method is usually used for testing. A thin film transistor is set in the display panel. One electrode of the thin film transistor is connected to the in-plane wiring, and the other electrode is connected to the test pad through the test signal line. The display panel is tested for defects by loading a driving signal to the test pad.

[0004] In the prior art, test circuits are provided on both the terminal side and the non-terminal side of the display panel. This increases the number of test pads and occupies a larger frame space, which is not conducive to achieving a narrow frame. Utility Model Content

[0005] Embodiments of the utility model provide a display panel and a display device to realize a narrow frame design of the display panel.

[0006] According to one aspect of the present invention, a display panel is provided, comprising a display area and a non-display area arranged around the display area, the display panel further comprising:

[0007] A plurality of first test pads and a plurality of second test pads, wherein the first test pads and the second test pads are both located in the non-display area;

[0008] A plurality of first switch modules and a plurality of first test signal lines, wherein the plurality of first switch modules are located in the non-display area, each of the first switch modules is respectively connected between a corresponding scan line and the first test signal line, and the first test signal line is connected to a corresponding first test pad;

[0009] a plurality of second switch modules and a plurality of second test signal lines, wherein the plurality of second switch modules are located in the non-display area, and the first switch module and the second switch module are arranged opposite to each other on two sides of the display area, each second switch module is respectively connected between the corresponding scan line and the second test signal line, and the second test signal line is connected to the corresponding first test pad;

[0010] A plurality of third switch modules and a plurality of third test signal lines, wherein the plurality of third switch modules are located in the non-display area, each of the third switch modules is respectively connected between a corresponding data line and the third test signal line, and the third test signal line is connected to the corresponding second test pad;

[0011] Among them, at least part of the first test pads are connected to the first test signal line and the second test signal line at the same time, and the first switch module and the second switch module are turned on in time-sharing to transmit the test signal connected to the first test pad to the corresponding scan line.

[0012] Optionally, the display panel further includes:

[0013] A third test pad and a fourth test pad, wherein the third test pad and the fourth test pad are both located in the non-display area;

[0014] A first control signal line, a second control signal line and a third control signal line, the control ends of multiple first switch modules are connected to the first control signal line, the first control signal line is connected to the third test pad, the control ends of multiple second switch modules are connected to the second control signal line, the second control signal line is connected to the fourth test pad, the control ends of multiple third switch modules are connected to the third control signal line, and the third control signal line is connected to the third test pad.

[0015] Optionally, the non-display area includes a first non-display area, a second non-display area, and a third non-display area, the first non-display area and the second non-display area are arranged relative to the display area, and the first non-display area and the third non-display area are located on different sides of the display area;

[0016] The first test pad and the second test pad are both located in the second non-display area, the first switch module is located in the first non-display area, the second switch module is located in the third non-display area, and the third switch module is located in the second non-display area.

[0017] Optionally, the number of the first test pads is two, and the number of the first test signal lines and the number of the second test signal lines are both two;

[0018] The odd-numbered scan lines are connected to the first first test signal line via the corresponding first switch module, and the first first test signal line is connected to the first first test pad;

[0019] The scan lines in even-numbered rows are connected to the second first test signal line via the corresponding first switch module, and the second first test signal line is connected to the second first test pad;

[0020] The odd-numbered scan lines are connected to the first second test signal line via the corresponding second switch module, and the first second test signal line is connected to the first first test pad;

[0021] The even-numbered rows of the scan lines are connected to the second second test signal line via the corresponding second switch module, and the second second test signal line is connected to the second first test pad.

[0022] Optionally, the number of the second test pads is three, and the number of the third test signal lines is three;

[0023] The data lines include a first data line, a second data line and a third data line, and the sub-pixels correspondingly connected to the first data line, the second data line and the third data line emit different colors of light;

[0024] Wherein, the first data line is connected to the first of the third test signal lines via the corresponding third switch module, and the first of the third test signal lines is connected to the first of the second test pads;

[0025] The second data line is connected to the second third test signal line via the corresponding third switch module, and the second third test signal line is connected to the second second test pad;

[0026] The third data line is connected to the third third test signal line via the corresponding third switch module, and the third third test signal line is connected to the third second test pad.

[0027] Optionally, the display panel further includes a plurality of fourth switch modules, a plurality of fourth test signal lines and a fourth control signal line, the non-display area includes a third non-display area and a fourth non-display area arranged relatively to the display area, the plurality of third switch modules are located in the third non-display area, and the plurality of fourth switch modules are located in the fourth non-display area;

[0028] Each of the fourth switch modules is respectively connected between the corresponding data line and the fourth test signal line, the control end of the fourth switch module is connected to the fourth control signal line, the fourth test signal line is connected to the second test pad, and the third switch module and the fourth switch module are turned on in time-sharing manner to transmit the test signal connected to the second test pad to the corresponding data line.

[0029] Optionally, the number of the fourth test signal lines is three, the control ends of the plurality of fourth switch modules are connected to the fourth control signal lines, and the fourth control signal lines and the second control signal lines connected to the control ends of the second switch modules are connected to the same test pad;

[0030] Wherein, the first data line is connected to the first of the fourth test signal lines via the corresponding fourth switch module, and the first of the fourth test signal lines is connected to the first of the second test pads;

[0031] The second data line is connected to the second fourth test signal line via the corresponding fourth switch module, and the second fourth test signal line is connected to the second second test pad;

[0032] The third data line is connected to the third fourth test signal line via the corresponding fourth switch module, and the third fourth test signal line is connected to the third second test pad.

[0033] Optionally, the first switch module includes a first transistor, the second switch module includes a second transistor, the third switch module includes a third transistor, and the fourth switch module includes a fourth transistor;

[0034] The gate of the first transistor is connected to the first control signal line, the first electrode of the first transistor is connected to the scan line, the second electrode of the first transistor is connected to the first test signal line, the gate of the second transistor is connected to the second control signal line, the first electrode of the second transistor is connected to the scan line, and the second electrode of the second transistor is connected to the second test signal line;

[0035] The gate of the third transistor is connected to the third control signal line, the first electrode of the third transistor is connected to the data line, the second electrode of the third transistor is connected to the third test signal line, the gate of the fourth transistor is connected to the fourth control signal line, the first electrode of the fourth transistor is connected to the data line, and the second electrode of the fourth transistor is connected to the fourth test signal line.

[0036] Optionally, a width-to-length ratio of the first transistor is smaller than a width-to-length ratio of the second transistor, and a width-to-length ratio of the third transistor is smaller than a width-to-length ratio of the fourth transistor.

[0037] According to another aspect of the present invention, a display device is provided. The display device includes the display panel provided by any embodiment of the present invention.

[0038] The technical solution provided by the embodiment of the utility model is to respectively set a plurality of first switch modules, second switch modules and third switch modules in the non-display area on different sides of the display area, and each first switch module is respectively connected to the corresponding first test pad via the first test signal line, each second switch module is respectively connected to the corresponding first test pad via the corresponding second test signal line, and each third switch module is respectively connected to the corresponding second test pad via the corresponding third test signal line; wherein, at least part of the first test pad is simultaneously connected to the first test signal line and the second test signal line, and the first switch module and the second switch module are controlled to be turned on in time-sharing, so that the scanning signal loaded on the first test pad is transmitted to the first switch module and the second switch module in time-sharing, and then transmitted to the in-plane scanning line. Compared with the prior art, the technical solution provided by this embodiment can reduce the number of the first test pads by sharing the first test pads while realizing the image quality detection and the abnormality detection on the terminal side, thereby reducing the occupied space of the first test pads, which is conducive to reducing the width of the non-display area on the terminal side, and thus reducing the frame of the display panel.

[0039] It should be understood that the contents described in this section are not intended to identify the key or important features of the embodiments of the present utility model, nor are they intended to limit the scope of the present utility model. Other features of the present utility model will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0041] Figure 1 A schematic diagram of the structure of a display panel provided by an embodiment of the utility model;

[0042] Figure 2 A schematic diagram of the structure of another display panel provided by an embodiment of the utility model;

[0043] Figure 3 A schematic diagram of the structure of another display panel provided by an embodiment of the utility model;

[0044] Figure 4 A schematic diagram of the structure of another display panel provided by an embodiment of the utility model;

[0045] Figure 5 A schematic diagram of the structure of another display panel provided by an embodiment of the utility model;

[0046] Figure 6 It is a structural schematic diagram of a display panel in the related art;

[0047] Among them, 10 is the first test pad; 20 is the second test pad; 30 is the third test pad; 40 is the fourth test pad; 101 is the fifth test pad; 201 is the sixth test pad;

[0048] 11-first switch module; 12-first test signal line; 21-second switch module; 22-second test signal line; 31-third switch module; 32-third test signal line; 41-fourth switch module; 42-fourth test signal line;

[0049] M1-first transistor; M2-second transistor; M3-third transistor; M4-fourth transistor;

[0050] 51 - first control signal line; 52 - second control signal line; 53 - third control signal line; 54 - fourth control signal line;

[0051] NA-non-display area; NA1-first non-display area; NA2-second non-display area; NA3-third non-display area; NA4-fourth non-display area; AA-display area;

[0052] DL-data line; GL-scan line. DETAILED DESCRIPTION

[0053] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the utility model.

[0054] It should be noted that the terms "first", "second", etc. in the specification and claims of the utility model and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the utility model described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0055] Figure 1 A schematic diagram of a display panel provided by an embodiment of the utility model, referring to Figure 1 The display panel provided in this embodiment is provided with a display area AA and a non-display area NA provided around the display area AA, and the display panel further includes:

[0056] A plurality of first test pads 10 and a plurality of second test pads 20, wherein the first test pads 10 and the second test pads 20 are both located in the non-display area NA;

[0057] A plurality of first switch modules 11 and a plurality of first test signal lines 12, wherein the plurality of first switch modules 11 are located in the non-display area NA, each first switch module 11 is respectively connected between a corresponding scan line GL and a first test signal line 12, and the first test signal line 12 is connected to a corresponding first test pad 10;

[0058] A plurality of second switch modules 21 and a plurality of second test signal lines 22, wherein the plurality of second switch modules 21 are located in the non-display area NA, and the first switch module 11 and the second switch module 21 are arranged opposite to each other on both sides of the display area AA, each second switch module 21 is respectively connected between the corresponding scan line GL and the second test signal line 22, and the second test signal line 22 is connected to the corresponding first test pad 10;

[0059] A plurality of third switch modules 31 and a plurality of third test signal lines 32, wherein the plurality of third switch modules 31 are located in the non-display area NA, each third switch module 31 is respectively connected between a corresponding data line GL and a third test signal line 32, and the third test signal line 32 is connected to a corresponding second test pad 20;

[0060] At least part of the first test pads 10 are connected to the first test signal line 12 and the second test signal line 22 at the same time, and the first switch module 11 and the second switch module 21 are turned on in time division to transmit the test signal connected to the first test pads 10 to the corresponding scan line GL.

[0061] It should be understood that a chip reserved area and a fan-out trace are provided on the terminal side of the display panel. The chip reserved area is provided with a driving pad, the driving pad is used to bind a driving chip (such as a scanning driving chip and a display driving chip), and the fan-out trace is connected between the scanning line (or data line) and the driving pad. The driving chip is used to provide a driving signal to the scanning line or data line when the display panel is working normally. Here, the test signal line can be connected to the corresponding scanning line or data line through the fan-out trace.

[0062] The first switch module 11 and the second switch module 21 are arranged opposite to each other and are both connected to the scan line GL. In the test phase, the first switch module 11 and the second switch module 21 are turned on in time division to prevent interference between the two and affect the test results.

[0063] Exemplarily, taking the first switch module 11 and the third switch module 31 as the terminal side of the display panel, during the test process, the test probe can be inserted into the corresponding first test pad 10 and the second test pad 20 through the test fixture, and the first test pad 10 is loaded with a scan signal, and the second test pad 20 is loaded with a data signal. The first switch module 11 and the third switch module 31 are turned on, and the second switch module 21 is turned off, the scan signal loaded on the first test pad 10 is transmitted to the corresponding scan line GL via the first test signal line 12, and the data signal loaded on the second test pad 20 is transmitted to the corresponding data line DL via the third test signal line 32, so as to drive the pixel unit on the display panel to display, and determine whether the display panel is abnormal according to the display picture, such as whether the display panel has abnormalities in picture quality such as dots, lines, and mura. At the same time, through the display status of the corresponding rows or columns, it is possible to detect whether there is a short circuit on the terminal side. For example, by observing whether dark lines (or bright lines) appear on the display panel, it is possible to determine whether there is a break between the scan line GL and the scan driver chip (the fan-out routing between the scan line GL and the scan driver chip is broken), or whether there is a break between the data line DL and the display driver chip.

[0064] Since the space on the terminal side is small, the driving ability of the first switch module 11 is relatively weak. In order to avoid affecting the image quality detection effect due to the weak driving ability, the second switch module 21 not set on the terminal side can be used for image quality detection, and the first switch module 11 is used only for terminal side abnormality detection. For example, when performing image quality detection, the second switch module 21 and the third switch module 31 are turned on, and the first switch module 11 is turned off, the scan signal loaded on the first test pad 10 is transmitted to the corresponding scan line GL through the second test signal line 22, and the data signal loaded on the second test pad 20 is transmitted to the corresponding data line DL through the third test signal line 32 to drive the pixel unit on the display panel to display, so as to detect the display image quality. When performing terminal side abnormality detection, the first switch module 11 and the third switch module 32 are controlled to be turned on, and signals are sent to the scan line GL and the data line DL in the plane through the first switch module 11 and the third switch module 32 to detect whether the terminal side is abnormal.

[0065] In this embodiment, by controlling the first switch module 11 and the second switch module 12 to be turned on in time-sharing mode, the first switch module 11 and the second switch module 12 can share at least part of the first test pad 10, so as to reduce the number of the first test pads 10, thereby reducing the space occupied by the first test pads 10. The saved layout space can be used to optimize the circuit layout of the non-display area NA, which is beneficial to reducing the size of the frame and thus achieving a narrow frame.

[0066] The technical solution provided by the embodiment of the utility model is to respectively set a plurality of first switch modules 11, second switch modules 21 and third switch modules 31 in the non-display area NA on different sides of the display area AA, and each first switch module 11 is respectively connected to the corresponding first test pad 10 via the first test signal line 12, each second switch module 21 is respectively connected to the corresponding first test pad 10 via the corresponding second test signal line 22, and each third switch module 31 is respectively connected to the corresponding second test pad via the corresponding third test signal line 32; wherein, at least part of the first test pads 10 are simultaneously connected to the first test signal line 10 and the second test signal line 20, and the first switch module 11 and the second switch module 21 are controlled to be turned on in time-sharing manner, so that the scan signal loaded on the first test pad 10 is transmitted to the first switch module 11 and the second switch module 21 in time-sharing manner, and then transmitted to the in-plane scan line GL. Compared with the prior art, the technical solution provided in this embodiment can reduce the number of first test pads 10 by sharing the first test pad 10 while realizing image quality detection and terminal side abnormality detection, thereby reducing the space occupied by the first test pad 10, which is beneficial to reducing the width of the non-display area NA on the terminal side, and further reducing the border of the display panel.

[0067] Figure 2 A schematic diagram of another display panel provided by an embodiment of the present invention, referring to Figure 1 and 2 , based on the above embodiment, optionally, the display panel further includes:

[0068] A third test pad 30 and a fourth test pad 40, both of which are located in the non-display area NA;

[0069] The first control signal line 51, the second control signal line 52 and the third control signal line 53, the control ends of the multiple first switch modules 11 are all connected to the first control signal line 51, the first control signal line 51 is connected to the third test pad 30, the control ends of the multiple second switch modules 21 are all connected to the second control signal line 52, the second control signal line 52 is connected to the fourth test pad 40, the control ends of the multiple third switch modules 31 are all connected to the third control signal line 53, and the third control signal line 53 is connected to the third test pad 30.

[0070] Specifically, the non-display area NA may include a first non-display area NA1, a second non-display area NA2, and a third non-display area NA3, wherein the first non-display area NA1 and the second non-display area NA2 are arranged relative to the display area AA, and the third non-display area NA3 is located on a side adjacent to the first non-display area NA1 and the second non-display area NA2. The first switch module 11 may be located in the first non-display area NA1, the second switch module 21 may be located in the second non-display area NA2, and the third switch module 31 may be located in the third non-display area NA3.

[0071] The first switch module 11, the second switch module 21 and the third switch module 31 are respectively connected to a control signal line, and the first control signal line 51 connected to the first switch module 11 and the third control signal line 53 connected to the third switch module 31 are connected to the same third test pad 30. In other words, the first switch module 11 and the third switch module 31 can be turned on at the same time in response to the driving signal on the third test pad 30, thereby realizing the detection of abnormalities on the terminal side.

[0072] The second switch module 21 is connected to the fourth test pad 40 via the second control signal line 52 . The fourth test pad 40 and the third test pad 30 are independent of each other to achieve separate control of the second switch module 21 and the first switch module 11 .

[0073] Optionally, the third non-display area NA3 is also provided with a driving chip (e.g., a display driving chip) and a driving pad, resulting in a smaller layout space for the third switch module 32. Therefore, in order to avoid the problem of poor image quality detection effect due to insufficient driving capability of the third switch module 32, another set of detection circuits is set on the opposite side of the third non-display area NA3 to meet testing requirements.

[0074] Figure 3 A schematic diagram of another display panel provided by an embodiment of the present invention, referring to Figure 3 On the basis of the above embodiments, optionally, the non-display area NA also includes a fourth non-display area NA4, the fourth non-display area NA4 and the third non-display area NA3 are symmetrically arranged about the display area AA, and the first non-display area NA1 and the third non-display area NA3 are located on different sides of the display area AA, therefore, the second non-display area NA2 and the fourth non-display area NA4 are also located on different sides of the display area AA.

[0075] The fourth non-display area NA4 is provided with a fourth switch module 41, the fourth switch module 41 is connected to the data line DL, and the fourth switch module 41 is used to respond to the control signal on the fourth control signal line 54 to transmit the driving signal loaded on the second test pad 20 to the corresponding data line ( Figure 3Since the fourth non-display area NA4 is the non-terminal side of the display panel, the fourth non-display area NA4 has a large enough space to arrange the fourth switch module 41, so that the fourth switch module 41 has a large driving capability, avoiding the problem of inaccurate test results caused by abnormal images.

[0076] In this embodiment, the first control signal line 51 and the third control signal line 53 are connected to the same third test pad 30, and the second control signal line 52 and the fourth control signal line 54 are connected to the same fourth test pad 40. When performing abnormal detection on the terminal side, the third test pad 30 is loaded with a turn-on control signal, the fourth test pad 40 is loaded with a turn-off control signal, the first switch module 11 and the third switch module 31 are turned on, and the second switch module 21 and the fourth switch module 41 are turned off. The scan signal loaded on the first test pad 10 is transmitted to the scan line GL via the first test signal line 12 and the first switch module 11, and the data signal loaded on the second test pad 20 is transmitted to the data line DL via the third test signal line 32 and the third switch module 31 to drive the pixel unit in the display area AA to display, and determine whether there is an abnormal situation of disconnection on the terminal side of the display panel according to the display picture.

[0077] When performing image quality detection, the third test pad 30 is loaded with a shutdown control signal, the fourth test pad 40 is loaded with a conduction control signal, the first switch module 11 and the third switch module 31 are turned off, and the second switch module 21 and the fourth switch module 41 are turned on. The scan signal loaded on the first test pad 10 is transmitted to the scan line GL via the second test signal line 22 and the second switch module 21, and the data signal loaded on the second test pad 20 is transmitted to the data line DL via the fourth test signal line 42 and the fourth switch module 41, so as to drive the pixel units in the display area AA to display, and determine whether the display panel has abnormalities in image quality such as dots, lines, and mura according to the displayed picture.

[0078] Therefore, the technical solution provided in this embodiment can save frame space while ensuring the detection effect, and achieve a narrower frame design, which is beneficial to improving the market competitiveness of the display panel.

[0079] Optionally, the same switch module can be connected to one scan line GL or data line DL, or can be connected to multiple scan lines GL or data lines DL. Figure 4 A schematic diagram of another display panel provided by an embodiment of the present invention, referring to Figure 4 On the basis of the above embodiments, the number of the first test pads 10 is two, and the number of the first test signal lines 12 and the number of the second test signal lines 22 are both two.

[0080] Among them, for the first switch module 11, the odd-numbered scan lines GL are connected to the first first test signal line 12 through the corresponding first switch module 11, and the first first test signal line 12 is connected to the first first test pad 10; the even-numbered scan lines GL are connected to the second first test signal line 12 through the corresponding first switch module 11, and the second first test signal line 12 is connected to the second first test pad 10. For example, the number of the first switch modules 11 is two, the odd-numbered scan lines GL are connected to the first first test signal line 12 through the first first switch module 11, and the even-numbered scan lines GL are connected to the second first test signal line 12 through the second first switch module 11.

[0081] For the second switch module 21, the odd-numbered scan lines GL are connected to the first second test signal line 22 via the corresponding second switch module 21, and the first second test signal line 22 is connected to the first first test pad 10; the even-numbered scan lines GL are connected to the second second test signal line 22 via the corresponding second switch module 21, and the second second test signal line 22 is connected to the second first test pad 10. For example, the number of the second switch modules 21 is two, the odd-numbered scan lines GL are connected to the first second test signal line 22 via the first second switch module 21, and the even-numbered scan lines GL are connected to the second second test signal line 22 via the second second switch module 21.

[0082] Continue to refer Figure 4 , the number of the second test pads 20 is three, the number of the third test signal lines 32 is three; the data lines DL include a first data line, a second data line and a third data line, and the sub-pixels connected to the first data line, the second data line and the third data line have different luminous colors. For example, the first data line is connected to a red sub-pixel, the second data line is connected to a green sub-pixel, and the third data line is connected to a blue sub-pixel.

[0083] Among them, the first data line is connected to the first third test signal line 32 via the corresponding third switch module 31, and the first third test signal line 32 is connected to the first second test pad 20; the second data line is connected to the second third test signal line 32 via the corresponding third switch module 31, and the second third test signal line 32 is connected to the second second test pad 20; the third data line is connected to the third third test signal line 32 via the corresponding third switch module 31, and the third third test signal line 32 is connected to the third second test pad 20. For example, the number of the third switch modules 31 is three, and each third switch module 31 is connected to a different third test signal line 32.

[0084] The number of fourth test signal lines 42 is three, the control ends of the plurality of fourth switch modules 41 are all connected to the fourth control signal line 54, and the fourth control signal line 54 and the second control signal line 52 connected to the control end of the second switch module 21 are connected to the same test pad;

[0085] Among them, the first data line is connected to the first fourth test signal line 42 via the corresponding fourth switch module 41, and the first fourth test signal line 42 is connected to the first second test pad 20; the second data line is connected to the second fourth test signal line 42 via the corresponding fourth switch module 41, and the second fourth test signal line 42 is connected to the second second test pad 20; the third data line is connected to the third fourth test signal line 42 via the corresponding fourth switch module 41, and the third fourth test signal line 42 is connected to the third second test pad 20. For example, the number of the fourth switch modules 41 is three, and each fourth switch module 41 is connected to a different fourth test signal line 42.

[0086] Figure 5 A schematic diagram of another display panel structure provided by an embodiment of the utility model, specifically: Figure 4 The switch modules in the display panel are shown as a schematic diagram of the structure of the device. Figure 4 and Figure 5 , the first switch module 11 includes a first transistor M1, the second switch module 21 includes a second transistor M2, the third switch module 31 includes a third transistor M3, and the fourth switch module 41 includes a fourth transistor M4;

[0087] The gate of the first transistor M1 is connected to the first control signal line 51, the first electrode of the first transistor M1 is connected to the scan line GL, the second electrode of the first transistor M1 is connected to the first test signal line 12, the gate of the second transistor M2 is connected to the second control signal line 52, the first electrode of the second transistor M2 is connected to the scan line GL, and the second electrode of the second transistor M2 is connected to the second test signal line 22;

[0088] The gate of the third transistor M3 is connected to the third control signal line 53, the first electrode of the third transistor M3 is connected to the data line DL, the second electrode of the third transistor M3 is connected to the third test signal line 32, the gate of the fourth transistor M4 is connected to the fourth control signal line 54, the first electrode of the fourth transistor M4 is connected to the data line DL, and the second electrode of the fourth transistor M4 is connected to the fourth test signal line 42.

[0089] The second control signal line 52 can be multiplexed as the fourth control signal line 54, and the first control signal line 51 can be multiplexed as the third control signal line 53, which is beneficial to saving the number of signal lines, thereby reducing the space occupied by the control signal lines.

[0090] In the present embodiment, the first transistor M1 , the second transistor M2 , the third transistor M3 , and the fourth transistor M4 have the same channel type.

[0091] Optionally, the first non-display area NA1 further includes a first chip reserved area, the first chip reserved area is used to bind a scan driver chip, the output end of the scan driver chip is connected to the scan line GL via a fan-out line, and the scan driver chip is used to provide a scan signal to the scan line GL during the normal working stage of the display panel. Among them, the first switch module 11 is arranged in the first chip reserved area. The size of the first transistor M1 included in the first switch module 11 is limited by the space size of the first chip reserved area, and there is no chip reserved area in the first non-display area NA2, and the size of the second transistor M2 included in the second switch module 21 is not limited by this, so the width-to-length ratio of the first transistor M1 is smaller than the width-to-length ratio of the second transistor M2.

[0092] Similarly, the third non-display area NA3 also includes a second chip reserved area, the second chip reserved area is used to bind the display driver chip, the output end of the display driver chip is connected to the data line DL via a fan-out line, and the display driver chip is used to provide a data signal to the data line DL during the normal working stage of the display panel. Among them, the third switch module 31 is arranged in the second chip reserved area, and the size of the third transistor M3 included in the third switch module 31 is limited by the space size of the second chip reserved area, while there is no chip reserved area in the fourth non-display area NA4, and the size of the fourth transistor M4 included in the fourth switch module 41 is not limited thereto, therefore, the width-to-length ratio of the third transistor M3 is smaller than the width-to-length ratio of the fourth transistor M4.

[0093] In this embodiment, since the width-to-length ratio of the second transistor M2 and the fourth transistor M4 is relatively large, the driving capability of the second transistor M2 and the fourth transistor M4 is relatively strong. The second transistor M2 and the fourth transistor M4 are used to test the display quality, which can avoid the phenomenon of abnormal display due to insufficient driving capability, thereby improving the test effect.

[0094] Figure 6 is a schematic diagram of the structure of a display panel in the related art. For the convenience of comparison, each switch module is Figure 5 The switch module layout in the structure shown is the same. Figure 6 As shown, in the related art, the first switch module 11 and the third switch module 31 use a group of test pads (e.g., the fifth test pad 101 and the sixth test pad 201), and the second switch module 21 and the fourth switch module 41 use another group of test pads (e.g., the first test pad 10 and the second test pad 20).

[0095] In this embodiment, the fifth test pad 101 and the sixth test pad 201 are cancelled, and the first switch module 11, the third switch module 31, the second switch module 21 and the fourth switch module 41 share the same set of test pads, thereby saving five test pads (two fifth test pads 101 and three sixth test pads 201). For example, if the spacing between two adjacent test pads is 800μm-1200μm, and the width of the test pad is 1000μm-1200μm, the technical solution provided in this embodiment can save 800000μm^2-1440000μm^2 of space, thereby facilitating the reduction of the width of the non-display area NA, and further facilitating the realization of a narrow frame design.

[0096] Optionally, the embodiment of the utility model further provides a display device. The display device includes the display panel provided by any embodiment of the utility model, and the display panel may be a liquid crystal display panel. In this embodiment, the display device may be a mobile phone, or any electronic product with a display function, including but not limited to the following categories: televisions, laptops, desktop displays, tablet computers, digital cameras, smart bracelets, smart glasses, vehicle-mounted displays, medical equipment, industrial control equipment, touch interactive terminals, etc., and the embodiment of the utility model does not specifically limit this.

[0097] It should be understood that the various forms of processes shown above can be used to reorder, add or delete steps. For example, the steps described in the present invention can be performed in parallel, sequentially or in different orders, as long as the desired results of the technical solution of the present invention can be achieved, and this document does not limit this.

[0098] The above specific implementations do not constitute a limitation on the protection scope of the present utility model. It should be understood by those skilled in the art that various modifications, combinations, sub-combinations and substitutions can be made according to design requirements and other factors. Any modification, equivalent substitution and improvement made within the spirit and principle of the present utility model shall be included in the protection scope of the present utility model.

Claims

1. A display panel, comprising a display area and a non-display area arranged around the display area, characterized in that: The display panel further includes: A plurality of first test pads and a plurality of second test pads, wherein the first test pads and the second test pads are both located in the non-display area; A plurality of first switch modules and a plurality of first test signal lines, wherein the plurality of first switch modules are located in the non-display area, each of the first switch modules is respectively connected between a corresponding scan line and the first test signal line, and the first test signal line is connected to a corresponding first test pad; a plurality of second switch modules and a plurality of second test signal lines, wherein the plurality of second switch modules are located in the non-display area, and the first switch module and the second switch module are arranged opposite to each other on two sides of the display area, each second switch module is respectively connected between the corresponding scan line and the second test signal line, and the second test signal line is connected to the corresponding first test pad; A plurality of third switch modules and a plurality of third test signal lines, wherein the plurality of third switch modules are located in the non-display area, each of the third switch modules is respectively connected between a corresponding data line and the third test signal line, and the third test signal line is connected to the corresponding second test pad; Among them, at least part of the first test pads are connected to the first test signal line and the second test signal line at the same time, and the first switch module and the second switch module are turned on in time-sharing to transmit the test signal connected to the first test pad to the corresponding scan line.

2. The display panel according to claim 1, characterized in that: The display panel further includes: A third test pad and a fourth test pad, wherein the third test pad and the fourth test pad are both located in the non-display area; A first control signal line, a second control signal line and a third control signal line, the control ends of multiple first switch modules are connected to the first control signal line, the first control signal line is connected to the third test pad, the control ends of multiple second switch modules are connected to the second control signal line, the second control signal line is connected to the fourth test pad, the control ends of multiple third switch modules are connected to the third control signal line, and the third control signal line is connected to the third test pad.

3. The display panel according to claim 1, characterized in that: The non-display area includes a first non-display area, a second non-display area, and a third non-display area, the first non-display area and the second non-display area are arranged relative to the display area, and the first non-display area and the third non-display area are located on different sides of the display area; The first test pad and the second test pad are both located in the second non-display area, the first switch module is located in the first non-display area, the second switch module is located in the third non-display area, and the third switch module is located in the second non-display area.

4. The display panel according to claim 1, characterized in that: The number of the first test pads is two, and the number of the first test signal lines and the number of the second test signal lines are both two; The odd-numbered scan lines are connected to the first first test signal line via the corresponding first switch module, and the first first test signal line is connected to the first first test pad; The scan lines in even-numbered rows are connected to the second first test signal line via the corresponding first switch module, and the second first test signal line is connected to the second first test pad; The odd-numbered scan lines are connected to the first second test signal line via the corresponding second switch module, and the first second test signal line is connected to the first first test pad; The even-numbered rows of the scan lines are connected to the second second test signal line via the corresponding second switch module, and the second second test signal line is connected to the second first test pad.

5. The display panel according to claim 1, characterized in that: The number of the second test pads is three, and the number of the third test signal lines is three; The data lines include a first data line, a second data line and a third data line, and the sub-pixels correspondingly connected to the first data line, the second data line and the third data line emit different colors of light; Wherein, the first data line is connected to the first of the third test signal lines via the corresponding third switch module, and the first of the third test signal lines is connected to the first of the second test pads; The second data line is connected to the second third test signal line via the corresponding third switch module, and the second third test signal line is connected to the second second test pad; The third data line is connected to the third third test signal line via the corresponding third switch module, and the third third test signal line is connected to the third second test pad.

6. The display panel according to claim 5, characterized in that: The display panel further includes a plurality of fourth switch modules, a plurality of fourth test signal lines and a fourth control signal line, the non-display area includes a third non-display area and a fourth non-display area arranged relatively to the display area, the plurality of third switch modules are located in the third non-display area, and the plurality of fourth switch modules are located in the fourth non-display area; Each of the fourth switch modules is respectively connected between the corresponding data line and the fourth test signal line, the control end of the fourth switch module is connected to the fourth control signal line, the fourth test signal line is connected to the second test pad, and the third switch module and the fourth switch module are turned on in time-sharing manner to transmit the test signal connected to the second test pad to the corresponding data line.

7. The display panel according to claim 6, characterized in that: The number of the fourth test signal lines is three, the control ends of the plurality of fourth switch modules are all connected to the fourth control signal lines, and the fourth control signal lines and the second control signal lines connected to the control ends of the second switch modules are connected to the same test pad; Wherein, the first data line is connected to the first of the fourth test signal lines via the corresponding fourth switch module, and the first of the fourth test signal lines is connected to the first of the second test pads; The second data line is connected to the second fourth test signal line via the corresponding fourth switch module, and the second fourth test signal line is connected to the second second test pad; The third data line is connected to the third fourth test signal line via the corresponding fourth switch module, and the third fourth test signal line is connected to the third second test pad.

8. The display panel according to claim 6, characterized in that: The first switch module includes a first transistor, the second switch module includes a second transistor, the third switch module includes a third transistor, and the fourth switch module includes a fourth transistor; The gate of the first transistor is connected to the first control signal line, the first electrode of the first transistor is connected to the scan line, the second electrode of the first transistor is connected to the first test signal line, the gate of the second transistor is connected to the second control signal line, the first electrode of the second transistor is connected to the scan line, and the second electrode of the second transistor is connected to the second test signal line; The gate of the third transistor is connected to the third control signal line, the first electrode of the third transistor is connected to the data line, the second electrode of the third transistor is connected to the third test signal line, the gate of the fourth transistor is connected to the fourth control signal line, the first electrode of the fourth transistor is connected to the data line, and the second electrode of the fourth transistor is connected to the fourth test signal line.

9. The display panel according to claim 8, characterized in that: The width-to-length ratio of the first transistor is smaller than that of the second transistor, and the width-to-length ratio of the third transistor is smaller than that of the fourth transistor.

10. A display device, characterized in that: A display panel comprising any one of claims 1 to 9.

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