Cutting-up chip capable of enhancing bottom filler combination

Abstract

The utility model relates to a dicing chip for enhancing combination of underfill, which comprises a wafer to be cut, and at least one shallow slot is arranged on each of two sides of a cutting channel of the wafer to be cut; and the shallow groove is formed between the retaining wall and the cutting channel. The chip provided by the utility model at least has the following beneficial effects: the stress of the underfill can be reduced, the problem that the underfill is broken or peeled off due to warping of the packaging body or other stress reasons is solved, the defect risk possibly generated in the chip manufacturing process is effectively reduced, the operation quality and the product yield are improved, and the reliability is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging, in particular to a dicing chip with enhanced bottom filler bonding and application thereof. Background Art

[0002] At present, the mainstream flip chip packaging process includes dicing, wafer loading, underfill, and compression molding. The dicing process is responsible for dividing the entire wafer into independent chips, and the underfill process injects the underfill between the chip and the substrate to protect the bumps and solder joints, and act as a buffer layer to disperse stress to avoid stress concentration on the bumps and reduce the risk of bump damage. The existing dicing process is a single-slot cutting process, which uses a dicing blade or a combination of laser and blade to cut through the cutting path to separate the chips. After the chip is underfilled, the substrate may warp due to the substrate itself or reliability testing, generating edge stress between the underfill, which may cause the underfill to break or peel off. Figure 1-Figure 3 As shown, Figure 1 The figure shows the bottom filler cracking point 1 and the bottom filler peeling point 2. Utility Model Content

[0003] The utility model aims to provide a chip with enhanced bottom filler bonding, a dicing process and an application thereof.

[0004] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0005] A dicing chip with enhanced bottom filler bonding comprises a wafer to be cut, wherein at least one shallow groove is provided on both sides of a cutting path of the wafer to be cut; the shallow groove is arranged between a retaining wall and the cutting path.

[0006] Preferably, the shallow groove has a depth greater than the thickness of the metal layer, and a groove width of 25-50 μm.

[0007] Preferably, the shallow groove has a depth of 10-30 μm.

[0008] Preferably, the distance between the shallow groove and the cutting road is not less than 6 μm.

[0009] Preferably, the shallow grooves are continuous or discontinuous.

[0010] Preferably, in any of the above-mentioned dicing processes for dicing chips with enhanced underfill bonding, shallow grooves are formed on both sides of the to-be-diced streets on the wafer to be diced by laser dicing, blade dicing or a combination of the two.

[0011] Preferably, any one of the above-described applications of a diced chip with enhanced underfill bonding is applied to a flip-chip soldered chip packaged with an underfill material or applied to a package with a risk of underfill cracking due to substrate warping.

[0012] The utility model has at least the following beneficial effects: the chip of the utility model can reduce the stress of the bottom filler, solve the problem of bottom filler cracking or peeling caused by package warping or other stress reasons, effectively reduce the risk of defects that may occur in the chip manufacturing process, improve operation quality and product yield, and improve reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0014] Figure 1 This is a schematic diagram of the structure of a defective product produced by the prior art.

[0015] Figure 2 for Figure 1 Schematic diagram of the physical structure of the fracture site under a partial FIB microscope.

[0016] Figure 3 for Figure 1 Schematic diagram of the solid structure at the partially peeled-off point.

[0017] Figure 4 This is a schematic diagram of the cutting structure of Example 1 of the utility model.

[0018] Figure 5 This is a schematic diagram of the structure of the packaged physical product according to Example 1 of the utility model.

[0019] Figure 6 This is a schematic diagram of the structure of Example 2 of the utility model.

[0020] Figure 7 This is a schematic diagram of the structure of Example 3 of the utility model.

[0021] Figure 8 This is a schematic diagram of the structure of Example 4 of the utility model. DETAILED DESCRIPTION

[0022] The utility model discloses a dicing chip with enhanced bottom filler bonding and a dicing method and application thereof. In order to make the purpose, technical solution and advantages of the utility model clearer, the following is combined with the attached Figure 4-8It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0023] Before the present invention is described, in order to better understand the present invention, it should be noted that the semiconductor cutting lanes and retaining walls mentioned in the text are well-known technical terms in the field of semiconductor packaging, wherein the cutting lane refers to the channel cut out on the wafer to separate the chips, and the retaining wall is called seal ring in English, also known as protection ring in Chinese, which is a safety barrier set up during chip design and manufacturing. The inside of the protection ring is the chip effective circuit area, and some cracks or other defects generated during the cutting process cannot cross the protection ring, otherwise the chip will be damaged and fail. It is called retaining wall in this article.

[0024] The utility model discloses a dicing chip with enhanced bottom filler bonding, including a wafer to be cut, at least one continuous or intermittent shallow groove 4 is provided on both sides of the cutting path of the wafer to be cut. The shallow groove 4 is arranged between the retaining wall 3 and the cutting path. In order to prevent the chip from being delaminated inside the metal layer, the groove depth of the shallow groove 4 is greater than the metal layer thickness of the chip. In this embodiment, the groove depth of the shallow groove 4 is 10-30μm to avoid the chip from breaking along the shallow groove due to excessive depth, or the depth is too shallow to enhance the bonding effect, and the groove width of the shallow groove 4 is 25-50μm. Sufficient margin is left between the shallow groove 4 and the cutting path to ensure the structural integrity and stability of the shallow groove 4, and the distance of the margin is not less than 6μm.

[0025] Furthermore, since the chips and the cutting paths are arranged in a periodic matrix, if the shallow grooves 4 on both sides are symmetrically arranged, it is more convenient for production and quality management. The shallow grooves 4 described in the utility model are usually provided with one on one side to meet the demand. When two shallow grooves 4 are provided on one side, in order to ensure the shape and structure of each shallow groove 4 are complete, a barrier of at least 6μm must be maintained between the two shallow grooves 4.

[0026] The utility model also discloses a dicing process for dicing chips with enhanced bottom filler as described above, wherein shallow grooves 4 are opened on both sides of the to-be-diced path on the wafer to be diced by laser dicing, blade dicing or a combination of the two.

[0027] Any of the above-mentioned diced chips with enhanced underfill bonding is applied to flip-chip chips packaged with underfill materials or is applied to a package with a risk of underfill cracking due to substrate warping.

[0028] The chip packaging of the utility model can effectively reduce the stress of the bottom filler, solve the problem of bottom filler cracking or peeling caused by warping of the package or other stress reasons, effectively reduce the defects and low reliability risks in the chip manufacturing process, improve the operation quality and product yield, and improve reliability. The main application principle is: the bottom filler is injected between the chip and the substrate by dispensing. Due to the capillary action of the liquid, the bottom filler will diffuse and fill the shallow groove. The bottom filler filled in the shallow groove will form an interface suction with the shallow groove wall. When the substrate is warped, the existence of the shallow groove interface suction will increase the bonding force between the chip and the bottom filler, and the bottom filler will form a reverse pulling force on the substrate, thereby improving the warping and reducing the risk of cracking or delamination due to deformation and pulling. Example

[0029] like Figure 4 As shown, this embodiment shows a dicing chip with enhanced bottom filler bonding, wherein the width of the dicing road between chip 1 and chip 2 is 180μm, and before the through-dicing, a continuous shallow groove 4 is cut by laser at a distance of 10μm from the dicing road retaining wall, the shallow groove 4 is 20μm deep and 20μm away from the through-groove, and then a through-groove is cut by combining laser and blade cutting to separate the chips, and then the obtained chips are packaged in the conventional steps required in the subsequent steps. Figure 5 As shown, the final packaged chip has no abnormal delamination and cracking of the filler. Example

[0030] like Figure 6 As shown, this embodiment shows a dicing chip with enhanced bottom filler bonding, wherein the width of the dicing road between chip 1 and chip 2 is 600μm, and two continuous shallow grooves are cut by laser at a distance of 8μm from the dicing road retaining wall before the through dicing, and the shallow groove 4 obtained has a depth of 20μm and a distance of 10μm from the through groove. Subsequently, the two through grooves are cut by combining laser and blade cutting to separate the chips, and then the obtained chips are packaged in the conventional steps required in the subsequent steps. Example

[0031] like Figure 7 As shown, this embodiment discloses a sawing chip with enhanced bottom filler bonding, wherein the width of the cutting path between chip 1 and chip 2 is 180um, and before the through-cutting, a discontinuous shallow groove 4 is cut by laser at a distance of 10um from the cutting path retaining wall, and then a through groove is cut by a combination of laser and blade cutting to separate the chips, and the depth of the shallow groove is 20um, and the distance from the through groove is 20um, and then the obtained chip is packaged in the conventional steps required for the subsequent steps. Example

[0032] like Figure 8As shown, this embodiment discloses a dicing chip with enhanced bottom filler bonding, wherein the width of the dicing path between chip 1 and chip 2 is 360um, and before the through dicing, two intermittent shallow grooves 4 are cut by laser at a distance of 10um from the dicing path retaining wall, and the depth of the shallow grooves is 20um, and the distance from the through groove is 20um. Then, a through groove is cut by combining laser and blade cutting to separate the chips, and then the obtained chips are packaged in the conventional steps required in the subsequent steps.

[0033] The chips in Examples 1 to 4 were packaged, and no bottom filler cracking or peeling occurred after final packaging.

[0034] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer" and the like indicating positions or positional relationships are based on the positions or positional relationships shown in the drawings, which are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0035] The above shows and describes the basic principle, main features and advantages of the utility model. Those skilled in the art should understand that the utility model is not limited by the above embodiments. The above embodiments and the specification only describe the principles of the utility model. The utility model may be subject to various changes and improvements without departing from the spirit and scope of the utility model. These changes and improvements fall within the scope of the utility model to be protected. The scope of protection claimed by the utility model is defined by the attached claims and their equivalents.

Claims

1. A diced chip with enhanced underfill bonding, characterized in that: The invention comprises a wafer to be cut, wherein at least one shallow groove is provided on both sides of a cutting path of the wafer to be cut; and the shallow groove is arranged between a retaining wall and the cutting path.

2. A diced chip with enhanced underfill bonding according to claim 1, characterized in that: The shallow groove has a depth greater than the thickness of the metal layer of the chip, and a groove width of 25-50 μm.

3. A diced chip with enhanced underfill bonding according to claim 1, characterized in that: The shallow groove has a depth of 10-30 μm.

4. The diced chip with enhanced underfill bonding according to claim 1, characterized in that: The distance between the shallow groove and the cutting road is not less than 6 μm.

5. The diced chip with enhanced underfill bonding according to claim 1, characterized in that: The shallow grooves are continuous or discontinuous.

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