Optocoupler driving circuit of stepping motor module of virtual simulation equipment
By designing the stepper motor module optocoupling drive circuit in a virtual simulation device, and using TLP521 and ULN2003 chips for optocoupling isolation, the high voltage and high current problems caused by back electromotive force are solved, the stability and reliability of the system are improved, and the protection of the system is protected. FPGA controls signal source.
Patent Information
- Application Number
- CN202323530456.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-22
- Publication Date
- 2025-01-07
- Estimated Expiration
- 2033-12-22
AI Technical Summary
In the prior art, high voltage and high current caused by the back electromotive force of the stepper motor will reversely enter the main control circuit, damage the control chip FPGA.
A virtual simulation device stepper motor module optocoupling drive circuit is designed, and the chip TLP521 and ULN2003 are used for optocoupling isolation. By connecting the input terminal resistor and the collector resistor, the FPGA control signal source is protected and the load interference signal is prevented.
It improves the stability of the stepper motor module of the virtual simulation equipment and the reliability of the control system, effectively prevents damage to the FPGA by high voltage and high current, and enhances the stability and safety of the entire stepper motor control system.
Smart Images
Figure CN222321391U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the field of virtual simulation equipment, and more specifically, to an optical coupling driving circuit of a stepping motor module of a virtual simulation equipment. Background Art
[0002] The virtual simulation device realizes the function of driving the stepper motor through the stepper motor module. The motor controls the working state through the driving signal. However, the high voltage and high current caused by the back electromotive force of the motor will reversely enter the main control circuit, thereby damaging the control chip FPGA. Utility Model Content
[0003] The technical problem to be solved by the utility model is that, in view of the technical defect in the prior art that the high voltage and large current caused by the back electromotive force of the motor will reversely enter the main control circuit, thereby damaging the control chip FPGA, a virtual simulation device stepper motor module optocoupler drive circuit is provided.
[0004] The utility model discloses a virtual simulation device stepper motor module optical coupler driving circuit, comprising a chip TLP521_4 and a chip ULN2003, wherein the 2nd, 4th, 6th and 8th pins of the TLP521_4 are used to connect the 4 control signal output ends of the FPGA in sequence, the 1st, 3rd, 5th and 5th pins of the TLP521_4 are respectively connected to one end of an input resistor, the other end of the input resistor is connected to a positive power supply, the 16th, 14th, 12th and 10th pins of the TLP521_4 are respectively connected to one end of a collector resistor, the other end of the collector resistor is connected to a positive power supply, the 15th, 13th, 11th and 09th pins of the TLP521_4 are connected to the 1st, 2nd, 3rd and 4th pins of the ULN2003, and the 16th, 15th, 14th and 13th pins of the ULN2003 are used to connect the input end of the stepper motor.
[0005] Preferably, in the optocoupler drive circuit of the virtual simulation device stepping motor module of the utility model, the input terminal resistance is 10KΩ.
[0006] Preferably, in the optocoupler drive circuit of the virtual simulation device stepping motor module of the utility model, the collector resistance is 10KΩ.
[0007] Preferably, in the optocoupler drive circuit of the virtual simulation device stepper motor module of the utility model, a 0.1 μF capacitor is connected in series between the 8th and 9th pins of ULN2003.
[0008] Preferably, in the optocoupler drive circuit of the virtual simulation device stepper motor module of the utility model, the FPGA is implemented using DE10_Standard.
[0009] Preferably, in the virtual simulation device stepper motor module optocoupler drive circuit of the utility model, the four control signal output ends correspond to the HSMC_CLKOUT_P2, HSMC_CLKOUT_N2, HSMC_CLKIN_P2, and HSMC_CLKIN_N2 pins of DE10_Standard respectively.
[0010] The optical coupler drive circuit of the virtual simulation device stepper motor module of the utility model improves the stability of the stepper motor module of the virtual simulation device through the optical coupler drive circuit, effectively protects the safety of the control signal source, and effectively prevents the interference of the load interference signal on the control signal source, thereby improving the stability and reliability of the entire stepper motor control system. The model of the FPGA of the utility model is DE10_Standard, and DE10_Standard has a rich interface for realizing other functions of the virtual simulation device, thereby realizing the sharing of FPGA. BRIEF DESCRIPTION OF THE DRAWINGS
[0011] The present invention will be further described below with reference to the accompanying drawings and embodiments, in which:
[0012] Figure 1 It is a principle diagram of an embodiment of an optocoupler drive circuit of a virtual simulation device stepping motor module of the utility model. DETAILED DESCRIPTION
[0013] In order to have a clearer understanding of the technical features, purposes and effects of the present utility model, the specific implementation methods of the present utility model are now described in detail with reference to the accompanying drawings.
[0014] refer to Figure 1 In the utility model, a virtual simulation device stepper motor module optocoupler drive circuit includes a chip TLP521_4 and a chip ULN2003, and the 2nd, 4th, 6th, and 8th pins of TLP521_4 are used to connect the 4 control signal output terminals of FPGA in sequence. In this embodiment, FPGA is implemented using DE10_Standard, and the 4 control signal output terminals correspond to the HSMC_CLKOUT_P2, HSMC_CLKOUT_N2, HSMC_CLKIN_P2, and HSMC_CLKIN_N2 pins of DE10_Standard, respectively. However, the utility model is not limited to the use of this type of FPGA, and other chips that can realize 4-way control, such as Xilinx Spartan-6, should be within the protection scope of the utility model.
[0015] The 1st, 3rd, 5th and 5th pins of TLP521_4 are respectively connected to one end of an input resistor R1, R2, R3 and R4, and the other end of the input resistor R1, R2, R3 and R4 is connected to the positive power supply. The 16th, 14th, 12th and 10th pins of TLP521_4 are respectively connected to one end of a collector resistor R5, R6, R7 and R8, and the other end of the collector resistor R5, R6, R7 and R8 is connected to the positive power supply. The 15th, 13th, 11th and 09th pins of TLP521_4 are connected to the 1st, 2nd, 3rd and 4th pins of ULN2003, and the 16th, 15th, 14th and 13th pins of ULN2003 are used to connect the input end of the stepper motor. In this embodiment, R1, R2, R3, R4, R5, R6, R7 and R8 are all the same size, which is 10KΩ. The size of the positive power supply can be set according to the working voltage required by the model of the motor to be driven.
[0016] A 0.1μF capacitor is connected in series between the 8th and 9th pins of ULN2003 to filter the power supply.
[0017] The working principle of the utility model is as follows: the 2nd, 4th, 6th and 8th pins of TLP521_4 are connected to the 4 control signal output terminals of FPGA, the FPGA control signal output terminal outputs the control signal, which is first processed by TLP521_4 and then output to the chip ULN2003, the chip ULN2003 drives the stepper motor to work, TLP521_4 performs optical coupling isolation on the stepper motor and the FPGA, and the optical coupling driving circuit improves the stability of the stepper motor module of the virtual simulation device, effectively protects the safety of the control signal source, and effectively prevents the interference of the load interference signal on the control signal source, thereby improving the stability and reliability of the entire stepper motor control system.
[0018] The embodiments of the utility model are described above in conjunction with the accompanying drawings, but the utility model is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the enlightenment of the utility model, ordinary technicians in this field can also make many forms without departing from the scope of protection of the utility model and the claims, which all fall within the protection of the utility model.
Claims
1. A virtual simulation device stepper motor module optocoupler drive circuit, characterized in that: It includes a chip TLP521_4 and a chip ULN2003. The 2nd, 4th, 6th and 8th pins of TLP521_4 are used to connect the four control signal output terminals of FPGA in sequence. The 1st, 3rd, 5th and 5th pins of TLP521_4 are respectively connected to one end of an input resistor, and the other end of the input resistor is connected to a positive power supply. The 16th, 14th, 12th and 10th pins of TLP521_4 are respectively connected to one end of a collector resistor, and the other end of the collector resistor is connected to a positive power supply. The 15th, 13th, 11th and 09th pins of TLP521_4 are connected to the 1st, 2nd, 3rd and 4th pins of ULN2003. The 16th, 15th, 14th and 13th pins of ULN2003 are used to connect the input terminal of a stepper motor.
2. The virtual simulation device stepper motor module optical coupler drive circuit according to claim 1, characterized in that: The input terminal resistance is 10KΩ.
3. The virtual simulation device stepper motor module optical coupler drive circuit according to claim 1, characterized in that: The collector resistance is 10KΩ.
4. The virtual simulation device stepper motor module optical coupler drive circuit according to claim 1, characterized in that: A 0.1μF capacitor is connected in series between the 8th and 9th pins of ULN2003.
5. The virtual simulation device stepper motor module optical coupler drive circuit according to claim 1, characterized in that: The FPGA is implemented using DE10_Standard.
6. The virtual simulation device stepper motor module optical coupler drive circuit according to claim 5, characterized in that: The four control signal output terminals correspond to the HSMC_CLKOUT_P2, HSMC_CLKOUT_N2, HSMC_CLKIN_P2, and HSMC_CLKIN_N2 pins of DE10_Standard respectively.