Overcurrent protection circuit

Abstract

The embodiment of the utility model provides an overcurrent protection circuit. In one specific embodiment, the overcurrent protection circuit comprises a power supply chip, an analog current monitor and a current detection resistor, according to the embodiment, during overcurrent, when the analog current monitor detects that the current passing through the two ends of the current detection resistor is larger than the preset current threshold value, the control output end of the analog current monitor continuously outputs a low-level signal so as to lower the voltage of the enabling end of the power supply chip, and the voltage output end of the power supply chip stops outputting the voltage; the power supply chip is directly stopped through the analog current monitor, and data monitoring, data comparison and data judgment are not required to be performed through data processing equipment such as a central processing unit, so that the response speed is high. Moreover, even if the overcurrent phenomenon disappears, the output end of the analog current monitor does not stop outputting the low-level signal, and the hiccup phenomenon caused by the recovery of the operation of the overcurrent protection circuit after the overcurrent phenomenon disappears is avoided.

Description

Technical Field

[0001] The present disclosure relates to the technical field of power supply detection, and more specifically, to an overcurrent protection circuit. Background Art

[0002] At present, most of the power supply overcurrent protection methods in the prior art adopt the method of connecting a current sensing resistor in series, connecting the two ends of the current sensing resistor to an amplifier, monitoring the voltage value of the amplifier output through a central processing unit and judging whether there is overcurrent, and sending a control instruction to the corresponding response unit through the central processing unit to cut off the output of the power supply after overcurrent occurs.

[0003] However, this method requires continuous monitoring of the voltage value of the amplifier and the need to perform overcurrent judgment in the central processing unit, generate power cut-off control instructions and output them to the response unit before the power output can be turned off. This method will continuously occupy system resources and affect the shutdown response time; and when overcurrent occurs, once the central processing unit is stuck or crashes, the power supply is not cut off in time, which will cause irreversible damage to the load product. Utility Model Content

[0004] The purpose of the present disclosure is to provide an overcurrent protection circuit that responds quickly when there is an overcurrent, so as to solve at least one of the problems existing in the prior art.

[0005] In order to achieve the above objectives, the present invention adopts the following technical solutions:

[0006] A first aspect of the present disclosure provides an overcurrent protection circuit, including a power chip, an analog current monitor, and a current sensing resistor;

[0007] The voltage input terminal of the power chip is connected to the external voltage access terminal;

[0008] The first end of the current detection resistor, the first input end of the analog current monitor and the voltage output end of the power chip are respectively coupled to a first node;

[0009] The second end of the current sensing resistor is connected to a load;

[0010] The second input terminal of the analog current monitor is connected to the second end of the current detection resistor; the control output terminal of the analog current monitor is connected to the enable terminal of the power chip;

[0011] The analog current monitor is used to output a low level signal through the control output terminal when the current of the current sensing resistor is monitored to be greater than a preset current threshold.

[0012] Furthermore, the analog current monitor also includes a reset terminal, and the reset terminal is connected to an external reset signal access terminal.

[0013] Furthermore, the external reset signal access terminal is a general input and output terminal.

[0014] Furthermore, the analog current monitor also includes a current threshold setting terminal for receiving a preset current threshold signal.

[0015] Furthermore, the overcurrent protection circuit also includes a pull-down resistor, a first end of the pull-down resistor is connected to the current threshold setting end, and a second end is grounded.

[0016] Furthermore, the power chip also includes a feedback input terminal for receiving a feedback voltage signal.

[0017] Furthermore, the overcurrent protection circuit also includes a first feedback resistor and a second feedback resistor, the first end of the first feedback resistor and the second end of the current sensing resistor are respectively coupled to the load at a second node, the second end of the first feedback resistor, the first end of the second feedback resistor and the feedback input end are coupled to a third node, and the second end of the second feedback resistor is grounded.

[0018] Furthermore, the overcurrent protection circuit also includes a first pull-up resistor, the external voltage access terminal, the voltage input terminal and the first end of the first pull-up resistor are coupled to a fourth node, and the second end of the first pull-up resistor, the enable terminal and the control output terminal are coupled to a fifth node.

[0019] Furthermore, the overcurrent protection circuit also includes a second pull-up resistor, a first end of the second pull-up resistor is connected to the external timing signal access end, and a second end of the second pull-up resistor, the enable end and the control output end are coupled to a sixth node.

[0020] Furthermore, the external timing signal access terminal is a general input and output terminal.

[0021] The beneficial effects of the present disclosure are as follows:

[0022] When overcurrent occurs, when the analog current monitor detects that the current passing through the two ends of the current sensing resistor is greater than the preset current threshold, a low-level signal is continuously output through the control output terminal of the analog current monitor to lower the voltage of the enable terminal of the power chip, and the voltage output terminal of the power chip stops outputting voltage. The present invention directly stops the power chip through the analog current monitor, and there is no need to perform data monitoring, data comparison and data judgment through data processing equipment such as a central processing unit, so the response speed is fast.

[0023] At the same time, after overcurrent occurs and the control output end of the analog current monitor continues to output a low-level signal, even if the overcurrent phenomenon disappears, the output end of the analog current monitor will not stop outputting the low-level signal, thereby avoiding the hiccup phenomenon caused by the overcurrent protection circuit resuming operation after the overcurrent phenomenon disappears. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The specific implementation methods of the present disclosure are further described in detail below with reference to the accompanying drawings.

[0025] Figure 1 A schematic structural diagram of an overcurrent protection circuit provided by an embodiment of the present disclosure is shown.

[0026] Figure 2 A schematic diagram of the structure of a reset terminal of an analog current monitor provided by an embodiment of the present disclosure is shown.

[0027] Figure 3 A schematic diagram of the structure of a current threshold setting terminal of an analog current monitor provided by an embodiment of the present disclosure is shown.

[0028] Figure 4 A schematic structural diagram of a feedback input terminal of a power chip provided by an embodiment of the present disclosure is shown.

[0029] Figure 5 A schematic structural diagram of an overcurrent protection circuit without timing requirements provided by an embodiment of the present disclosure is shown.

[0030] Figure 6 A schematic diagram of the structure of an overcurrent protection circuit with timing requirements provided by an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0031] In order to more clearly illustrate the present disclosure, the present disclosure is further described below in conjunction with the embodiments and drawings. Similar components in the drawings are represented by the same reference numerals. It should be understood by those skilled in the art that the content described below is illustrative rather than restrictive, and should not be used to limit the scope of protection of the present disclosure.

[0032] Example 1

[0033] In view of this, if Figure 1 As shown, an embodiment of the present disclosure provides an overcurrent protection circuit, including a power chip, an analog current monitor and a current sensing resistor Rsense;

[0034] The voltage input terminal Vin of the power chip is connected to the external voltage access terminal;

[0035] The first terminal in+ of the current sensing resistor Rsense, the first input terminal of the analog current monitor and the voltage output terminal Vout of the power chip are respectively coupled to a first node A;

[0036] The second end in- of the current sensing resistor Rsense is connected to a load Rload;

[0037] The second input terminal of the analog current monitor is connected to the second terminal in- of the current sensing resistor Rsense; the control output terminal Alert of the analog current monitor is connected to the enable terminal EN of the power chip;

[0038] The analog current monitor is used to output a low level signal through the control output terminal Alert when the current of the current sensing resistor Rsense is monitored to be greater than a preset current threshold.

[0039] Exemplarily, in the present disclosure, the model of the analog current monitor is preferably INA301.

[0040] The INA301 chip is suitable for a variety of application scenarios. It has a high-precision amplifier that can provide high-precision voltage or current signal monitoring, and adopts a low-noise circuit design, which can effectively reduce noise interference and improve the signal-to-noise ratio. The chip has a wide common-mode input range, which can adapt to different input signal ranges and improve the adaptability of the signal. The differential input and output design can effectively suppress common-mode interference and improve the anti-interference ability of the signal. In addition, the chip has good temperature stability and can maintain stable performance under different temperature environments.

[0041] When overcurrent occurs, when the analog current monitor detects that the current passing through the two ends of the current sensing resistor Rsense is greater than the preset current threshold, a low-level signal is continuously output through the control output terminal Alert of the analog current monitor to lower the voltage of the enable terminal EN of the power chip, and the voltage output terminal Vout of the power chip stops outputting voltage; the present invention directly stops the power chip through the analog current monitor, and there is no need to perform data monitoring, data comparison and data judgment through data processing equipment such as a central processing unit, so the response speed is fast.

[0042] At the same time, after overcurrent occurs and the control output terminal Alert of the analog current monitor continues to output a low-level signal, even if the overcurrent phenomenon disappears, the output terminal of the analog current monitor will not stop outputting the low-level signal, thereby avoiding the hiccup phenomenon caused by the overcurrent protection circuit resuming operation after the overcurrent phenomenon disappears.

[0043] More specifically, a power chip (power IC) is an integrated circuit with integrated power management functions, which is mainly used to manage the power supply of the device, including voltage regulation, current control, power status management, etc.

[0044] The power chip is at least one of a switching power chip, a linear power chip, a charging management chip, a power management unit (PMU) and a battery management chip; wherein,

[0045] Switching power supply chip: used to convert the input DC voltage into the required DC voltage and control its switching state to achieve voltage stabilization or adjust the output voltage.

[0046] Linear power chip: controls the stability of the output voltage by adjusting the voltage difference between input and output, with lower ripple and noise interference.

[0047] Charging management chip: used to manage the charging process, with overcharge protection, over-discharge protection, over-current protection and other functions, which can ensure the safety of the battery and the stability of charging.

[0048] Power Management Unit (PMU): Integrates multiple power management functions, such as voltage regulation, current regulation, over-current protection, etc., to achieve efficient power management.

[0049] Battery management chip: used to monitor the battery's power, temperature, charging status, etc. to ensure battery safety and extend its service life.

[0050] In one possible implementation, Figure 2 As shown, the analog current monitor also includes a reset terminal Reset, and the reset terminal Reset is connected to an external reset signal access terminal. The external reset signal access terminal is a general purpose input output (GPIO). In the general purpose input / output interface, each pin can be configured as an input or output mode, and reads or outputs high or low level signals as needed.

[0051] A reset signal IO1 is sent to the reset terminal Reset through the external reset signal access terminal so that the analog current monitor stops outputting a low level signal.

[0052] In one possible implementation, Figure 3 As shown, the analog current monitor also includes a current threshold setting terminal lim for receiving a preset current threshold signal;

[0053] The overcurrent protection circuit further comprises a pull-down resistor Rlim, wherein a first end of the pull-down resistor Rlim is connected to the current threshold setting end lim, and a second end is grounded. The resistance value of the pull-down resistor Rlim is set to set the preset current threshold value in the analog current monitor.

[0054] In one possible implementation, Figure 4 As shown, the power supply chip also includes a feedback input terminal FB for receiving a feedback voltage signal, and the overcurrent protection circuit also includes a first feedback resistor R1 and a second feedback resistor R2, the first end of the first feedback resistor R1, the second end in- of the current sensing resistor Rsense and the load Rload are respectively coupled to a first node B, the second end of the first feedback resistor R1, the first end of the second feedback resistor R2 and the feedback input terminal FB are coupled to a third node C, and the second end of the second feedback resistor R2 is grounded.

[0055] Specifically, under normal circumstances, the voltage output by the analog current monitor is the rated voltage of the load Rload, and the current sensing resistor Rsense is often connected in series between the first feedback resistor R1 and the load Rload, which results in the "actual load Rload" of the power chip being the current sensing resistor Rsense and the load Rload connected in series, and the voltage output by the power chip is simultaneously divided to the current sensing resistor Rsense and the load Rload. The voltage division of the current sensing resistor Rsense results in the voltage divided by the load Rload being lower than the rated value, causing a large deviation in the actual voltage output by the analog current monitor to the load Rload. Therefore, the present disclosure connects the current sensing resistor Rsense in series between the voltage output terminal Vout of the power chip and the first feedback resistor R1, so that the power chip can automatically compensate for the voltage drop caused by the series connection of the current sensing resistor Rsense according to the voltage value fed back by the second feedback resistor R2, thereby improving the output voltage accuracy of the power chip output to the load Rload.

[0056] In one possible implementation, Figure 5 As shown, the overcurrent protection circuit also includes a first pull-up resistor Rpu, the external voltage access terminal, the voltage input terminal Vin and the first end of the first pull-up resistor Rpu are coupled to a fourth node D, and the second end of the first pull-up resistor Rpu, the enable terminal EN and the control output terminal Alert are coupled to a fifth node E.

[0057] Specifically, the power chip in the present disclosure includes at least an error amplifier and a power management chip. When the current sensing resistor Rsense is connected in series between the voltage output terminal Vout of the power chip and the first feedback resistor R1, the voltage across the second feedback resistor R2 drops, and the error amplifier outputs the difference between the voltage across the second feedback resistor R2R2 and the reference voltage of the power management chip. When the absolute value of the difference is greater than the preset difference threshold, the power management chip increases the voltage value of the voltage output terminal Vout, and the voltage across the second feedback resistor R2 increases until the absolute value of the above difference is less than the preset difference threshold; therefore, the power management chip automatically compensates for the voltage drop caused by the current sensing resistor Rsense.

[0058] Connecting the current threshold setting pin of the analog current monitor to the pull-down resistor Rlim can set the desired preset current threshold of the analog current monitor. The analog current monitor detects the voltage across the current sensing resistor Rsense. Once an overcurrent occurs, the voltage across the current sensing resistor Rsense rises rapidly. The analog current monitor can output a low-level signal to the enable terminal EN of the power chip within 1us to 2us to pull down the voltage of the enable terminal EN pin to 0V, thereby stopping the power chip from outputting voltage and realizing hardware overcurrent protection. Once an overcurrent occurs, the control output terminal Alert of the analog current monitor will continue to output a low voltage, and will not recover even if the overcurrent disappears. This avoids the hiccup caused by the disappearance of the overcurrent during traditional overcurrent protection and the power supply re-outputting voltage. Of course, the state of the analog current monitor can be restored by turning off the power supply of the entire system and powering it on again, or by inputting a reset signal IO1 to the reset terminal Reset to reset the control analog current monitor so that its control output terminal Alert stops outputting a low-level voltage. The purpose of the first pull-up resistor Rpu is to give the enable terminal EN of the power chip a default pull-up state, so that the power chip can work reliably at the beginning.

[0059] Example 2

[0060] This embodiment is similar to the embodiment 1, except that Figure 6 As shown, the overcurrent protection circuit further includes a second pull-up resistor Ren, a first end of the second pull-up resistor Ren is connected to the external timing signal access terminal, and a second end of the second pull-up resistor Ren, the enable terminal EN and the control output terminal Alert are coupled to a sixth node F. The external timing signal access terminal is a general input and output terminal.

[0061] The timing control signal IO2 is sent out through the external timing signal input terminal. When the timing control signal IO2 is at a high level, the enable terminal EN of the power chip is at a high level state; the voltage output terminal Vout of the power chip outputs voltage normally.

[0062] When the timing control signal IO2 is at a low level, the enable terminal EN of the power chip is at a low level state, and the output terminal of the power chip stops outputting voltage.

[0063] This embodiment is to enable the power chip to output a voltage with a timing sequence, and the timing sequence of the power chip output voltage can be controlled by controlling the time proportion of the high level signal and the low level signal in the timing control signal IO2.

[0064] In the description of the present utility model, it should be noted that the terms "upper", "lower", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present utility model. Unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be a connection between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to the specific circumstances.

[0065] It should also be noted that, in the description of the present utility model, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the elements.

[0066] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the implementation methods of the present invention. For ordinary technicians in this field, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the implementation methods here. All obvious changes or modifications derived from the technical solution of the present invention are still within the scope of protection of the present invention.

Claims

1. An overcurrent protection circuit, characterized in that: Including power chip, analog current monitor and current detection resistor; The voltage input terminal of the power chip is connected to the external voltage access terminal; The first end of the current detection resistor, the first input end of the analog current monitor and the voltage output end of the power chip are respectively coupled to a first node; The second end of the current sensing resistor is connected to a load; The second input terminal of the analog current monitor is connected to the second end of the current detection resistor; the control output terminal of the analog current monitor is connected to the enable terminal of the power chip; The analog current monitor is used to output a low level signal through the control output terminal when the current of the current sensing resistor is monitored to be greater than a preset current threshold.

2. The overcurrent protection circuit according to claim 1, characterized in that: The analog current monitor further includes a reset terminal connected to an external reset signal access terminal.

3. The overcurrent protection circuit according to claim 2, characterized in that: The external reset signal access terminal is a general input and output terminal.

4. The overcurrent protection circuit according to claim 1, characterized in that: The analog current monitor further includes a current threshold setting terminal for receiving a preset current threshold signal.

5. The overcurrent protection circuit according to claim 4, characterized in that: The overcurrent protection circuit further includes a pull-down resistor, a first end of the pull-down resistor is connected to the current threshold setting end, and a second end of the pull-down resistor is grounded.

6. The overcurrent protection circuit according to claim 1, characterized in that: The power chip also includes a feedback input terminal for receiving a feedback voltage signal.

7. The overcurrent protection circuit according to claim 6, characterized in that: The overcurrent protection circuit also includes a first feedback resistor and a second feedback resistor, the first end of the first feedback resistor and the second end of the current sensing resistor are respectively coupled to the load at a second node, the second end of the first feedback resistor, the first end of the second feedback resistor and the feedback input end are coupled to a third node, and the second end of the second feedback resistor is grounded.

8. The overcurrent protection circuit according to claim 1, characterized in that: The overcurrent protection circuit also includes a first pull-up resistor, the external voltage access terminal, the voltage input terminal and the first end of the first pull-up resistor are coupled to a fourth node, and the second end of the first pull-up resistor, the enable terminal and the control output terminal are coupled to a fifth node.

9. The overcurrent protection circuit according to claim 1, characterized in that: The overcurrent protection circuit also includes a second pull-up resistor, a first end of the second pull-up resistor is connected to the external timing signal access end, and a second end of the second pull-up resistor, the enable end and the control output end are coupled to a sixth node.

10. The overcurrent protection circuit according to claim 9, characterized in that: The external timing signal access terminal is a general input and output terminal.

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