N-type double-sided tunneling solar cell structure

Abstract

The utility model relates to an N-type double-sided tunneling solar cell structure, which comprises an N-type silicon substrate, a PN emitter junction layer is arranged on the front surface of the N-type silicon substrate, a first tunneling layer is arranged on the surface of the PN emitter junction layer, and a second tunneling layer is arranged on the surface of the first tunneling layer. The surface of the first tunneling layer is provided with at least one first doped polycrystalline silicon layer, the surface of the outermost first doped polycrystalline silicon layer is provided with a passivation layer, and the surface of the passivation layer is provided with a first antireflection layer; a second tunneling layer is arranged on the back face of the N-type silicon substrate, at least one second doped polycrystalline silicon layer is arranged on the surface of the second tunneling layer, and a second antireflection layer is arranged on the surface of the second doped polycrystalline silicon layer on the outermost side. The utility model reduces the slurry consumption, improves the reliability and reduces the production cost.

Description

Technical Field

[0001] The utility model relates to the technical field of solar cell components, in particular to an N-type double-sided tunneling solar cell structure. Background Art

[0002] With the widespread application of solar energy, the solar photovoltaic panel industry has also flourished. During the production of traditional solar panels, due to the characteristics of the cell structure, multiple cells and welding strips need to be welded into a cell string, and then the cell string and other components are assembled into one. Since each cell is provided with a welding strip, the illumination area of ​​the cell is greatly reduced, thereby reducing the effective power generation area; furthermore, there is also a gap between the cells in the series-connected cell string, which also reduces the illumination area or power generation area; the above two reasons lead to low power generation efficiency of the cell.

[0003] The theoretical conversion efficiency limit of P-type PERC monocrystalline silicon cells is 24.5%. The current mass production efficiency of P-type monocrystalline silicon PERC cells has reached about 23.3%. Its industrial mass production efficiency is close to the theoretical limit, and it is difficult to significantly improve it. In addition, the light attenuation caused by the boron-oxygen pair of P-type silicon wafers has not been completely solved, making it difficult for P-type crystalline silicon cells to improve their efficiency. Because the minority carriers of P-type cells are electrons, and the minority carriers of N-type cells are holes, the impurities in silicon wafers capture electrons much more than holes. Under the same metal impurity pollution, the surface recombination rate of N-type cells is low, and the minority carrier lifetime is 1-2 orders of magnitude higher than that of P-type cells, which can greatly improve the open circuit voltage of the battery, and the conversion efficiency is higher. The resistivity of N-type silicon wafers is more uniform, the high-efficiency part of the battery output accounts for a larger proportion, and the mechanical bending resistance is better, which can achieve thinner silicon wafers.

[0004] The N-type cell silicon wafer substrate is doped with phosphorus, and the boron content in the crystalline silicon is low. The light-induced attenuation caused by the boron-oxygen pair is low and close to zero, with an attenuation of less than 1% in the first year, which is lower than the 2% attenuation of the P-type product. The temperature coefficient of the N-type cell is as low as -(0.26~0.3)% / degree, which is lower than the 0.35% / degree of the P-type cell, reducing the power drop caused by the operating temperature. The actual average operating temperature of the outdoor components is about 0.5 degrees lower, and the power generation is more prominent in high temperature environments. The N-type cell has a good response to weak light, and the irradiance is less than 400W / m in the morning and evening or on rainy days. 2It can still generate electricity under the conditions of . Compared with the 70% bifaciality of P-type PERC cells, the bifaciality of N-type cells is as high as 85%, which brings about 3% power generation gain to end customers for free under the conditions of average ground reflectivity in standard environments. N-type high-efficiency cell technology has received increasing attention and recognition from the industry due to its high conversion efficiency, low temperature coefficient, and low attenuation of PID, LID, and LeTID. Therefore, the replacement of P-type cells by N-type cells has become the current trend of the industry and a technical solution, but its application and production still have the following problems:

[0005] (1) Currently, the emitter of N-type TOPCON requires silver paste to achieve the electrical performance required for industrial mass production. Since silver paste is required on both sides, the unit consumption is greater than that of PERC. The average amount of paste used per watt is 13-15mg / Wp, while that of PERC is 9-10mg / Wp.

[0006] (2) The current cost reduction and efficiency improvement measures in the industry generally adopt the MBB solution to achieve efficiency improvement and cost reduction. However, as the number of BBs increases, the difficulty of screen printing increases, and the efficiency improvement also reaches a turning point; the precision of the string welding equipment is increased, and thinner copper wires and more BBs are required; the BB number is generally between 12BB and 18BB, and the thinnest round copper wire diameter must be at least >0.2mm.

[0007] The above unfavorable factors have hindered the application and development of N-type high-efficiency battery technology to a certain extent. Utility Model Content

[0008] The purpose of the utility model is to overcome the above-mentioned shortcomings and provide an N-type double-sided tunneling solar cell structure to improve reliability and reduce production costs.

[0009] The purpose of the utility model is achieved as follows: an N-type double-sided tunneling solar cell structure, which includes an N-type silicon substrate, a PN emission junction layer is provided on the front side of the N-type silicon substrate, a first tunneling layer is provided on the surface of the PN emission junction layer, at least one first doped polysilicon layer is provided on the surface of the first tunneling layer, a passivation layer is provided on the surface of the first doped polysilicon layer, and a first anti-reflection layer is provided on the surface of the passivation layer; a second tunneling layer is provided on the back side of the N-type silicon substrate, at least one second doped polysilicon layer is provided on the surface of the second tunneling layer, and a second anti-reflection layer is provided on the surface of the second doped polysilicon layer.

[0010] Furthermore, a plurality of first fine grid lines are disposed on the outer side of the first anti-reflection layer, and a plurality of second fine grid lines are disposed on the outer side of the second anti-reflection layer.

[0011] Furthermore, the first tunneling layer and the second tunneling layer are SiO2 tunneling layers.

[0012] Furthermore, the passivation layer is an aluminum oxide passivation layer.

[0013] A battery assembly of an N-type double-sided tunneling solar cell structure comprises a plurality of battery strings connected in series and parallel, wherein the battery strings comprise a first carrier film, a second carrier film, a low-temperature interconnection tape and a group of battery cells arranged side by side, wherein the battery cells adopt the above-mentioned solar cell structure, and low-temperature interconnection tapes are used to weld the front and back sides of two adjacent battery cells in an alternating manner; the front side of the battery cells is provided with a first carrier film, and the back side of the battery cells is provided with a second carrier film, and the low-temperature interconnection tapes are bonded to form battery strings in sequence through the first carrier film and the second carrier film; busbars are provided between the battery strings to connect and converge, so as to form a battery string array.

[0014] Furthermore, a first adhesive film is arranged on the front side of the battery string array, and a front plate is arranged through the first adhesive film; a second adhesive film is arranged on the back side of the battery string array, and a back plate is arranged through the second adhesive film.

[0015] Furthermore, a split junction box is provided on the back panel.

[0016] Furthermore, the long edges of the battery string array are packaged with long frames, and the short edges of the battery string array are packaged with short frames.

[0017] Furthermore, the low-temperature interconnection belt adopts a low-temperature alloy copper wire interconnection material.

[0018] Compared with the prior art, the beneficial effects of the utility model are:

[0019] The utility model uses a half-cell busbar-free TOPCON battery with a low silver consumption metallization process technology. Since there is no busbar, there will be no additional optical loss caused by the positioning offset of the round welding wire and the busbar. The number of round copper wires (thin grid wires) is increased, the distance is reduced, the current transmission channel is shortened, and the electrical loss is reduced. The efficiency of the product is improved in many aspects, the packaging loss from the battery to the component end is reduced, the power per unit area is higher, and the product cost is lower.

[0020] The utility model adopts no PAD point and evenly distributes thinner round copper wire, making the appearance more beautiful and the reflectivity of the welding strip lower. The utility model optimizes the cost, reduces the amount of silver paste, thins the silicon wafer, reduces the weight of the film, reduces emissions and costs in the manufacturing process, and the overall cost is lower than the conventional one. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic structural diagram of an N-type double-sided tunneling solar cell structure of the present utility model.

[0022] Figure 2It is a schematic diagram of the structure of an N-type double-sided tunneling solar cell of the present invention.

[0023] Figure 3 It is a structural schematic diagram of a battery string of the present utility model.

[0024] Figure 4 It is a schematic diagram of the stacking structure of the battery assembly of the present utility model.

[0025] Figure 5 It is a schematic diagram of the laminate structure of the battery assembly of the utility model.

[0026] Figure 6 This is a schematic diagram of the general assembly of the battery assembly of the present utility model.

[0027] Figure 7 for Figure 6 A partial enlarged view of point A.

[0028] in:

[0029] N-type silicon substrate 1, PN emitter junction layer 2, first tunneling layer 3, first doped polysilicon layer 4, second tunneling layer 5, second doped polysilicon layer 6, passivation layer 7, first anti-reflection layer 8, second anti-reflection layer 9, first fine grid line 10, second fine grid line 11, first carrier film 12.1, second carrier film 12.2, low-temperature interconnection belt 13, battery cell 14, first adhesive film 15.1, second adhesive film 15.2, front plate 16.1, back plate 16.2, battery string 17, split junction box 18, short frame 19.1, long frame 19.2, busbar 20. DETAILED DESCRIPTION Example 1

[0030] See also Figure 1-2 The utility model relates to an N-type double-sided tunneling solar cell structure, which comprises an N-type silicon substrate 1, a PN emission junction layer 2 is provided on the front side (light-receiving side) of the N-type silicon substrate 1, a first tunneling layer 3 is provided on the surface of the PN emission junction layer 2, a first tunneling layer 3 is provided on the surface of the first tunneling layer 3 with at least one first doped polysilicon layer 4, a passivation layer 7 is provided on the surface of the outermost first doped polysilicon layer 4, a first anti-reflection layer 8 is provided on the surface of the passivation layer 7; a second tunneling layer 5 is provided on the back side of the N-type silicon substrate 1, a second tunneling layer 5 is provided on the surface of at least one second doped polysilicon layer 6, a second anti-reflection layer 9 is provided on the surface of the outermost second doped polysilicon layer 6.

[0031] A plurality of first fine grid lines 10 are provided on the outer side of the first anti-reflection layer 8, and a plurality of second fine grid lines 11 are provided on the outer side of the second anti-reflection layer 9; the fine grid lines are respectively printed on the corresponding anti-reflection layers, and after screen printing, they are sintered to penetrate the anti-reflection passivation layer to form ohmic contact with the polysilicon layer, and after sintering and light injection, the light-receiving surface of the battery is finally subjected to laser and reverse bias assisted sintering.

[0032] The first tunneling layer 3 and the second tunneling layer 5 are SiO2 tunneling layers; the passivation layer 7 is an aluminum oxide passivation layer; and the first doped polysilicon layer 4 is an n+ polysilicon film.

[0033] See also Figure 3-7 The utility model relates to a battery assembly of an N-type double-sided tunneling solar cell structure, which includes a plurality of battery strings 17 connected in series and parallel, wherein the battery string 17 includes a first carrier film 12.1, a second carrier film 12.2, a low-temperature interconnection belt 13 and a group of battery cells 14 arranged side by side, wherein the battery cells 14 adopt the above-mentioned solar cell structure, and the low-temperature interconnection belt 13 is used between two adjacent battery cells 14 to achieve the alternating connection between positive and negative electrodes, that is, the two ends of the low-temperature interconnection belt 13 are respectively connected to the light-receiving surface of one battery cell and the backlight surface of the next battery cell.

[0034] The front side of the battery cell 14 is provided with a first carrier film 12.1, and the back side of the battery cell 14 is provided with a second carrier film 12.2. The battery cells 14 are bonded together by the first carrier film 12.1, the second carrier film 12.2 and the low-temperature interconnect tape 13, and the battery cells 14 are bonded into battery strings 17 in sequence.

[0035] A busbar 20 is arranged between the battery strings 17 to connect and bus together to form a battery string array. A first adhesive film 15.1 is arranged on the front of the battery string array, and a front plate 16.1 is arranged through the first adhesive film 15.1. A second adhesive film 15.2 is arranged on the back of the battery string array, and a back plate 16.2 is arranged through the second adhesive film 15.2.

[0036] A plurality of split junction boxes 18 are disposed on the back plate 16 . 2 .

[0037] The long edge of the battery string array is packaged with a long frame 19.2, and the short edge of the battery string array is packaged with a short frame 19.1.

[0038] The low-temperature interconnection belt 13 is made of low-temperature alloy copper wire interconnection material.

[0039] In this embodiment, several battery strings are connected in series and parallel through a busbar, and then moved to the front plate where the first adhesive film is placed in advance for layout. The second adhesive film and the back plate are then laid out and stacked in sequence for packaging, and finally a junction box and a frame are installed.

[0040] An N-type double-sided tunneling solar cell structure of this embodiment has the following performances:

[0041] (1) This embodiment uses a pre-cut half-sheet busbar-free Topcon battery with low silver consumption metallization technology. The current SMBB silver paste usage per watt is about 12g / W, and 0BB can reduce 8g / W, reducing the cost by 30%. Pre-cutting half the sheet reduces the electrical loss caused by laser cutting, and the power loss is low.

[0042] (2) This embodiment uses 0BB batteries, so thinner silicon wafers can be used. The thickness of the current mainstream silicon wafers is generally 130um, and the thickness of the silicon wafers in this embodiment can be reduced to 100um.

[0043] (3) This embodiment uses 0BB batteries, which have a higher bifaciality. Compared with 75% of P-type batteries, the bifaciality of this embodiment is increased to 85%.

[0044] (4) This embodiment uses low-temperature alloy copper wire interconnection material, the number is greater than 20, and the diameter of the round copper wire is ≤0.2 mm; there is no high-temperature welding, the stress is smaller, and the low-temperature alloy coated interconnection tape is lead-free, low-carbon and environmentally friendly.

[0045] (5) This embodiment adopts a film bonding process, which has better resistance to environmental temperature and humidity, high reliability, and does not require flux for welding, which reduces costs and is more environmentally friendly.

[0046] (6) The OBB battery of this embodiment does not have a main grid, so there will be no additional optical loss caused by the positioning offset between the round welding wire and the main grid. The denser the number of round copper wires, the shorter the transmission distance of photogenerated carriers, the lower the electrical loss, and the higher the product power.

[0047] (7) The low-temperature circular interconnecting ribbon used in the 0BB of this embodiment has a thinner diameter and a denser number, which has a stronger current collection capability and reduces the attenuation caused by hidden cracks.

[0048] (8) This embodiment uses thinner solder strips and thinner silicon wafers, and the weight of the adhesive film used is reduced from 430g of SMBB battery to less than 300g, reducing the cost by more than 30%.

[0049] (9) The packaging process of the 0BB photovoltaic module of this embodiment is carried out at a low temperature of about 150 degrees, the process carbon value is high, and the manufacturing cost is lower.

[0050] (10) The PAD point on the surface of the OBB battery in this embodiment is also removed. In addition, the thinner the solder strip, the lower the reflectivity at the joint strip. The denser the solder strip, the better the appearance uniformity, and the aesthetics of the product is also improved.

[0051] The above aspects reduce the packaging loss from the cell to the component end. The CTM of the photovoltaic module of this embodiment is increased to more than 101% (double-sided coated glass 0.5%, lossless pre-cut half-piece 0.2%, 0BB interconnection technology 1%, adhesive film light transfer 0.3%, reflective film 0.3%), higher power per unit area, lower product cost; better product reliability, first-year attenuation ≤1%, linear annual attenuation <0.4%.

[0052] The above are only specific application examples of the utility model, and do not constitute any limitation on the protection scope of the utility model. Any technical solution formed by equivalent transformation or equivalent replacement falls within the protection scope of the utility model.

Claims

1. An N-type double-sided tunneling solar cell structure, characterized in that: It comprises an N-type silicon substrate (1), wherein a PN emission junction layer (2) is provided on the front side of the N-type silicon substrate (1), a first tunneling layer (3) is provided on the surface of the PN emission junction layer (2), a first doped polysilicon layer (4) of not less than one layer is provided on the surface of the first tunneling layer (3), a passivation layer (7) is provided on the surface of the outermost first doped polysilicon layer (4), and a first anti-reflection layer (8) is provided on the surface of the passivation layer (7); a second tunneling layer (5) is provided on the back side of the N-type silicon substrate (1), a second doped polysilicon layer (6) of not less than one layer is provided on the surface of the second tunneling layer (5), and a second anti-reflection layer (9) is provided on the surface of the outermost second doped polysilicon layer (6); a plurality of first fine grid lines (10) are provided on the outer side of the first anti-reflection layer (8); and a plurality of second fine grid lines (11) are provided on the outer side of the second anti-reflection layer (9).

2. The N-type double-sided tunneling solar cell structure according to claim 1, characterized in that: The first tunneling layer (3) and the second tunneling layer (5) are SiO2 tunneling layers.

3. The N-type double-sided tunneling solar cell structure according to claim 1, characterized in that: The passivation layer (7) is an aluminum oxide passivation layer.

4. The N-type double-sided tunneling solar cell structure according to claim 1, characterized in that: The N-type silicon substrate (1), the PN emission junction layer (2), the first tunneling layer (3), the first doped polysilicon layer (4), the second tunneling layer (5), the second doped polysilicon layer (6), the passivation layer (7), the first anti-reflection layer (8) and the second anti-reflection layer (9) constitute a cell (14); the PN emission junction layer (2) is formed on the front side of the N-type silicon substrate (1); the first tunneling layer (3), the first doped polysilicon layer (4), the passivation layer (7) and the first anti-reflection layer (8) are sequentially formed on the PN emission junction layer (2); the second tunneling layer (5), the second doped polysilicon layer (6) and the second anti-reflection layer (9) are sequentially formed on the back side of the N-type silicon substrate (1); and two adjacent cell slices (14) are welded in an alternating manner on the front and back sides using a low-temperature interconnection ribbon (13).

5. The N-type double-sided tunneling solar cell structure according to claim 4, characterized in that: The front side of the battery cell (14) is provided with a first carrier film (12.1), the back side of the battery cell (14) is provided with a second carrier film (12.2), the battery cell (14) is bonded together via the first carrier film (12.1), the second carrier film (12.2) and the low-temperature interconnection tape (13), and the battery cells (14) are bonded together in sequence to form battery strings (17); busbars (20) are provided between the battery strings (17) to connect and converge, forming a battery string array.

6. The N-type double-sided tunneling solar cell structure according to claim 4, characterized in that: The low-temperature interconnection belt (13) is made of low-temperature alloy copper wire interconnection material.

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