Semiconductor chip convenient for packaging detection

Abstract

The utility model provides a semiconductor chip convenient for packaging detection. The semiconductor chip comprises a bonding pad part used for heat dissipation and electrical connection and a packaging part used for packaging the bonding pad part after electrical connection. Four identification grooves, a positioning groove and a direction groove are formed in one surface, far away from the bonding pad part, of the packaging part, the four identification grooves are respectively formed in four corners of one surface, far away from the bonding pad part, of the packaging part, the positioning groove is one, and the direction groove is formed in the other surface, far away from the bonding pad part, of the packaging part. The positioning groove is formed in the central position of one surface, far away from the bonding pad part, of the packaging part, the direction groove is formed in a connecting line of a certain identification groove and the positioning groove, the positioning of the semiconductor chip can be determined through the positioning groove, and the direction groove can be used for positioning the semiconductor chip after the semiconductor chip is positioned. Therefore, the position where the positive direction of the semiconductor chip is located is identified in an auxiliary mode, the four identification grooves assist in identifying the outline of the packaging part, and then the effect of rapidly identifying the packaging condition of the semiconductor chip is achieved.

Description

Technical Field

[0001] The present application relates to the technical field of semiconductor chip packaging, and in particular to a semiconductor chip that is easy to package and detect. Background Art

[0002] Semiconductor chips are circuit chips that encapsulate a certain number of semiconductor components into a carrier (such as metal, plastic, glass or ceramic and other different materials) to achieve certain specific functions. Semiconductor chips were born in the 20th century. As the core of microelectronics technology, they are the foundation and pillar of the entire information industry. They have the advantages of small size, fast speed, low energy consumption, long life, vibration resistance and high reliability. Semiconductor chip manufacturing technology is currently recognized as a cutting-edge technology. It plays a vital role in the rapid development of industry in the 21st century. It is widely used in national economic construction and people’s daily life, creating huge economic and social benefits. In recent years, benefiting from the continued growth of downstream traditional application fields such as computers, mobile communications, solid-state drives, and industrial electronics markets, and the rapid development of emerging application fields such as artificial intelligence, blockchain, the Internet of Things, and automotive electronics, the semiconductor application market demand is strong and the overall semiconductor market size has grown.

[0003] With the rapid development of the electronics market, semiconductor chips are being used more and more widely, and the demand is also increasing. In order to adapt to and meet market demand, higher and higher requirements are put forward for semiconductor chips. However, the traditional chip packaging module detection method is difficult to meet the needs of high-speed and high-precision detection of surface mount chips. The appearance quality inspection of chip packaging mainly includes chip inclination detection, printed character detection, chip pin size detection, and pin electrical performance detection. For the above inspection items, companies initially used manual inspection. With the development and widespread application of computer technology and optoelectronic technology, machine vision systems have been widely recognized for their safety, reliability, non-contact and non-destructiveness. Especially in the semiconductor chip packaging and testing industry, machine vision systems have been gradually introduced for automated operation of semiconductor production lines, such as chip inclination detection, chip character printing quality detection, chip pin integrity detection and other links to ensure the reliability of chip factory quality.

[0004] In addition to software packaging improvements, chip packaging testing also requires hardware assistance with a packaging chip structure that is more suitable for testing to make testing more efficient and faster. Summary of the invention

[0005] The embodiments of the present application provide a semiconductor chip that is easy to package and detect, so as to at least solve the problem in the related art that semiconductor packaging detection cannot be coordinated with software.

[0006] According to one embodiment of the present application, a semiconductor chip is provided that is convenient for packaging inspection, the semiconductor chip comprising: a pad portion for heat dissipation and electrical connection and a packaging portion for packaging the pad portion after electrical connection;

[0007] An identification groove, a positioning groove and a direction groove are arranged on one side of the packaging part away from the pad part. The number of the identification grooves is set to four, and the four identification grooves are respectively arranged at the four corners of the side of the packaging part away from the pad part. The number of the positioning grooves is set to one, and the positioning groove is arranged at the center position of the side of the packaging part away from the pad part. The direction groove is arranged on a line connecting a certain identification groove and the positioning groove.

[0008] Furthermore, the identification groove and the direction groove are both configured as circular grooves, and the positioning groove is configured as a square groove.

[0009] Furthermore, the identification groove and the direction groove are configured as circular grooves with a diameter of 1 mm.

[0010] Furthermore, the positioning groove is configured as a square groove with a diagonal of 1 mm.

[0011] Furthermore, the center points of the four identification grooves are at the same distance from the center point of the positioning groove.

[0012] Furthermore, the positioning groove is configured as a positioning groove with a color mark.

[0013] Through the present application, due to the setting of the positioning groove, the center position of the semiconductor chip can be quickly and accurately located when the camera is identifying, thereby determining the positioning of the semiconductor chip. The setting of the direction groove can assist in identifying the positive direction of the semiconductor chip after the semiconductor chip is positioned. At the same time, the four identification grooves located on the packaging part can assist in identifying the outline of the packaging part while accurately locating the position of the semiconductor chip, thereby assisting in identifying the packaging condition of the semiconductor chip and achieving the effect of quickly identifying the packaging condition of the semiconductor chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0015] Figure 1 The overall structure diagram of the semiconductor chip provided in the embodiment of the present application;

[0016] Figure 2 A plan view of a packaging portion provided in an embodiment of the present application.

[0017] In the figure, 1. pad part; 2. packaging part; 3. positioning groove; 4. identification groove; 5. direction groove. DETAILED DESCRIPTION

[0018] The following will describe the technical solutions in the embodiments of the present application in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0019] Embodiment: In this embodiment, the semiconductor chips described below are all QFN chips. Since QFN chips are prone to defects such as tilt and character printing position errors during the production process, which directly affect the chip detection efficiency and stability, in order to solve this problem, in this embodiment, a semiconductor chip that is easy to package and detect is proposed, such as Figure 1 As shown, the semiconductor chip includes a pad portion 1 for heat dissipation and electrical connection and a packaging portion 2 for packaging the pad portion 1 after electrical connection, wherein the pad portion 1 includes a large exposed pad at the bottom center for heat conduction, and conductive pads for electrical connection are arranged around the packaging periphery surrounding the large pad. The packaging portion 2 is a sealing portion for packaging the completed electrical connection.

[0020] Reference Figure 2 As shown, in the present embodiment, a positioning groove 3 is provided on the side of the packaging part 2 away from the pad part 1, and the positioning groove 3 is provided at the center position of the side of the packaging part 2 away from the pad part 1. The positioning groove 3 is provided to quickly capture the position of the positioning groove 3 during camera detection, and then determine the position of the entire semiconductor chip. In the present embodiment, the positioning groove 3 is provided as a square groove with a diagonal length of 1 mm. This setting does not affect the integrity of the package, and at the same time, this length is convenient for production and camera recognition. At the same time, it is set as a groove and a smaller occupied area to ensure the integrity and usability of the semiconductor chip, so that it is still suitable for most practical uses. At the same time, the positioning groove 3 can be provided as a positioning groove 3 with a color mark, such as spraying a color on the bottom of the positioning groove 3, so that the camera can recognize its position more quickly, but in most applications, color marking cannot be applied. Only in a few cases can color marking be used to speed up recognition.

[0021] A plurality of identification grooves 4 are also provided on the side of the package part away from the pad part 1. In the present embodiment, the number of identification grooves 4 is four, which are respectively provided at the four corners of the side of the package part 2 away from the pad part 1, and the four identification grooves 4 are at the same distance from each corner and the two adjacent sides, and the center points of the four identification grooves 4 are at the same distance from the center point of the positioning groove 3. At the same time, the four identification grooves 4 are all provided as circular grooves with a diameter of 1 mm. The setting of the identification grooves 4 is to enable the camera to quickly locate the positions of the four corners of the semiconductor chip during the semiconductor chip packaging inspection, and to form a preset boundary image based on the four identification grooves 4, so as to more conveniently assist in determining the packaging status of the semiconductor chip. The four identification grooves 4 are provided as circular grooves to distinguish them from the positioning grooves 3, so as to prevent the identification grooves 4 from being mistaken for the positioning grooves 3 during identification. At the same time, the size setting does not affect the integrity of the package, and this length is convenient for manufacturing and camera identification. At the same time, the grooves and the smaller occupied area are provided to ensure the integrity and usability of the manufactured semiconductor chip, so that it is still applicable to most practical uses.

[0022] It also includes a direction groove 5, which is also arranged on the side of the packaging part 2 away from the pad part 1. The direction groove 5 can be arranged at any position except the identification groove 4 and the positioning groove 3. In this embodiment, in order to facilitate opening and taking points, the direction groove 5 is arranged on the line connecting a certain identification groove 4 and the positioning groove 3. The direction groove 5 is also set as a circular groove with a diameter of 1 mm. Since there are four identification grooves 4 and they are evenly distributed, the camera will not mistake the direction groove 5 for the identification groove 4 when performing identification. Therefore, the specifications of the direction groove 5 and the identification groove 4 are the same. The purpose of the direction groove 5 is to correct the direction of the semiconductor chip when performing semiconductor chip packaging identification. According to the position of the preset direction groove 5, the correct identification direction of the semiconductor chip is realized, which is helpful to identify the logo and offset position mark in the packaging situation.

[0023] Through the present application, due to the setting of the positioning groove 3, the center position of the semiconductor chip can be quickly and accurately located when the camera is identifying, thereby determining the positioning of the semiconductor chip. The setting of the direction groove 5 can assist in identifying the positive direction of the semiconductor chip after the semiconductor chip is positioned. At the same time, the four identification grooves 4 located on the packaging part 2 can assist in identifying the outline of the packaging part 2 while accurately locating the position of the semiconductor chip, thereby assisting in identifying the packaging condition of the semiconductor chip, thereby achieving the effect of quickly identifying the packaging condition of the semiconductor chip.

[0024] The terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the terms used in this way can be interchangeable under appropriate circumstances. This is just a way of distinguishing objects with the same attributes when describing the embodiments of this application.

[0025] The terms used in the embodiments of the present application are only for the purpose of describing specific embodiments and are not intended to limit the present application. The singular forms of "a", "" and "the" used in the embodiments of the present application are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that in the description of the present application, unless otherwise specified, " / " indicates that the objects associated before and after are in an "or" relationship, for example, A / B can represent A or B; "and / or" in the present application is only a description of the association relationship of associated objects, indicating that three relationships can exist, for example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone, where A and B can be singular or plural.

[0026] As used herein, the words “if” or “if” may be interpreted as “at the time of” or “when” or “in response to determining” or “in response to detecting”, depending on the context. Similarly, the phrases “if it is determined” or “if (stated condition or event) is detected” may be interpreted as “when it is determined” or “in response to determining” or “when detecting (stated condition or event)” or “in response to detecting (stated condition or event)”, depending on the context.

[0027] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, a person of ordinary skill in the art should understand that the technical solutions described in the aforementioned embodiments may still be modified, or some of the technical features thereof may be replaced by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A semiconductor chip that is easy to package and test, characterized in that: The semiconductor chip comprises: a pad portion (1) for heat dissipation and electrical connection and a packaging portion (2) for packaging the pad portion (1) after electrical connection; An identification groove (4), a positioning groove (3) and a direction groove (5) are arranged on a side of the packaging part (2) away from the pad part (1); the number of the identification grooves (4) is set to four, and the four identification grooves (4) are respectively arranged at the four corners of the side of the packaging part (2) away from the pad part (1); the number of the positioning groove (3) is set to one, and the positioning groove (3) is arranged at the center position of the side of the packaging part (2) away from the pad part (1); and the direction groove (5) is arranged on a line connecting a certain identification groove (4) and the positioning groove (3).

2. A semiconductor chip that is easy to package and test according to claim 1, characterized in that: The identification groove (4) and the direction groove (5) are both configured as circular grooves, and the positioning groove (3) is configured as a square groove.

3. A semiconductor chip that is easy to package and test according to claim 2, characterized in that: The identification groove (4) and the direction groove (5) are configured as circular grooves with a diameter of 1 mm.

4. A semiconductor chip that is easy to package and test according to claim 2, characterized in that: The positioning groove (3) is configured as a square groove with a diagonal of 1 mm.

5. The semiconductor chip that is easy to package and test according to claim 1, characterized in that: The center points of the four identification grooves (4) are at the same distance from the center point of the positioning groove (3).

6. The semiconductor chip for easy packaging inspection according to claim 1, characterized in that: The positioning groove (3) is configured as a positioning groove (3) with a color mark.

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