Multi-channel high-stability low-noise frequency reference output circuit

Abstract

The utility model discloses a multi-channel high-stability low-noise frequency reference output circuit, and belongs to the technical field of time unification. Comprising a constant temperature crystal oscillator module, a power division module, first attenuation circuits, low noise amplifier modules, LC filtering modules and second attenuation circuits, the first attenuation circuits, the low noise amplifier modules, the LC filtering modules and the second attenuation circuits form signal channels, and the number of the first attenuation circuits, the number of the low noise amplifier modules, the number of the LC filtering modules, the number of the second attenuation circuits and the number of the signal channels are the same. A first preset distance is arranged between every two signal channels, and a distribution forbidding area is arranged. The problem that in the prior art, the stability and phase noise of a frequency reference are deteriorated after being driven is solved, and the isolation degree between clock channels is high and can be lower than-80 dB; the phase noise deterioration is small, and the deterioration degree is less than or equal to 2dBc at Hz; the stray suppression effect is high, and stray is smaller than or equal to-90 dBc.

Description

Technical Field

[0001] The utility model relates to the technical field of time unification, in particular to a multi-channel high-stability and low-noise frequency reference output circuit. Background Art

[0002] At present, the time and frequency industry is using frequency references more and more widely. The high stability and low noise characteristics of frequency references can be used in various occasions as a reference clock for frequency multiplication and sampling. In a system, there are multiple terminals that need to use frequency references. In order to ensure that the frequency references used by each terminal are from the same source and have consistent stability, the same reference source can be used to output multiple frequency references. The industry currently uses constant temperature crystal oscillators as frequency sources, and the frequency signal is driven and output to the outside through a clock driver chip. This frequency signal will introduce a lot of phase noise after passing through the clock driver chip, which will introduce a large probability of missampling to the terminal. Commonly used clock drive circuits include Figure 1 shown. Utility Model Content

[0003] The utility model aims to overcome the deficiencies of the prior art and provide a multi-channel high-stability and low-noise frequency reference output circuit.

[0004] The purpose of the utility model is achieved through the following technical solutions: a multi-channel high-stability low-noise frequency reference output circuit, including a constant temperature crystal oscillator module, the constant temperature crystal oscillator module is connected to a power division module, the constant temperature crystal oscillator module outputs a first clock signal to the power division module; the power division module is connected to a first attenuation circuit, the power division module divides the first clock signal into a plurality of second clock signals and outputs them to a plurality of first attenuation circuits, each second clock signal is output to a first attenuation circuit; the first attenuation circuit is connected to a low-noise amplifier module, the first attenuation circuit attenuates the second clock signal and outputs it to the low-noise amplifier module; the low-noise amplifier module is connected to an LC filter module, the low-noise The amplifier module amplifies the second clock signal to obtain a third clock signal, which is output to the LC filter module; the LC filter module is connected to the second attenuation circuit, and the LC filter module filters out the harmonics of the third clock signal to obtain a fourth clock signal, which is output to the second attenuation circuit; the second attenuation circuit performs power adjustment on the fourth clock signal to obtain a fifth clock signal and outputs it; the first attenuation circuit, the low-noise amplifier module, the LC filter module and the second attenuation circuit form a signal channel, the number of the first attenuation circuit, the low-noise amplifier module, the LC filter module, the second attenuation circuit and the signal channel is the same, and each signal channel is separated by a first preset distance and a prohibited area is set.

[0005] Preferably, the power division module includes a first passive power divider, a second passive power divider and a third passive power divider, the first passive power divider is connected to the second passive power divider and the third passive power divider, the first passive power divider divides the first clock signal into a first power division clock signal and a second power division clock signal, and inputs them into the second passive power divider and the third passive power divider; the second passive power divider and the third passive power divider divide the first power division clock signal and the second power division clock signal into multiple second clocks, which are respectively input into multiple first attenuation circuits.

[0006] Preferably, the first attenuation circuit includes a first resistor R1, a second resistor R2 and a third resistor R3; the first end of the first resistor R1 is connected to the power division module and the first end of the second resistor R2, and the second end of the first resistor R1 is connected to the ground GND; the second end of the second resistor R2 is connected to the first end of the third resistor R3 and the low power amplifier module; the second end of the third resistor R3 is connected to the ground GND.

[0007] Preferably, the resistance values ​​of the first resistor R1 and the third resistor are 150R, and the resistance value of the second resistor is 37.4R.

[0008] Preferably, the low noise amplifier module includes a low noise amplifier, a first capacitor, a second capacitor, a third capacitor and a first inductor, the first end of the first capacitor is connected to the first attenuation circuit, the second end of the first capacitor is connected to the input end of the low noise amplifier; the output end of the low noise amplifier is connected to the first end of the first inductor and the first end of the second capacitor, and the third end of the low noise amplifier is connected to the ground GND; the second end of the second capacitor is connected to the LC filter module; the second end of the first inductor is connected to the power supply and the first end of the third capacitor; the second end of the third capacitor is connected to the ground GND.

[0009] Preferably, the LC filter module includes a thirty-first inductor L31, a thirtieth inductor L30, a twenty-ninth inductor L29, a twenty-eighth inductor L28, a one-hundred-thirty-ninth capacitor C139, a one-hundred-thirty-eighth capacitor C138, a one-hundred-thirty-seventh capacitor C137, a one-hundred-thirty-sixth capacitor C136 and a one-hundred-thirty-fifth capacitor C135; a first end of the one-hundred-thirty-ninth capacitor C139 is connected to the low noise amplifier module and the first end of the thirty-first inductor L31, and a second end of the one-hundred-thirty-ninth capacitor C139 is connected to the ground GND; a second end of the thirty-first inductor L31 is connected to the first end of the one-hundred-thirty-eighth capacitor C138 and the first end of the thirtieth inductor L30; The second end of the one hundred and thirty-eighth capacitor C138 is connected to the ground GND; the second end of the thirtieth inductor L30 is connected to the first end of the one hundred and thirty-seventh capacitor C137 and the first end of the twenty-ninth inductor L29, and the second end of the first thirty-seventh capacitor C137 is connected to the ground GND; the second end of the twenty-ninth inductor L29 is connected to the first end of the one hundred and thirty-sixth capacitor C136 and the first end of the twenty-eighth inductor L28, and the second end of the first thirty-sixth capacitor C136 is connected to the ground GND; the second end of the twenty-eighth inductor L28 is connected to the first end of the one hundred and thirty-fifth capacitor C135 and the second attenuation circuit; the second end of the one hundred and thirty-fifth capacitor C135 is connected to the ground GND.

[0010] Preferably, when the first clock signal is 10M, the thirty-first inductor L31 is 1000nH, the thirtieth inductor L30 is 1500nH, the twenty-ninth inductor L29 is 1500nH, the twenty-eighth inductor L28 is 1000nH, the one hundred and thirty-ninth capacitor C139 is 160pF, the one hundred and thirty-eighth capacitor C138 is 510pF, the one hundred and thirty-seventh capacitor C137 is 510pF, the one hundred and thirty-sixth capacitor C136 is 510pF and the one hundred and thirty-fifth capacitor C135 is 160pF;

[0011] When the first clock signal is 100M, the thirty-first inductor L31 is 82nH, the thirtieth inductor L30 is 120nH, the twenty-ninth inductor L29 is 120nH, the twenty-eighth inductor L28 is 82nH, the one hundred and thirty-ninth capacitor C139 is 36pF, the one hundred and thirty-eighth capacitor C138 is 51 pF, the one hundred and thirty-seventh capacitor C137 is 36 pF, the one hundred and thirty-sixth capacitor C136 is 51pF and the one hundred and thirty-fifth capacitor C135 is 36pF.

[0012] Preferably, the first preset distance is 5 mm.

[0013] Preferably, the area separated by the first preset distance between each signal channel is a prohibited area.

[0014] Preferably, the through hole of the shielding cover is connected to the ground GND, and the welding feet of the shielding cover penetrate the PCB board for welding and fixing.

[0015] The beneficial effects of the utility model are:

[0016] 1) Output multiple frequency reference signals with high stability and low phase noise through a constant temperature reference as the reference source.

[0017] 2) The isolation between clock channels is high and can be lower than -80dB; the phase noise degradation is small, the degradation degree is ≤2dBc@Hz; the spurious suppression effect is high, the spurious is ≤-90dBc.

[0018] 3) All devices are domestically produced and can meet national localization requirements. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 A clock drive circuit in the prior art;

[0020] Figure 2 This is the schematic diagram of the multi-channel high-stability and low-noise frequency reference output circuit of the utility model;

[0021] Figure 3 is the principle diagram of the first attenuation circuit;

[0022] Figure 4 This is the circuit schematic diagram of the low noise amplifier module;

[0023] Figure 5 This is a schematic diagram of LC filter module parameters when the first clock signal is 10M;

[0024] Figure 6 The following is a schematic diagram of the LC filter module parameters and circuit principle diagram when the first clock signal is 100M;

[0025] Figure 7 This is a schematic diagram of the PCB layout of the multi-channel high-stability and low-noise frequency reference output circuit;

[0026] Figure 8 This is the measured diagram of phase noise and short stability;

[0027] Fig. 9 This is the structural diagram of the shielding cover;

[0028] Fig.10 This is a schematic diagram of the shield cover welding position. DETAILED DESCRIPTION

[0029] The following will be combined with the embodiments to clearly and completely describe the technical solution of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0030] In order to divide the same clock source into multiple outputs without affecting the stability and phase noise, the present invention adopts a combination circuit of constant temperature crystal oscillator + power divider + low noise amplifier + LC filter + π-type attenuation, which solves the problem that the stability and phase noise of the frequency reference deteriorate after driving and amplifying in the prior art.

[0031] See also Figure 1-Figure 7 The utility model provides a multi-channel high-stability and low-noise frequency reference output circuit, including a constant temperature crystal oscillator module, the constant temperature crystal oscillator module is connected to a power division module, the constant temperature crystal oscillator module outputs a first clock signal to the power division module; the power division module is connected to a first attenuation circuit, the power division module divides the first clock signal into a plurality of second clock signals and outputs them to a plurality of first attenuation circuits, each second clock signal is output to a first attenuation circuit; the first attenuation circuit is connected to a low noise amplifier module, the first attenuation circuit attenuates the second clock signal and outputs it to the low noise amplifier module; the low noise amplifier module is connected to an LC filter module, the low noise amplifier module amplifies the second clock signal to obtain a third clock signal and outputs it to the LC filter module; the LC filter module is connected to a second attenuation circuit, the LC filter module filters out the harmonics of the third clock signal to obtain a fourth clock signal and outputs it to the second attenuation circuit; the second attenuation circuit performs power adjustment on the fourth clock signal to obtain a fifth clock signal and outputs it; the first attenuation circuit, the low noise amplifier module, the LC filter module and the second attenuation circuit constitute a signal channel, the number of the first attenuation circuit, the low noise amplifier module, the LC filter module, the second attenuation circuit and the signal channel is the same, each signal channel is spaced by a first preset distance and a prohibited area is set. The constant temperature crystal oscillator is selected according to the phase noise and stability indicators. In this embodiment, a constant temperature crystal oscillator of Dapu model O22B-K425-10.00MHz is used.

[0032] In some embodiments, the power division module includes a first passive power divider, a second passive power divider and a third passive power divider, the first passive power divider is connected to the second passive power divider and the third passive power divider, the first passive power divider divides the first clock signal into a first power division clock signal and a second power division clock signal, and inputs them into the second passive power divider and the third passive power divider; the second passive power divider and the third passive power divider divide the first power division clock signal and the second power division clock signal into a plurality of second clocks, which are respectively input into a plurality of first attenuation circuits. In this embodiment, the passive power divider adopts a power divider of Kangmai Micro Model S0093.

[0033] In some embodiments, the first attenuation circuit includes a first resistor R1, a second resistor R2 and a third resistor R3; the first end of the first resistor R1 is connected to the power divider module and the first end of the second resistor R2, and the second end of the first resistor R1 is connected to the ground GND; the second end of the second resistor R2 is connected to the first end of the third resistor R3 and the low power amplifier module; the second end of the third resistor R3 is connected to the ground GND. π-type attenuation 1 (first attenuation circuit) mainly attenuates the clock output power to meet the optimal input power range of the low noise amplifier. It can be built with resistors and has no effect on the indicators. After actual verification, the low noise amplifier will have a certain phase noise deterioration, and the degree of deterioration is related to the input clock power. When the input power is -2.0±0.5dBm, the phase noise deterioration is the lowest, about 0.5dBc / Hz. The output power of the crystal oscillator is 10±0.5dBm, the maximum power loss is 3dBm, and the two-stage power loss is about 6dBm. In order to ensure that the power input to the low noise amplifier is about -2dBm, about 6dBm of attenuation is added to the front stage of the low noise amplifier. The attenuation circuit is as follows: Figure 3 shown.

[0034] In some embodiments, the resistance values ​​of the first resistor R1 and the third resistor are 150R, and the resistance value of the second resistor is 37.4R.

[0035] In some embodiments, the low noise amplifier module includes a low noise amplifier, a first capacitor, a second capacitor, a third capacitor and a first inductor. The first end of the first capacitor is connected to the first attenuation circuit, and the second end of the first capacitor is connected to the input end of the low noise amplifier; the output end of the low noise amplifier is connected to the first end of the first inductor and the first end of the second capacitor, and the third end of the low noise amplifier is connected to the ground GND; the second end of the second capacitor is connected to the LC filter module; the second end of the first inductor is connected to the power supply and the first end of the third capacitor; the second end of the third capacitor is connected to the ground GND. In this embodiment, the low noise amplifier adopts the ZDH6018 low noise amplifier of China Electronics Hongye, and its power supply is 5V, which can be powered by a low noise LDO. After the clock signal with an input power of -2dBm passes through ZDH6018, the power is amplified to 18dBm. Its circuit is as follows Figure 4 shown.

[0036] In some embodiments, the LC filter module includes a thirty-first inductor L31, a thirtieth inductor L30, a twenty-ninth inductor L29, a twenty-eighth inductor L28, a one-hundred-thirty-ninth capacitor C139, a one-hundred-thirty-eighth capacitor C138, a one-hundred-thirty-seventh capacitor C137, a one-hundred-thirty-sixth capacitor C136 and a one-hundred-thirty-fifth capacitor C135; a first end of the one-hundred-thirty-ninth capacitor C139 is connected to the low noise amplifier module and the first end of the thirty-first inductor L31, and a second end of the one-hundred-thirty-ninth capacitor C139 is connected to the ground GND; a second end of the thirty-first inductor L31 is connected to a first end of the one-hundred-thirty-eighth capacitor C138 and a first end of the thirtieth inductor L30; The second end of the one hundred and thirty-eighth capacitor C138 is connected to the ground GND; the second end of the thirtieth inductor L30 is connected to the first end of the one hundred and thirty-seventh capacitor C137 and the first end of the twenty-ninth inductor L29, and the second end of the one hundred and thirty-seventh capacitor C137 is connected to the ground GND; the second end of the twenty-ninth inductor L29 is connected to the first end of the one hundred and thirty-sixth capacitor C136 and the first end of the twenty-eighth inductor L28, and the second end of the one hundred and thirty-sixth capacitor C136 is connected to the ground GND; the second end of the twenty-eighth inductor L28 is connected to the first end of the one hundred and thirty-fifth capacitor C135 and the second attenuation circuit; the second end of the one hundred and thirty-fifth capacitor C135 is connected to the ground GND. LC filtering mainly filters out clock harmonics, and the LC filtering parameters of different frequencies are also different. The circuit principle of the LC filtering module is as follows Figure 6 shown.

[0037] In some embodiments, when the first clock signal is 10M, the thirty-first inductor L31 is 1000nH, the thirtieth inductor L30 is 1500nH, the twenty-ninth inductor L29 is 1500nH, the twenty-eighth inductor L28 is 1000nH, the one hundred and thirty-ninth capacitor C139 is 160pF, the one hundred and thirty-eighth capacitor C138 is 510pF, the one hundred and thirty-seventh capacitor C137 is 510pF, the one hundred and thirty-sixth capacitor C136 is 510pF, and the one hundred and thirty-fifth capacitor C135 is 160pF;

[0038] When the first clock signal is 100M, the 31st inductor L31 is 82nH, the 30th inductor L30 is 120nH, the 29th inductor L29 is 120nH, the 28th inductor L28 is 82nH, the 139th capacitor C139 is 36pF, the 138th capacitor C138 is 51pF, the 137th capacitor C137 is 36pF, the 136th capacitor C136 is 51pF and the 135th capacitor C135 is 36pF. When the first clock signal is 10M, the filtering parameters are as follows: Figure 5 As shown; when the first clock signal is 100M, the filtering parameters are as follows Figure 6 shown.

[0039] π-type attenuation 2 (the second attenuation circuit) is mainly used to adjust the output power of the clock. After low-noise amplifier, the clock output power is 18dBm. After LC filtering, the output power is attenuated to 16dBm. According to the actual output power requirements, π-type attenuation can be used to adjust the power. The commonly used output power is 7±2dBm.

[0040] In some embodiments, the first preset distance is 5 mm.

[0041] In some embodiments, the area between each signal channel separated by a first preset distance is a forbidden area.

[0042] In some embodiments, the shielding cover through hole is connected to the ground GND, and the shielding cover welding feet penetrate the PCB board for welding and fixing.

[0043] In order to ensure the output isolation between channels, the channels need to be isolated in the PCB layout. There are three ways to handle this: 1. Open the interval between channels so that the interval is greater than 5mm; 2. Set a forbidden area on the PCB between channels to prevent signal crosstalk; 3. Add a shielding cover to be compatible with the spatial electromagnetic radiation of the inductor on the LC filter circuit. After isolation by power division (21dB) + low noise amplifier (22dB) + LC (30dB) + π attenuation (>10dB), the isolation between channels can be better than -80dB. The interval between channels, setting of forbidden areas and shielding covers can be set separately or at the same time. The effects of the three are superimposed on each other, and they have the best effect on improving indicators. PCB layout such as Figure 7 As shown in the figure, after the above design, taking 10M clock as an example, the clock phase noise is as follows: 110.47dBc / Hz@1Hz, 141.04dBc / Hz@10Hz, 155.4dBc / Hz@100Hz, 163.05dBc / Hz@1kHz, 165.03dBc / Hz@10kHz. The short stability is as follows: 1.280E-12 / S. The actual measurement is as follows Figure 8 As shown; the shielding cover structure is as Fig. 9 As shown, the shield cover welding position is as follows Fig.10 shown.

[0044] The above is only a preferred embodiment of the utility model. It should be understood that the utility model is not limited to the form disclosed herein, and should not be regarded as excluding other embodiments, but can be used in various other combinations, modifications and environments, and can be modified within the scope of the concept described herein through the above teachings or the technology or knowledge of the relevant field. The changes and modifications made by those skilled in the art do not deviate from the spirit and scope of the utility model, and should be within the scope of protection of the claims attached to the utility model.

Claims

1. A multi-channel high-stability and low-noise frequency reference output circuit, characterized in that: It includes a constant temperature crystal oscillator module, the constant temperature crystal oscillator module is connected to the power division module, and the constant temperature crystal oscillator module outputs a first clock signal to the power division module; The power division module is connected to the first attenuation circuit, and the power division module divides the first clock signal into a plurality of second clock signals and outputs them to a plurality of first attenuation circuits, and each second clock signal is output to a first attenuation circuit; The first attenuation circuit is connected to the low noise amplifier module, and the first attenuation circuit attenuates the second clock signal and outputs it to the low noise amplifier module; the low noise amplifier module is connected to the LC filter module, and the low noise amplifier module amplifies the second clock signal to obtain a third clock signal and outputs it to the LC filter module; The LC filter module is connected to the second attenuation circuit, and the LC filter module filters out the harmonics of the third clock signal to obtain a fourth clock signal and outputs it to the second attenuation circuit; the second attenuation circuit performs power adjustment on the fourth clock signal to obtain a fifth clock signal and outputs it; the first attenuation circuit, the low-noise amplifier module, the LC filter module, the second attenuation circuit and the second attenuation circuit form a signal channel, and the number of the first attenuation circuit, the low-noise amplifier module, the LC filter module, the second attenuation circuit and the signal channel are the same, and each signal channel is separated by a first preset distance and a prohibited area is set; a shielding cover is installed above the PCB board of the multi-channel high-stability and low-noise frequency reference output circuit.

2. The multi-channel high-stability and low-noise frequency reference output circuit according to claim 1, characterized in that: The power division module includes a first passive power divider, a second passive power divider and a third passive power divider, wherein the first passive power divider is connected to the second passive power divider and the third passive power divider, the first passive power divider divides the first clock signal into a first power division clock signal and a second power division clock signal, and inputs the first clock signal into the second passive power divider and the third passive power divider; the second passive power divider and the third passive power divider divide the first power division clock signal and the second power division clock signal into a plurality of second clocks, which are respectively input into a plurality of first attenuation circuits.

3. The multi-channel high-stability and low-noise frequency reference output circuit according to claim 1, characterized in that: The first attenuation circuit includes a first resistor R1, a second resistor R2 and a third resistor R3; the first end of the first resistor R1 is connected to the power division module and the first end of the second resistor R2, and the second end of the first resistor R1 is connected to the ground GND; the second end of the second resistor R2 is connected to the first end of the third resistor R3 and the low power amplifier module; the second end of the third resistor R3 is connected to the ground GND.

4. The multi-channel high-stability and low-noise frequency reference output circuit according to claim 3 is characterized in that: The resistance values ​​of the first resistor R1 and the third resistor are 150R, and the resistance value of the second resistor is 37.4R.

5. The multi-channel high-stability and low-noise frequency reference output circuit according to claim 1, characterized in that: The low noise amplifier module includes a low noise amplifier, a first capacitor, a second capacitor, a third capacitor and a first inductor, wherein the first end of the first capacitor is connected to the first attenuation circuit, and the second end of the first capacitor is connected to the input end of the low noise amplifier; the output end of the low noise amplifier is connected to the first end of the first inductor and the first end of the second capacitor, and the third end of the low noise amplifier is connected to the ground GND; the second end of the second capacitor is connected to the LC filter module; the second end of the first inductor is connected to the power supply and the first end of the third capacitor; the second end of the third capacitor is connected to the ground GND.

6. The multi-channel high-stability and low-noise frequency reference output circuit according to claim 1, characterized in that: The LC filter module includes a thirty-first inductor L31, a thirtieth inductor L30, a twenty-ninth inductor L29, a twenty-eighth inductor L28, a one-hundred-thirty-ninth capacitor C139, a one-hundred-thirty-eighth capacitor C138, a one-hundred-thirty-seventh capacitor C137, a one-hundred-thirty-sixth capacitor C136 and a one-hundred-thirty-fifth capacitor C135; a first end of the one-hundred-thirty-ninth capacitor C139 is connected to the low noise amplifier module and the first end of the thirty-first inductor L31, and a second end of the one-hundred-thirty-ninth capacitor C139 is connected to the ground GND; a second end of the thirty-first inductor L31 is connected to a first end of the one-hundred-thirty-eighth capacitor C138 and a first end of the thirtieth inductor L30; The second end of the thirty-eighth capacitor C138 is connected to the ground GND; the second end of the thirtieth inductor L30 is connected to the first end of the one-hundred-and-thirty-seventh capacitor C137 and the first end of the twenty-ninth inductor L29, and the second end of the first-hundred-and-thirty-seventh capacitor C137 is connected to the ground GND; the second end of the twenty-ninth inductor L29 is connected to the first end of the one-hundred-and-thirty-sixth capacitor C136 and the first end of the twenty-eighth inductor L28, and the second end of the first-hundred-and-thirty-sixth capacitor C136 is connected to the ground GND; the second end of the twenty-eighth inductor L28 is connected to the first end of the one-hundred-and-thirty-fifth capacitor C135 and the second attenuation circuit; the second end of the first-hundred-and-thirty-fifth capacitor C135 is connected to the ground GND.

7. The multi-channel high-stability and low-noise frequency reference output circuit according to claim 6, characterized in that: When the first clock signal is 10M, the thirty-first inductor L31 is 1000nH, the thirtieth inductor L30 is 1500nH, the twenty-ninth inductor L29 is 1500nH, the twenty-eighth inductor L28 is 1000nH, the one hundred and thirty-ninth capacitor C139 is 160pF, the one hundred and thirty-eighth capacitor C138 is 510pF, the one hundred and thirty-seventh capacitor C137 is 510pF, the one hundred and thirty-sixth capacitor C136 is 510pF and the one hundred and thirty-fifth capacitor C135 is 160pF; When the first clock signal is 100M, the thirty-first inductor L31 is 82nH, the thirtieth inductor L30 is 120nH, the twenty-ninth inductor L29 is 120nH, the twenty-eighth inductor L28 is 82nH, the one hundred and thirty-ninth capacitor C139 is 36pF, the one hundred and thirty-eighth capacitor C138 is 51 pF, the one hundred and thirty-seventh capacitor C137 is 36 pF, the one hundred and thirty-sixth capacitor C136 is 51pF and the one hundred and thirty-fifth capacitor C135 is 36pF.

8. The multi-channel high-stability and low-noise frequency reference output circuit according to any one of claims 1 to 7, characterized in that: The first preset distance is 5 mm.

9. The multi-channel high-stability and low-noise frequency reference output circuit according to any one of claims 1 to 7, characterized in that: The area between each signal channel and the first preset distance is a forbidden area.

10. The multi-channel high-stability and low-noise frequency reference output circuit according to any one of claims 1 to 7, characterized in that: The shielding cover through hole is connected to the ground GND, and the shielding cover welding pin penetrates the PCB board for welding and fixing.

Images