Silicon wafer, solar cell, cell module, photovoltaic system and silicon rod

Abstract

The utility model is suitable for the technical field of solar cells, and provides a silicon wafer, a solar cell, a cell module, a photovoltaic system and a silicon rod. The silicon wafer comprises a central region and corner edge regions, the conductive type of the central region is N type, and the conductive type of the corner edge regions is P type. Therefore, the conduction type of the central area of the silicon wafer is N type, and the conduction type of the corner edge area is P type, so that in the process of manufacturing the solar cell based on the silicon wafer, the P-type corner edge area can be utilized to bear pollution of copper ions to the edge of the silicon wafer, and recombination caused by pollution of the copper ions to the edge of the silicon wafer is reduced. Meanwhile, PN junctions can be formed in the silicon wafer, and after a solar cell is manufactured, a better field passivation effect can be formed in the solar cell, and carrier transmission is facilitated. Therefore, the photoelectric conversion efficiency of the solar cell prepared based on the silicon wafer can be improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cells, and in particular to a silicon wafer, a solar cell, a battery module, a photovoltaic system, and a silicon rod. Background Art

[0002] Solar cells can convert sunlight into electrical energy, and solar cells are usually made based on silicon wafers, which can be N-type silicon wafers or P-type silicon wafers. In the related art, in the process of making solar cells based on silicon wafers, the edges of silicon wafers are easily contaminated by metal ions, especially copper ions. Copper ion contamination will greatly increase the recombination of N-type silicon wafers, but has little effect on P-type silicon wafers. Based on this, how to reduce the adverse effects of copper ion contamination on the edges of silicon wafers has become an urgent problem to be solved. Utility Model Content

[0003] The present application provides a silicon wafer, a solar cell, a battery module, a photovoltaic system, and a silicon rod, aiming to solve the technical problem of how to reduce the adverse effects of copper ion contamination on the edge of a silicon wafer in the prior art.

[0004] The present application is implemented as follows: the silicon wafer of the embodiment of the present application includes a central area and a corner edge area, the conductivity type of the central area is N-type, and the conductivity type of the corner edge area is P-type.

[0005] Specifically, the doping element in the central region includes an N-type doping element, and the N-type doping element includes one of a fifth main group element and a sixth main group element.

[0006] Specifically, the doping element in the corner edge region includes a P-type doping element, and the P-type doping element includes an element in the third main group.

[0007] Specifically, the silicon wafer includes a side edge region, the side edge region is located between two adjacent corner edge regions, and the conductivity type of the side edge region is P type.

[0008] Specifically, the surface of the central area in the thickness direction of the silicon wafer is circular, the center of the circle is the center point of the silicon wafer, and the radius is 1 / 5-1 / 2 of the side length of the silicon wafer.

[0009] Specifically, the corner edge region includes a first corner edge and a second corner edge, the length of the first corner edge is 1 / 100-1 / 2 of the side length of the silicon wafer, and the length of the second corner edge is 1 / 100-1 / 2 of the side length of the silicon wafer.

[0010] Specifically, a ratio of the resistivity of the corner edge region to the resistivity of the central region is greater than or equal to 1.2.

[0011] Specifically, the resistivity of the central region is greater than or equal to 10Ω·cm.

[0012] Specifically, the resistivity of the corner edge region is greater than or equal to 100Ω·cm.

[0013] Specifically, the acceptor impurity concentration in the corner edge region is smaller than the acceptor impurity concentration in the central region, and smaller than the donor impurity concentration in the central region.

[0014] Specifically, the silicon wafer includes a transition region, the transition region is located between the central region and the corner edge region, the resistivity of the transition region is greater than the resistivity of the central region, and the resistivity of the transition region is greater than the resistivity of the corner edge region.

[0015] Specifically, the resistivity of the transition region is greater than or equal to 1000 Ω·cm.

[0016] Specifically, the doping elements in the central region and the corner edge region both include a P-type doping element and an N-type doping element, the doping concentration of the N-type doping element in the central region is greater than the doping concentration of the P-type doping element in the central region, and the doping concentration of the P-type doping element in the corner edge region is greater than the doping concentration of the N-type doping element in the corner edge region;

[0017] The absolute value of the slope of the concentration curve of the N-type doping element is greater than the absolute value of the slope of the concentration curve of the P-type doping element;

[0018] The horizontal axis of the concentration curve of the N-type doping element is the distance from the test position of the silicon wafer to the center point of the silicon wafer, and the vertical axis is the concentration of the N-type doping element at the test position; the horizontal axis of the concentration curve of the P-type doping element is the distance from the test position to the center point of the silicon wafer, and the vertical axis is the concentration of the P-type doping element at the test position.

[0019] Specifically, the absolute value of the slope of the concentration curve of the N-type doping element and the absolute value of the slope of the concentration curve of the P-type doping element satisfy the following formula:

[0020]

[0021] Among them, a is the side length of the silicon substrate, N1 is the doping concentration of the N-type doping element in the central area, P1 is the doping concentration of the P-type doping element in the central area, K1 is the absolute value of the slope of the concentration curve of the N-type doping element, and K2 is the absolute value of the slope of the concentration curve of the P-type doping element.

[0022] The present application also provides a solar cell, which is made based on any of the silicon wafers described above.

[0023] The present application also provides a battery assembly, comprising the above-mentioned solar cell.

[0024] The present application also provides a photovoltaic system, comprising the above-mentioned battery assembly.

[0025] The present application also provides a silicon rod, comprising a central region and a skin, wherein the conductivity type of the central region is N-type, and the conductivity type of the skin is P-type, and the silicon wafer of any of the above items is cut from the silicon rod.

[0026] Specifically, the central region is in a truncated cone shape or a conical shape, and the cross-sectional area of ​​the central region gradually decreases along the direction from the head of the silicon rod to the tail of the silicon rod.

[0027] In the silicon wafer, solar cell, battery assembly, photovoltaic system, and silicon rod of the embodiment of the present application, since the conductivity type of the central area of ​​the silicon wafer is N-type and the conductivity type of the corner edge area is P-type, in the process of making solar cells based on silicon wafers, the corner edge area in the P-type can be used to withstand the contamination of the silicon wafer edge by copper ions, thereby reducing the recombination caused by copper ion contamination of the silicon wafer edge. At the same time, a PN junction can be formed in the silicon wafer, and after the solar cell is made, a better field passivation effect can be formed in the solar cell, which is conducive to carrier transmission. In this way, it is conducive to improving the photoelectric conversion efficiency of the solar cell made based on the silicon wafer.

[0028] The silicon rod in the embodiment of the present application has a higher minority carrier lifetime because the conductivity type of the central region is N-type and the conductivity type of the surface is P-type, and the necessity of adding dopants is reduced. In the undoped case, the resistivity is uniform, and there is no need to consider the resistivity distribution of the head and tail of the silicon rod, which is conducive to pulling out all the silicon material in the crucible, with higher crystal pulling efficiency and lower crucible retention rate.

[0029] Additional aspects and advantages of the present application will be given in part in the description below, and in part will become apparent from the description below, or will be learned through the practice of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a schematic diagram of the structure of a silicon wafer provided in one embodiment of the present application;

[0031] Figure 2 is a schematic diagram of the structure of a silicon wafer provided in one embodiment of the present application;

[0032] Figure 3 is a schematic diagram of the structure of a silicon wafer provided in one embodiment of the present application;

[0033] Figure 4 is a schematic diagram of the structure of a silicon wafer provided in one embodiment of the present application;

[0034] Figure 5 is a schematic diagram of doping concentration distribution of a silicon wafer provided in one embodiment of the present application;

[0035] Figure 6 is a schematic structural diagram of a silicon rod provided in one embodiment of the present application;

[0036] Figure 7 is a schematic structural diagram of a silicon rod provided in one embodiment of the present application;

[0037] Figure 8 is a schematic structural diagram of a silicon rod provided in one embodiment of the present application;

[0038] Fig. 9 is a schematic structural diagram of a silicon rod provided in one embodiment of the present application;

[0039] Fig.10 yes Fig. 9 Schematic diagram of the structure of the test piece cut from the silicon rod;

[0040] Description of main component symbols:

[0041] Silicon wafer 10 , central region 11 , corner edge region 12 , first corner side 121 , second corner side 122 , transition region 13 , side edge region 14 , silicon rod 100 , head 1001 , tail 1002 , and skin 20 . DETAILED DESCRIPTION

[0042] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. Examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements with the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present application, and should not be construed as limiting the present application. In addition, it should be understood that the specific embodiments described herein are only used to explain the present application and are not intended to limit the present application.

[0043] In the description of the present application, it should be understood that the terms "upper", "lower", "back", "front", etc., indicating orientations or positional relationships are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0044] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.

[0045] The disclosure below provides many different embodiments or examples to realize the different structures of the present application. In order to simplify the disclosure of the present application, the parts and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present application. In addition, the present application can repeat reference numbers and / or reference letters in different examples, and this repetition is for the purpose of simplification and clarity, and does not indicate the relationship between the various embodiments and / or settings discussed in itself. In addition, the various specific processes and examples of materials provided by the present application, but those of ordinary skill in the art can be aware of the application of other processes and / or the use scenarios of other materials.

[0046] In the present application, since the conductivity type of the central area of ​​the silicon wafer is N-type and the conductivity type of the corner edge area is P-type, in the process of manufacturing solar cells based on silicon wafers, the corner edge area in the P-type can be used to withstand the contamination of the silicon wafer edge by copper ions, thereby reducing the recombination caused by copper ion contamination of the silicon wafer edge. At the same time, a PN junction can be formed in the silicon wafer, and after the solar cell is manufactured, a better field passivation effect can be formed in the solar cell, which is conducive to carrier transmission. In this way, it is conducive to improving the photoelectric conversion efficiency of the solar cell made based on the silicon wafer.

[0047] Embodiment 1

[0048] See also Figure 1 , Figure 2 , Figure 3 and Figure 4 The silicon wafer 10 of the embodiment of the present application includes a central area 11 and a corner edge area 12. The conductivity type of the central area 11 is N-type, and the conductivity type of the corner edge area 12 is P-type.

[0049] In the silicon wafer 10 of the embodiment of the present application, since the conductivity type of the central area 11 of the silicon wafer 10 is N-type and the conductivity type of the corner edge area 12 is P-type, in the process of making a solar cell based on the silicon wafer 10, the corner edge area 12 of P-type can be used to withstand the contamination of the edge of the silicon wafer 10 by copper ions, thereby reducing the recombination caused by the copper ion contamination of the edge of the silicon wafer 10. At the same time, a PN junction can be formed in the silicon wafer 10, and after the solar cell is made, a better field passivation effect can be formed in the solar cell, which is beneficial to carrier transmission. In this way, it is beneficial to improve the photoelectric conversion efficiency of the solar cell made based on the silicon wafer 10.

[0050] In the present application, the silicon wafer 10 is a single crystal silicon wafer 10. It can be understood that in other embodiments, the silicon wafer 10 may also be a multi-crystalline silicon wafer 10, which is not limited here.

[0051] In this embodiment, the silicon wafer 10 is square, and the four corners of the silicon wafer 10 are chamfered. It can be understood that in other embodiments, the silicon wafer 10 can be rectangular, circular, elliptical, triangular or other shapes; the corners of the silicon wafer 10 can be rounded, pointed or other shapes; the shapes of multiple corners of the silicon wafer 10 can be the same or different.

[0052] Specifically, the central region 11 refers to a spatial region extending outward from the center line of the silicon wafer 10 in the thickness direction. The center line forms a center point on two surfaces in the thickness direction of the silicon wafer 10. When viewed from the thickness direction of the silicon wafer 10, the central region 11 extends outward from the center point, such as Figure 1 , Figure 2 , Figure 3 and Figure 4 That is to say, the central region 11 is not formed only on the surface of the silicon wafer 10, but is a spatial region with thickness.

[0053] Specifically, the corner edge region 12 refers to a spatial region extending from the cutting surface of the corner of the silicon wafer 10 to the center line of the silicon wafer 10. It can be understood that the cross section of the silicon rod 100 is circular, and the silicon wafer 10 forms a corner, so the silicon rod 100 must be cut to form a cutting surface at the corner. For example, in the case where the corner of the silicon wafer 10 is chamfered or rounded, the cutting surface is the surface formed by cutting the chamfered or rounded corner.

[0054] Further, as mentioned above, the center line forms a center point on the two surfaces in the thickness direction of the silicon wafer 10. Therefore, when viewed from the thickness direction of the silicon wafer 10, the corner edge region 12 extends from the edge line of the corner of the silicon wafer 10 to the center point, as shown in FIG. Figure 1 , Figure 2 , Figure 3 and Figure 4That is to say, the corner edge region 12 is not formed only on the surface of the silicon wafer 10, but is a spatial region with thickness.

[0055] Specifically, the thickness of the silicon wafer 10 may be 30 μm-300 μm, for example, 30 um, 40 um, 50 um, 60 um, 70 um, 80 um, 90 um, 100 um, 150 um, 200 um, 250 um, 300 um. In this way, it is possible to avoid the silicon wafer 10 being too thin, which may result in a too low concentration of photogenerated carriers, and it is also possible to avoid the silicon wafer 10 being too thick, which may result in an excessively high cost of the battery.

[0056] Specifically, “the conductivity type of the central region 11 is N type” means that the conductivity type presented by the central region 11 is N type. This does not mean that the type of doping elements in the central region 11 is limited.

[0057] Further, in some embodiments, the central region 11 may not include P-type doping elements, but include N-type doping elements, so that the conductivity type of the central region 11 is N-type. In other embodiments, the central region 11 may also include P-type doping elements and N-type doping elements, and the concentration of the N-type doping elements is greater than the concentration of the P-type doping elements, so that the conductivity type of the central region 11 is N-type.

[0058] Specifically, “the conductivity type of the corner edge region 12 is P type” means that the conductivity type presented by the corner edge region 12 is P type. This does not mean that the type of doping element of the corner edge region 12 is limited.

[0059] Further, in some embodiments, the corner edge region 12 may not include N-type doping elements, but include P-type doping elements, so that the conductivity type of the corner edge region 12 is P-type. In other embodiments, the corner edge region 12 may also include P-type doping elements and N-type doping elements, and the concentration of the P-type doping elements is greater than the concentration of the N-type doping elements, so that the conductivity type of the central region 11 is P-type.

[0060] Embodiment 2

[0061] In some embodiments, the doping element of the central region 11 includes an N-type doping element, and the N-type doping element includes at least one of a fifth main group element and a sixth main group element.

[0062] Specifically, the fifth main group elements include nitrogen, phosphorus, arsenic, antimony, and bismuth.

[0063] Specifically, the sixth main group elements include oxygen, sulfur, selenium, tellurium, and polonium.

[0064] That is, the doping element of the central region 11 includes at least one of nitrogen, phosphorus, arsenic, antimony, bismuth, oxygen, sulfur, selenium, tellurium, and polonium. In this way, a variety of doping elements are provided, making the doping elements of the central region 11 more flexible and adaptable to more actual production scenarios.

[0065] In one example, the doping elements of the central region 11 include oxygen, nitrogen, phosphorus, and arsenic. In another example, the doping elements of the central region 11 include oxygen and phosphorus. This is not limited here.

[0066] Embodiment 3

[0067] In some embodiments, the doping element of the corner edge region 12 includes a P-type doping element, and the P-type doping element includes at least one element of the third main group elements.

[0068] Specifically, the third main group elements include boron, aluminum, gallium, indium, and thallium.

[0069] That is, the doping element of the corner edge region 12 includes at least one of boron, aluminum, gallium, indium, and thallium. In this way, multiple doping elements are provided, making the doping elements of the corner edge region 12 more flexible and adaptable to more actual production scenarios.

[0070] In one example, the doping element of the corner edge region 12 includes boron and aluminum. In another example, the doping element of the corner edge region 12 includes boron. This is not limited here.

[0071] Embodiment 4

[0072] See also Figure 3 and Figure 4 In some embodiments, the silicon wafer 10 includes a side edge region 14 , and the side edge region 14 is located between two adjacent corner edge regions 12 . The conductivity type of the side edge region 14 is P type.

[0073] In this way, not only the conductivity type of the corner edge region 12 is P type, but the conductivity type of the side edge region 14 between two adjacent corner edge regions 12 is also P type, so that the side edge region 14 of the silicon wafer 10 can also withstand the contamination of copper ions, further reducing the recombination caused by copper ion contamination of the edge of the silicon wafer 10, which is beneficial to improving the photoelectric conversion efficiency.

[0074] Specifically, the edge region 14 refers to a spatial region extending from the cutting plane of the side length of the silicon wafer 10 to the center line of the silicon wafer 10. It can be understood that the cross section of the silicon rod 100 is circular, and the silicon wafer 10 is formed in a square shape, so the silicon rod 100 must be cut to form a cutting plane at the side length of the square.

[0075] Further, as mentioned above, the center line forms a center point on the two surfaces in the thickness direction of the silicon wafer 10. Therefore, from the thickness direction of the silicon wafer 10, the edge region 14 extends from the edge line of the side length of the silicon wafer 10 to the center point, as shown in FIG. Figure 3 and Figure 4 That is to say, the edge region 14 is not formed only on the surface of the silicon wafer 10, but is a space region with thickness.

[0076] It can be understood that the side edge region 14 can be the region between the corner edge regions 12 on both sides, and can be connected to the corner edge regions 12 on both sides. Figure 4 The side edge region 14 may also be the intersection of the corner edge regions 12 on both sides, such as Figure 3 The edge region 14 may be the long side of the silicon wafer 10 between the corner edge regions 12 on both sides, as shown in FIG. Figure 1 and Figure 2 shown.

[0077] Embodiment 5

[0078] See also Figure 1 and Figure 2 In some embodiments, the surface of the central region 11 in the thickness direction of the silicon wafer 10 is circular, the center of the circle is the center point of the silicon wafer 10, and the radius is 1 / 5-1 / 2 of the side length of the silicon wafer 10. For example, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, 0.48, 0.5.

[0079] In this way, the size of the central area 11 is within an appropriate range, which can avoid the smaller range of the PN junction formed in the silicon wafer 10 and the poor field passivation effect caused by the size being too small, and can also avoid the smaller range of the corner edge area 12 and the poor recombination effect caused by reducing copper ion contamination of the edge of the silicon wafer 10 due to the size being too large.

[0080] Embodiment 6

[0081] See also Figure 1 , Figure 2 and Figure 3 In some embodiments, the corner edge region 12 includes a first corner edge 121 and a second corner edge 122 , wherein the length d1 of the first corner edge 121 is 1 / 100-1 / 2 of the side length d0 of the silicon wafer 10 , and the length d2 of the second corner edge 122 is 1 / 100-1 / 2 of the side length d0 of the silicon wafer 10 .

[0082] In this way, the lengths of the two corner sides of the corner edge region 12 are within an appropriate range, thereby making the corner edge region 12 within an appropriate range, which can avoid the poor recombination effect caused by the reduction of copper ion contamination of the edge of the silicon wafer 10 due to the corner edge region 12 being too small, and can also avoid the small range of the PN junction formed in the silicon wafer 10 and the poor field passivation effect caused by the corner edge region 12 being too large.

[0083] Specifically, the first corner edge 121 and the second corner edge 122 refer to the portion of the long side of the silicon wafer 10 in the corner edge region 12. It can be understood that the long side of the silicon wafer 10 does not include the rounded or chamfered arc side, but refers to the long side at both ends of the rounded or chamfered corner.

[0084] Specifically, the length of the first corner edge 121 is, for example, 0.01, 0.08, 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, or 0.5 of the side length of the silicon wafer 10 .

[0085] Specifically, the length of the second corner edge 122 is, for example, 0.01, 0.08, 0.1, 0.15, 0.2, 0.25, 0.3, 0.35, 0.4, 0.45, or 0.5 of the side length of the silicon wafer 10 .

[0086] Specifically, the length of the first corner side 121 and the length of the second corner side 122 may be the same or different.

[0087] It can be understood that when the length of the first corner edge 121 and the second corner edge 122 is 1 / 2 of the side length of the silicon wafer 10, the conductivity type of all the outer edges of the silicon wafer 10 is P type, such as Figure 3 and Figure 4 shown.

[0088] Embodiment 7

[0089] See also Figure 1 In some embodiments, the ratio of the resistivity of the corner edge region 12 to the resistivity of the central region 11 is greater than or equal to 1.2, for example, 1.2, 1.5, 1.8, 2, 3, 4, 7, 8, etc.

[0090] In this way, the resistivity of the corner edge region 12 is greater than that of the central region 11, which is beneficial to reduce recombination and improve conversion efficiency. It can be understood that the resistivity of the corner edge region 12 is greater than that of the central region 11, which means that the P-type doping concentration of the corner edge region 12 is lower than that of the central region 11, so the P-type doping elements, such as group III elements, can be reduced in the corner edge region 12, thereby reducing the compound pairs formed by the group III elements and oxygen in the corner edge region 12 and the recombination caused by the doping elements themselves, thereby improving the conversion efficiency.

[0091] Embodiment 8

[0092] See also Figure 1 In some embodiments, the resistivity of the central region 11 is greater than or equal to 10Ω·cm, such as 10Ω·cm, 13Ω·cm, 50Ω·cm, 100Ω·cm, 108Ω·cm, 191Ω·cm, 120Ω·cm, 203Ω·cm, 711Ω·cm, etc.

[0093] In this way, the resistivity of the central region 11 is within an appropriate range, which can avoid the high central oxygen content and high oxygen donor concentration caused by the resistivity of the central region 11 being too small, thereby avoiding the formation of oxygen precipitation in the battery manufacturing process and affecting the battery efficiency and yield.

[0094] Embodiment 9

[0095] See also Figure 1 In some embodiments, the resistivity of the corner edge region 12 is greater than or equal to 100Ω·cm, for example, 100Ω·cm, 110Ω·cm, 150Ω·cm, 200Ω·cm, 483Ω·cm, 1059Ω·cm, 3523Ω·cm, 947Ω·cm, 1512Ω·cm, etc.

[0096] In this way, the resistivity of the corner edge region 12 is within an appropriate range, which can prevent the resistivity of the corner edge region 12 from being too small. The resistivity of the corner edge region 12 can be further increased by controlling the rate of reduction of the acceptor doping concentration during the crystal pulling process.

[0097] Embodiment 10

[0098] See also Figure 1 In some embodiments, the acceptor impurity concentration of the corner edge region 12 is less than the acceptor impurity concentration of the central region 11 , and less than the donor impurity concentration of the central region 11 .

[0099] In this way, the recombination caused by copper pollution can be further reduced, which is beneficial to improving the photoelectric conversion efficiency of the solar cell made based on the silicon wafer 10.

[0100] Specifically, the acceptor impurity refers to a P-type doping element, and the donor impurity refers to an N-type doping element.

[0101] It can be understood that since the acceptor impurity concentration in the corner edge region 12 is lower than that in the central region 11, the P-type doping elements, such as group III elements, can be reduced in the corner edge region 12, thereby reducing the composite pairs formed by the group III elements and oxygen in the corner edge region 12 and the recombination caused by the doping elements themselves, thereby improving the conversion efficiency.

[0102] It can be understood that since the acceptor impurity concentration of the central region 11 is lower than the donor impurity concentration of the central region 11 , the central region 11 exhibits an N-type.

[0103] Embodiment 11

[0104] See also Figure 1 In some embodiments, the ratio of the acceptor impurity concentration in the central region 11 to the acceptor impurity concentration in the corner edge region 12 is 1.01-10, for example, 1.01, 1.02, 1.05, 1.1, 1.5, 1.8, 2, 3, 5, 8, 9, 10.

[0105] In this way, the ratio of the acceptor impurity concentration in the central area 11 to the acceptor impurity concentration in the corner edge area 12 is in an appropriate range, which can avoid the situation where the crystallization interface is too flat, the pulling speed is slow, and the yield is low due to a too small ratio, and can also avoid the situation where the crystallization interface is more concave toward the melt, the thermal stress is large, and it is easy to break into polycrystalline due to a too large ratio.

[0106] Embodiment 12

[0107] See also Figure 1 In some embodiments, the acceptor impurity concentration in the corner edge region 12 is less than or equal to 10 15 atoms / cm 3 For example, 1×10 15 atoms / cm 3 , 0.8×10 15 atoms / cm 3 , 0.5×10 15 atoms / cm 3 , 0.1×10 15 atoms / cm 3 wait.

[0108] In this way, the acceptor impurity concentration in the corner edge region 12 is within an appropriate range, which can avoid the excessive acceptor impurity concentration in the corner edge region 12 causing the formation of complex pairs with oxygen and the large number of complexes caused by the doping elements themselves, which is beneficial to improving the conversion efficiency.

[0109] Embodiment 13

[0110] See also Figure 1 , Figure 2 and Figure 3 In some embodiments, the silicon wafer 10 includes a transition region 13, which is located between the central region 11 and the corner edge region 12, and the resistivity of the transition region 13 is greater than the resistivity of the central region 11, and the resistivity of the transition region 13 is greater than the resistivity of the corner edge region 12.

[0111] In this way, a PIN junction can be formed in the silicon wafer 10 to reduce the recombination of PN direct contact. After the solar cell is manufactured, a better field passivation effect can be formed in the solar cell, which is beneficial to carrier transmission.

[0112] Specifically, the transition region 13 is located between the central region 11 and the corner edge region 12, which means that the transition region 13 separates the central region 11 from the corner edge region 12. It can be understood that the transition region 13 can achieve a transition in the concentration of doping elements between the central region 11 and the corner edge region 12, where the donor concentration (such as oxygen donor) is equivalent to the acceptor concentration, and the transition in conductivity type can also be achieved.

[0113] Embodiment 14

[0114] See also Figure 1 , Figure 2 and Figure 3 In some embodiments, the resistivity of the transition region 13 is greater than or equal to 1000Ω·cm. The resistivity of the transition region 13 is, for example, 1000Ω·cm, 1010Ω·cm, 1100Ω·cm, 1500Ω·cm, 1800Ω·cm, 2000Ω·cm, 2010Ω·cm, 2100Ω·cm, 2500Ω·cm, or 2800Ω·cm.

[0115] In this way, after the solar cell is manufactured, the surrounding field passivation effect can be further improved in the solar cell, which is beneficial to further improve the carrier transport.

[0116] Embodiment 15

[0117] See also Figure 5 In some embodiments, the doping elements in the central region 11 and the corner edge region 12 both include P-type doping elements and N-type doping elements, the doping concentration of the N-type doping elements in the central region 11 is greater than the doping concentration of the P-type doping elements in the central region 11, and the doping concentration of the P-type doping elements in the corner edge region 12 is greater than the doping concentration of the N-type doping elements in the corner edge region 12; the absolute value K1 of the slope of the concentration curve of the N-type doping elements is greater than the absolute value K2 of the slope of the concentration curve of the P-type doping elements; the abscissa of the concentration curve of the N-type doping elements is the distance from the test position of the silicon wafer 10 to the center point of the silicon wafer 10, and the ordinate is the concentration of the N-type doping elements at the test position; the abscissa of the concentration curve of the P-type doping elements is the distance from the test position to the center point of the silicon wafer 10, and the ordinate is the concentration of the P-type doping elements at the test position.

[0118] In this way, since the absolute value of the slope K1 of the concentration curve of the N-type doping element is greater than the absolute value of the slope K2 of the concentration curve of the P-type doping element, the concentration of the N-type doping element can drop faster than the concentration of the P-type doping element from the center point of the silicon wafer 10 to the outside, thereby ensuring that the conductivity type of the central area 11 is N-type, while the conductivity type of the corner edge area 12 is P-type.

[0119] Specifically, in Figure 5 In the example, 0 corresponds to the center point of the silicon wafer 10, and R corresponds to the position in the silicon wafer 10 where the distance to the center point is the largest. Obviously, at the center point of the silicon wafer 10, the doping concentration N1 of the N-type doping element is greater than the doping concentration P1 of the P-type doping element, which ensures that the conductivity type in the central area 11 is N-type. Obviously, at the position in the silicon wafer 10 where the distance to the center point is the largest, that is, the edge of the corner edge area 12, the doping concentration N2 of the N-type doping element is less than the doping concentration P2 of the P-type doping element, which ensures that the conductivity type at the edge of the corner edge area 12 is P-type. Obviously, the intersection of the concentration curve of the N-type doping element and the concentration curve of the P-type doping element is located in the middle area 13, at which time the concentrations of the N-type doping element and the P-type doping element are equal.

[0120] Embodiment 16

[0121] See also Figure 5 In some embodiments, the absolute value of the slope of the concentration curve of the N-type doping element and the absolute value of the slope of the concentration curve of the P-type doping element satisfy the following formula:

[0122]

[0123] Among them, a is the side length of the silicon substrate, N1 is the doping concentration of the N-type doping element in the central area 11, P1 is the doping concentration of the P-type doping element in the central area 11, K1 is the absolute value of the slope of the concentration curve of the N-type doping element, and K2 is the absolute value of the slope of the concentration curve of the P-type doping element.

[0124] In this way, the difference between the absolute value K1 of the slope of the concentration curve of the N-type doping element and the absolute value K2 of the slope of the concentration curve of the P-type doping element is within an appropriate range, which can avoid the central area 11 being too small due to a large difference, and can also avoid the central area 11 being too large due to a small difference or even the absence of the P-type corner edge area 12 in the silicon wafer.

[0125] Embodiment 17

[0126] The solar cell of the embodiment of the present application is manufactured based on the silicon wafer 10 of any one of the first to sixteenth embodiments.

[0127] In the solar cell of the embodiment of the present application, since the conductivity type of the central area 11 of the silicon wafer 10 is N-type and the conductivity type of the corner edge area 12 is P-type, in the process of manufacturing the solar cell based on the silicon wafer 10, the corner edge area 12 of P-type can be used to withstand the contamination of the edge of the silicon wafer 10 by copper ions, thereby reducing the recombination caused by the copper ion contamination of the edge of the silicon wafer 10. At the same time, a PN junction can be formed in the silicon wafer 10, and after the solar cell is manufactured, a better field passivation effect can be formed in the solar cell, which is beneficial to carrier transmission. In this way, it is beneficial to improve the photoelectric conversion efficiency of the solar cell made based on the silicon wafer 10.

[0128] Embodiment 18

[0129] The battery assembly of the embodiment of the present application includes the solar cell of embodiment seventeen.

[0130] In the battery assembly of the embodiment of the present application, since the conductivity type of the central area 11 of the silicon wafer 10 is N-type and the conductivity type of the corner edge area 12 is P-type, in the process of making a solar cell based on the silicon wafer 10, the corner edge area 12 of P-type can be used to withstand the contamination of the edge of the silicon wafer 10 by copper ions, thereby reducing the recombination caused by the copper ion contamination of the edge of the silicon wafer 10. At the same time, a PN junction can be formed in the silicon wafer 10, and after the solar cell is made, a better field passivation effect can be formed in the solar cell, which is beneficial to carrier transmission. In this way, it is beneficial to improve the photoelectric conversion efficiency of the solar cell made based on the silicon wafer 10.

[0131] In this embodiment, multiple solar cells in the battery assembly can be connected in series in sequence to form a battery string, thereby realizing the series bus output of current. For example, the series connection of battery cells can be realized by setting welding strips (bus bars, interconnecting strips), conductive backplanes, etc.

[0132] It is understandable that in such an embodiment, the battery assembly may also include a metal frame, a back plate, photovoltaic glass and an adhesive film. The adhesive film may be filled between the front and back of the solar cell and the photovoltaic glass, adjacent cells, etc. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the adhesive film may be an EVA adhesive film or a POE adhesive film. The specific selection may be based on actual conditions and is not limited here.

[0133] Photovoltaic glass can cover the adhesive film on the front of the solar cell. The photovoltaic glass can be ultra-white glass, which has high light transmittance, high transparency, and excellent physical, mechanical and optical properties. For example, the light transmittance of ultra-white glass can reach more than 92%, which can protect the solar cell without affecting the efficiency of the solar cell as much as possible. At the same time, the adhesive film can bond the photovoltaic glass and the solar cell together. The presence of the adhesive film can seal and insulate the solar cell and make it waterproof and moisture-proof.

[0134] The backplane can be attached to the adhesive film on the back of the solar cell. The backplane can protect and support the solar cell and has reliable insulation, water resistance and aging resistance. There are multiple options for the backplane, which can usually be tempered glass, organic glass, aluminum alloy TPT composite adhesive film, etc. It can be set according to the specific situation and is not limited here. The whole composed of the backplane, solar cell, adhesive film and photovoltaic glass can be set on a metal frame. The metal frame serves as the main external support structure of the entire battery assembly and can stably support and install the battery assembly. For example, the battery assembly can be installed at the required location through the metal frame.

[0135] Embodiment 19

[0136] The photovoltaic system of the embodiment of the present application includes the battery assembly of the eighteenth embodiment.

[0137] In the photovoltaic system of the embodiment of the present application, since the conductivity type of the central area 11 of the silicon wafer 10 is N-type and the conductivity type of the corner edge area 12 is P-type, in the process of making a solar cell based on the silicon wafer 10, the corner edge area 12 of P-type can be used to withstand the contamination of the edge of the silicon wafer 10 by copper ions, thereby reducing the recombination caused by the copper ion contamination of the edge of the silicon wafer 10. At the same time, a PN junction can be formed in the silicon wafer 10, and after the solar cell is made, a better field passivation effect can be formed in the solar cell, which is beneficial to carrier transmission. In this way, it is beneficial to improve the photoelectric conversion efficiency of the solar cell made based on the silicon wafer 10.

[0138] In this embodiment, the photovoltaic system can be applied to photovoltaic power stations, such as ground power stations, rooftop power stations, water power stations, etc., and can also be applied to equipment or devices that use solar energy to generate electricity, such as user solar power supplies, solar street lights, solar cars, solar buildings, etc. Of course, it can be understood that the application scenarios of the photovoltaic system are not limited to this, that is to say, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking the photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a junction box and an inverter. The photovoltaic array may be an array combination of multiple battery components. For example, multiple battery components can form multiple photovoltaic arrays. The photovoltaic array is connected to the junction box. The junction box can converge the current generated by the photovoltaic array. The converged current flows through the inverter and is converted into the alternating current required by the mains power grid, and then connected to the mains network to realize solar power supply.

[0139] Embodiment 20

[0140] See also Figure 6 , Figure 7 and Figure 8The silicon rod 100 of the embodiment of the present application includes a central area 11 and a skin 20. The conductivity type of the central area 11 is N-type, and the conductivity type of the skin 20 is P-type. The silicon wafer 10 of any one of embodiments 1 to 14 is cut from the silicon rod 100.

[0141] The silicon rod 100 of the embodiment of the present application has a higher minority carrier lifetime because the conductivity type of the central region 11 is N-type and the conductivity type of the skin 20 is P-type, and the necessity of adding dopants is reduced. In the undoped state, the resistivity is uniform, and there is no need to consider the resistivity distribution of the head and tail of the silicon rod 100, which is conducive to pulling out all the silicon material in the crucible, with higher crystal pulling efficiency and lower crucible retention rate.

[0142] Moreover, the silicon wafer 10 cut from the silicon rod 100 has an N-type conductivity in the central region 11 and a P-type conductivity in the corner edge region 12. Therefore, in the process of manufacturing a solar cell based on the silicon wafer 10, the P-type corner edge region 12 can be used to withstand the contamination of the edge of the silicon wafer 10 by copper ions, thereby reducing the recombination caused by the copper ion contamination of the edge of the silicon wafer 10. At the same time, a PN junction can be formed in the silicon wafer 10. After the solar cell is manufactured, a better field passivation effect can be formed in the solar cell, which is beneficial to carrier transmission. In this way, it is beneficial to improve the photoelectric conversion efficiency of the solar cell made based on the silicon wafer 10.

[0143] It can be understood that since the silicon wafer 10 is cut from the silicon rod 100, the central area 11 of the silicon rod 100 corresponds to the central area 11 of the silicon wafer 10. The explanations and descriptions can be cross-referenced.

[0144] Specifically, the skin 20 refers to the outer layer of the silicon rod 100 .

[0145] Embodiment 21

[0146] See also Figure 6 and Figure 8 In some embodiments, the central region 11 is in a truncated cone or a conical shape, and the cross-sectional area of ​​the central region 11 gradually decreases along the direction from the head 1001 of the silicon rod 100 to the tail 1002 of the silicon rod 100 .

[0147] Specifically, the head 1001 of the silicon rod 100 may have an N-type conductivity type in all regions, or may have an N-type conductivity type in some regions, and the conductivity type in the remaining regions may be P-type. It is understood that when the silicon rod 100 is cut into silicon wafers, it is not necessary to remove the head 1001 of the silicon rod 100. The silicon wafer with an N-type conductivity type in all regions cut out from the head 1001 of the silicon rod 100 is not the silicon wafer 10 with an N-type conductivity type in the central region 11 and a P-type conductivity type in the corner edge region 12 as in this case, but it can still be used to make batteries.

[0148] Specifically, the tail 1002 of the silicon rod 100 may have a conductivity type of P type in all regions, or may have a conductivity type of P type in some regions, and the conductivity type of the remaining regions may be N type. It is understood that when the silicon rod 100 is cut into silicon wafers, it is not necessary to remove the tail 1002 of the silicon rod 100. The silicon wafer with a conductivity type of P type in all regions cut out from the tail 1002 of the silicon rod 100 is not the silicon wafer 10 with a conductivity type of N type in the central region 11 and a conductivity type of P type in the corner edge region 12 of the present case, but it can still be used to make batteries.

[0149] See also Fig. 9 and Fig.10 In one example, five test pieces are cut from the silicon rod 100, which are respectively recorded as the first test piece 1021, the second test piece 1022, the third test piece 1023, the fourth test piece 1024, the fifth test piece 1025, and the sixth test piece 1026. The corner edge point A, the transition area point B, and the center point C on each test piece are used as detection points for detection, and the results in Tables 1 and 2 below are obtained.

[0150] Table 1

[0151]

[0152] Table 2

[0153]

[0154] Obviously, the second test piece 1022 , the third test piece 1023 , the fourth test piece 1024 , the fifth test piece 1025 , and the sixth test piece 1026 are the silicon wafer 1010 of the embodiment of the present application.

[0155] A battery made based on a silicon wafer in the related art is used as a comparative example and compared with a battery made based on the silicon wafer 10 of the present application using the same process.

[0156] A battery made of a silicon wafer in the related art is used as comparative example 1. The conductivity type of the central area and the corner edge area of ​​the silicon wafer is N-type. The battery made of this silicon wafer has an open circuit voltage of 0.731V and a short circuit current of 42.7mA / cm 2 , the filling factor is 0.843 and the conversion efficiency is 26.31%.

[0157] A battery made of another silicon wafer in the related art is used as comparative example 2. The conductivity type of the central area and the corner edge area of ​​the silicon wafer is P type. The battery made of this silicon wafer has an open circuit voltage of 0.721V and a short circuit current of 41.8mA / cm 2 , the filling factor is 0.841 and the conversion efficiency is 25.35%.

[0158] In an example of the silicon wafer 10 in the present application, the conductivity type of the central area 11 is N-type, and the conductivity type of the corner edge area 12 is P-type. The central area 11 is centered at the center point of the silicon wafer, and the radius is 1 / 5 of the side length of the silicon wafer. The battery made from the silicon wafer 10 has an open circuit voltage of 0.743V and a short circuit current of 42.7mA / cm 2 , the filling factor is 0.846 and the conversion efficiency is 26.84%.

[0159] In an example of the silicon wafer 10 in the present application, the conductivity type of the central area 11 is N-type, and the conductivity type of the corner edge area 12 is P-type. The central area 11 is centered at the center point of the silicon wafer, and the radius is 1 / 2 of the side length of the silicon wafer. The battery made from the silicon wafer 10 has an open circuit voltage of 0.747V and a short circuit current of 42.8mA / cm 2 , the filling factor is 0.851 and the conversion efficiency is 27.21%.

[0160] Obviously, compared with the battery made by the same process based on the silicon wafer in the related technology, the solar cell made of the silicon wafer 10 in the embodiment of the present application has a higher open circuit voltage, the same or higher short circuit current, a higher fill factor, and a significantly improved conversion efficiency.

[0161] In the description of this specification, the description with reference to the terms "some embodiments", "illustrative embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiments or examples are included in at least one embodiment or example of the present application. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0162] In addition, the above are only preferred embodiments of the present application and are not intended to limit the present application. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present application should be included in the protection scope of the present application.

Claims

1. A silicon wafer, characterized in that: It comprises a central region and a corner edge region, the conductivity type of the central region is N type, and the conductivity type of the corner edge region is P type.

2. The silicon wafer according to claim 1, characterized in that: The silicon wafer comprises a side edge region, the side edge region is located between two adjacent corner edge regions, and the conductivity type of the side edge region is P type.

3. The silicon wafer according to claim 1, characterized in that: The surface of the central area in the thickness direction of the silicon wafer is circular, the center of the circle is the center point of the silicon wafer, and the radius is 1 / 5-1 / 2 of the side length of the silicon wafer.

4. The silicon wafer according to claim 1, characterized in that: The corner edge region includes a first corner side and a second corner side, the length of the first corner side is 1 / 100-1 / 2 of the side length of the silicon wafer, and the length of the second corner side is 1 / 100-1 / 2 of the side length of the silicon wafer.

5. The silicon wafer according to claim 1, characterized in that: A ratio of the resistivity of the corner edge region to the resistivity of the central region is greater than or equal to 1.

2.

6. The silicon wafer according to claim 1, characterized in that: The resistivity of the central region is greater than or equal to 10Ω·cm.

7. The silicon wafer according to claim 1, characterized in that: The resistivity of the corner edge region is greater than or equal to 100Ω·cm.

8. The silicon wafer according to claim 1, characterized in that: The silicon wafer includes a transition region, which is located between the central region and the corner edge region. The resistivity of the transition region is greater than the resistivity of the central region, and the resistivity of the transition region is greater than the resistivity of the corner edge region.

9. The silicon wafer according to claim 8, characterized in that: The resistivity of the transition region is greater than or equal to 1000 Ω·cm.

10. A solar cell, characterized in that: Made based on the silicon wafer according to any one of claims 1-9.

11. A battery assembly, characterized in that: Comprising the solar cell according to claim 10.

12. A photovoltaic system, characterized in that: A battery assembly comprising the battery assembly of claim 11.

13. A silicon rod, characterized in that: It comprises a central region and a skin, the conductivity type of the central region is N-type, the conductivity type of the skin is P-type, and the silicon wafer according to any one of claims 1 to 9 is cut from the silicon rod.

14. The silicon rod according to claim 13, characterized in that: The central region is in a truncated cone shape or a conical shape, and the cross-sectional area of ​​the central region gradually decreases along the direction from the head of the silicon rod to the tail of the silicon rod.

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