Electroencephalogram acquisition module

Abstract

The utility model relates to the technical field of electroencephalogram detection, and discloses an electroencephalogram acquisition module and electroencephalogram acquisition equipment, which comprise an electrode plate and an acquisition chip, the electrode plate comprises a collecting electrode, a common reference electrode and a driving electrode; the acquisition electrode, the common reference electrode and the driving electrode are respectively connected with the acquisition chip through a filter circuit; the common reference electrode is also connected with a bias driving circuit; the filter circuit is used for filtering high-frequency noise; the bias driving circuit is used for feeding a common-mode signal back to each electrode channel so as to eliminate common-mode interference; the acquisition chip is used for receiving the de-noised electroencephalogram signals, performing analog-to-digital conversion on the de-noised electroencephalogram signals and then amplifying the corresponding electroencephalogram signals. Compared with the prior art, the electroencephalogram signal collecting circuit has the advantages that common-mode interference of collected electroencephalogram signals is counteracted through the circuit, high-frequency interference is filtered out, the accuracy of the collected electroencephalogram signals is effectively improved, and more accurate physiological data information is provided for follow-up diagnosis or research.

Description

Technical Field

[0001] The utility model relates to the technical field of electroencephalogram detection, and relates to an electroencephalogram acquisition module and electroencephalogram acquisition equipment. Background Art

[0002] EEG signals contain a lot of physiological and disease information. In clinical medicine, EEG signals during human sleep can not only be used as physiological data for the diagnosis of related diseases, but also as research data to explore the quality of human sleep. EEG signals are a comprehensive reflection of the potential generated by the activity of human neuronal cells, and their different activity characteristics represent different physical reactions. However, EEG signals are extremely weak, with a main frequency band of 0.5Hz to 100Hz and a signal amplitude range of 5μV to 100μV. They are easily interfered by other signals. At the same time, due to the distributed capacitance of the human body, muscle activity, and the influence of the external electromagnetic environment on electronic components, EEG signals usually carry a variety of interference signals, such as baseline drift, power frequency interference, myoelectric interference, etc.

[0003] However, the EEG detector or EEG acquisition module in the prior art is relatively simple in terms of the acquisition and noise removal of EEG signals, and cannot obtain relatively accurate EEG signals. Utility Model Content

[0004] In order to overcome the defect that the EEG signals collected by the EEG collection module in the prior art are not accurate enough, the utility model proposes an EEG collection module and an EEG collection device, and the specific technical scheme is as follows:

[0005] A brain wave acquisition module comprises an electrode sheet and an acquisition chip; the electrode sheet comprises an acquisition electrode, a common reference electrode, and a driving electrode; the acquisition electrode, the common reference electrode, and the driving electrode are respectively connected to the acquisition chip through a filtering circuit; the driving electrode is also connected to a bias driving circuit; the filtering circuit is used to filter out high-frequency noise; the bias driving circuit is used to feed back a common-mode signal to each electrode channel to eliminate common-mode interference; the acquisition chip is used to receive the denoised brain wave signal and perform analog-to-digital conversion, and then amplify the corresponding brain wave signal.

[0006] Furthermore, the number of the electrode sheets is six, including four collection electrodes, one common reference electrode, and one driving electrode; the electrode sheets are all connected to the filter circuit via electrode lines.

[0007] Furthermore, the filtering circuit is a second-order passive filter circuit, which is used to filter out high-frequency noise greater than 100 Hz in the EEG signal.

[0008] Furthermore, the acquisition chip includes a plurality of channels, each channel is configured with a multiplexer and a corresponding register; the multiplexer can realize a multiplexing function by configuring the register.

[0009] Furthermore, the digital power supply end and the analog power supply end of the acquisition chip are both filtered by 0.1uf and 1uf capacitors, and a magnetic bead resistor is used between the digital ground and the analog ground for isolation.

[0010] Furthermore, the acquisition chip includes a bias drive amplifier; the bias drive circuit is a closed loop consisting of the bias drive amplifier, a feedback resistor, and a feedback capacitor.

[0011] Furthermore, the bias driving circuit also includes a current limiting resistor.

[0012] Furthermore, the acquisition chip is an ADS1299 chip with a built-in PGA amplifier circuit, which can perform 24-bit analog-to-digital conversion.

[0013] A brain wave acquisition device comprises a head-mounted housing and the above-mentioned brain wave acquisition module.

[0014] The beneficial effects of the utility model are as follows: the utility model proposes an EEG acquisition module, which utilizes a bias drive circuit to eliminate common-mode interference; and utilizes a filter circuit to eliminate high-frequency noise of the acquired EEG signal; compared with the prior art, the utility model utilizes a circuit to offset the common-mode interference of the acquired EEG signal and filters out high-frequency interference, thereby effectively improving the accuracy of the acquired EEG signal and providing more accurate physiological data information for subsequent diagnosis or research. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] in:

[0016] Figure 1 It is a flowchart of the work flow of the EEG acquisition module of the utility model.

[0017] Figure 2 This is a circuit diagram of the working principle of the acquisition chip of the utility model.

[0018] Figure 3 It is a schematic diagram of the working area of ​​the electrode sheet of the utility model.

[0019] Figure 4 It is a circuit diagram of the filter circuit of the utility model.

[0020] Figure 5 It is a schematic diagram of the channel configuration of the acquisition chip of the utility model.

[0021] Figure 6 It is a circuit diagram of the acquisition chip of the utility model.

[0022] Figure 7 It is a circuit diagram of the bias driving circuit of the utility model.

[0023] Figure 8 This is a timing configuration diagram of the control port of the acquisition chip of the utility model. DETAILED DESCRIPTION

[0024] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0025] The EEG signal is a very weak signal, with a main frequency range of 0.5Hz to 100Hz and a signal amplitude range of 5μV to 100μV, which is easily interfered by other signals. Figure 1 As shown, it includes a collection electrode, a common reference electrode, a driving electrode and a collection chip; the collection electrode, the common reference electrode and the driving electrode are respectively connected to the electrode line of the collection chip through a filtering circuit; the common reference electrode is also connected to a bias driving circuit.

[0026] In a specific embodiment, the number of electrode sheets is six, including four acquisition electrodes for measurement, a common reference electrode, and a driving electrode. Then, the electrode channel of each electrode sheet is connected to a second-order low-pass filter circuit through an electrode line, and the EEG signal after filtering out high-frequency noise enters the acquisition chip for a 24-bit analog-to-digital sampling. The acquisition chip can use the ADS1299 chip, and its circuit principle is as follows: Figure 2 As shown, the chip is internally provided with a PGA amplifier circuit, which can adjust the amplification factor of the EEG signal through the chip register configuration, thereby amplifying the converted EEG signal by a corresponding factor.

[0027] The electrode settings are as follows Figure 3As shown in the figure, from the distribution of different EEG signals of the human brain, α waves are concentrated in the occipital area (O1, O2), β waves are concentrated in the frontal area (F3, F4, Fz), θ waves are concentrated in the parietal area (P3, P4, Pz), and δ waves are concentrated in the temporal area (T3, T4). According to the montage connection method, we selected half of the head area for measurement, and placed the four acquisition channel electrodes in these four acquisition areas: O2, F4, P4, T4. The reference electrodes of the four channels use the same common reference electrode. The reference electrode is placed at the right earlobe, and the driving electrode is placed at the left earlobe. In order to suppress the common-mode interference generated by the human body, a set of bias driving circuits for suppressing interference is added to the left earlobe to connect to the driving electrode. The bias driving circuit forms a negative feedback circuit through the operational amplifier circuit inside the ADS1299 plus some resistors and capacitors, which can feed back the common-mode signal to the input port of each channel, thereby offsetting the input common-mode interference. At this time, there are six input channels in the electrode sheet, four of which correspond to the four areas for collecting EEG signals, and the remaining two are the channel common end and the interference feedback port. A second-order low-pass filter is installed at the front end of each channel to filter out high-frequency interference signals.

[0028] Filter circuit such as Figure 4 As shown, considering that the range of EEG signals is between 0.5Hz and 100Hz, a second-order passive filter circuit is used for filtering. The upper cutoff frequency formula of the filter at -3dB is as follows:

[0029]

[0030] When R=59Ω,C=0.1uF,f h ≈100.96Hz, this filter can filter out high-frequency noise signals, making the EEG signal more accurate.

[0031] like Figure 5 As shown, the acquisition chip contains multiple channels, each channel is configured with a multiplexer and corresponding registers. By configuring the registers, the multiplexer can be connected to the internal test signal test, test the internal noise, detect the temperature and other multiplexing functions.

[0032] In a specific embodiment, the acquisition chip can be selected from ADS1299 chip, and its specific connection is as follows: Figure 6As shown, only four of the eight groups of input pins are used. Groups 1 to 4 are connected to 5V input, the positive end (P end) of groups 5 to 8 is connected to the electrode, and the negative end (N end) is connected to the same reference electrode. 5V is used to power the analog AVDD, and 3.3V is used to power the digital DVDD. The digital power supply end and the analog power supply end of the acquisition chip are both filtered with 0.1uf and 1uf capacitors, and magnetic bead resistors are used between the digital ground DGND and the analog ground AGND to reduce mutual interference between digital and analog. The reference voltage of the acquisition chip uses the internal reference voltage, and a 100uf capacitor is connected to the ACP1 end, a 10uf capacitor is connected between VREFP and VREFN, and the AVSS end is connected to the VREFN end at the same time to complete the configuration.

[0033] The bias drive circuit is configured as Figure 7 As shown, the bias drive amplifier built into the acquisition chip is used for configuration. The bias drive circuit includes the bias drive amplifier of the acquisition chip, feedback resistor R (1MΩ), and feedback capacitor C (1.5nf). The feedback resistor and feedback capacitor are used for phase compensation to prevent self-excitation. Select the positive reference terminal BIASREF of the BIAS_AMP op amp as (AVDD+AVSS) / 2, that is, the system ground AGND, to form a closed-loop structure. The bias drive circuit is actually a cancellation drive circuit. The common-mode signal Vc can generate a common-mode signal Vcf with opposite polarity on the human body through the feedback circuit, limiting the common-mode interference noise to a very narrow range. In practical applications, electrostatic protection must also be considered. Therefore, a current limiting resistor R6 needs to be added to the bias drive circuit to limit the current to prevent static electricity from causing harm to the human body.

[0034] For the ADS1299 acquisition chip, there are nine control ports, of which the ports mainly used for SPI data reading are SPI_CLK, SPI_START, SPI_CS, SPI_DOUT, SPI_DRDY, and SPI_DIN. The corresponding timing can be configured in the register to realize data reading and writing. The timing configuration can refer to Figure 8 After the chip is connected to the power supply, the register is configured first, and then the data is read. The data format of the acquisition chip is that one frame of data has 216 bits, including a flag bit and eight channel data, each data is 24 bits, and the flag bit data is always the same each time. Therefore, the EEG acquisition module of the utility model can also transmit the corresponding data by wireless transmission, such as through a Bluetooth module.

[0035] Each channel of EEG data is 24-bit data, and the output format is high-bit first, the highest bit is the sign bit, and the lowest bit LSB weight is VREF (2^23-1). Therefore, when performing data restoration calculations, the sign of the data must be determined first. The calculation formula for a positive number with the highest bit being 0 is as follows:

[0036]

[0037] The calculation formula for negative numbers with the highest bit being 1 is as follows:

[0038]

[0039] In the formula, D is the original 24-bit binary data code of EEG.

[0040] A brain wave acquisition device comprises a head-mounted shell, which can be in the form of a cap or a headband, and a brain wave acquisition module is fixed on the shell.

[0041] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the appended claims and their equivalents.

Claims

1. An EEG acquisition module, characterized in that: It includes an electrode sheet and a collection chip; the electrode sheet includes a collection electrode, a common reference electrode, and a driving electrode; the collection electrode, the common reference electrode, and the driving electrode are respectively connected to the collection chip through a filter circuit; the driving electrode is also connected to a bias driving circuit; The filter circuit is used to filter out high-frequency noise; the bias drive circuit is used to feed back the common-mode signal to each electrode channel to eliminate common-mode interference; the acquisition chip is used to receive the de-noised EEG signal and perform analog-to-digital conversion, and then amplify the corresponding EEG signal.

2. The EEG acquisition module according to claim 1, characterized in that: The number of the electrode sheets is six, including four collection electrodes, one common reference electrode, and one driving electrode; the electrode sheets are all connected to the filter circuit via electrode lines.

3. The EEG acquisition module according to claim 2, characterized in that: The filter circuit is a second-order passive filter circuit, which is used to filter out high-frequency noise greater than 100 Hz in the EEG signal.

4. The EEG acquisition module according to claim 1, characterized in that: The acquisition chip includes multiple channels, each channel is configured with a multiplexer and a corresponding register; the multiplexer can realize a multiplexing function by configuring the register.

5. The EEG acquisition module according to claim 4, characterized in that: The digital power supply end and the analog power supply end of the acquisition chip are both filtered by 0.1uf and 1uf capacitors, and a magnetic bead resistor is used between the digital ground and the analog ground for isolation.

6. The EEG acquisition module according to claim 4, characterized in that: The acquisition chip includes a bias drive amplifier; the bias drive circuit is a closed loop consisting of the bias drive amplifier, a feedback resistor, and a feedback capacitor.

7. The EEG acquisition module according to claim 6, characterized in that: The bias driving circuit also includes a current limiting resistor.

8. The EEG acquisition module according to any one of claims 1 to 7, characterized in that: The acquisition chip is an ADS1299 chip, which has a built-in PGA amplifier circuit and can perform 24-bit analog-to-digital conversion.

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