Electroencephalogram measurement circuit of intelligent wearable device

Abstract

The utility model discloses an electroencephalogram measuring circuit of an intelligent wearable device, the electroencephalogram measuring circuit comprises a data acquisition circuit, the data acquisition circuit comprises a chip U11, a resistor RS2, a resistor R39, a resistor R53, a capacitor C15, a capacitor C16, a capacitor C51, a capacitor C52, a capacitor C56, a capacitor C58 and a capacitor C62. According to the utility model, through the connection design of the chip U11, the capacitor and the resistor, accurate acquisition of electroencephalogram signals is realized, and the accuracy and reliability of data are ensured. The reasonable configuration of the capacitors and the resistors can help to stabilize the transmission and processing process of electroencephalogram signals, reduce interference and noise, and improve the stability of signal processing. The connection mode of the capacitor and the resistor is clear, maintenance and debugging are facilitated, and subsequent upgrading and improvement are also facilitated.

Description

Technical Field

[0001] The utility model belongs to the technical field of portable medical equipment, in particular to an electroencephalogram (EEG) measuring circuit for an intelligent wearable device. Background Art

[0002] Electroencephalography (EEG) is a technology that records the activity of brain neurons by placing electrodes on the scalp. EEG records the electrical activity of the cerebral cortex, reflecting the excitation and inhibition states of brain neurons. EEG can be used to diagnose brain diseases such as epilepsy, brain tumors, and stroke. Different diseases have specific manifestations on EEG. EEG can help study people's brain functions, such as cognition, emotions, and learning. EEG can help understand the brain's electrical activity patterns in different tasks and situations.

[0003] In the prior art, for example, the technical solution described in the utility model patent with publication number: CN219048540U is: an EEG signal acquisition system, which adopts a system architecture of sampling electrodes, ADC sampling chips, controller processing and serial port display screen to display EEG waveforms.

[0004] In the prior art, the existing EEG acquisition devices all adopt the traditional discrete component construction solution, which introduces a lot of external noise, affects the EEG acquisition signal, and causes the EEG signal acquisition to be inaccurate. Utility Model Content

[0005] The purpose of the utility model is to provide an EEG measurement circuit for an intelligent wearable device, so as to solve the problem in the prior art proposed in the background technology that the EEG acquisition devices all adopt the traditional discrete component construction solution, which introduces more external noise, affects the EEG acquisition signal, and makes the EEG signal acquisition inaccurate.

[0006] In order to solve the above technical problems, the technical solution adopted by the utility model is:

[0007] An electroencephalogram (EEG) measurement circuit for a smart wearable device, the EEG measurement circuit comprising a data acquisition circuit, the data acquisition circuit comprising a chip U11, a resistor RS2, a resistor R39, a resistor R53, a capacitor C15, a capacitor C16, a capacitor C51, a capacitor C52, a capacitor C56, a capacitor C58 and a capacitor C62;

[0008] Pin 1 of chip U11 is connected to one end of resistor RS2, and the other end of resistor RS2 is connected to one end of resistor R39; the other end of resistor R39 is connected to pin 8 of chip U11;

[0009] Pin 2 of chip U11 is connected to one end of capacitor C52 and one end of capacitor C56; Pin 3 of chip U11 is connected to one end of capacitor C51 and the other end of capacitor C52; the other end of capacitor C56 is grounded, and the other end of capacitor C51 is grounded;

[0010] Pin 4 of chip U11 is connected to capacitor C58, one end of capacitor C15 and a power source respectively; the other end of capacitor C58 and the other end of capacitor C15 are both grounded;

[0011] Pin 7 of chip U11 is connected to one end of capacitor C62, capacitor C16 and a power source respectively; the other ends of capacitor C62 and capacitor C16 are both grounded;

[0012] Pin 6 of the chip U11 is connected to one end of the resistor R53, and pin 6 of the chip U11 is also used for external signal input;

[0013] Pin 5 of the chip U11 and the other end of the resistor R53 are both grounded.

[0014] According to the above technical solution, the EEG measurement circuit also includes a connector J2, a signal amplification circuit and a signal processing circuit; wherein the signal processing circuit is respectively connected to the connector J2, the signal amplification circuit and the data acquisition circuit; the signal processing circuit is used to process the collected EEG data and amplify the signal through the signal processing circuit.

[0015] According to the above technical solution, the signal processing circuit includes amplifiers U10A, U10B, U10C, capacitor C38, capacitor C13, capacitor C14, resistor R5, resistor R10, resistor R11, resistor R14, resistor R15, resistor R18, resistor R30, resistor R45, resistor R16, inductor L11 and inductor L15;

[0016] Pin 3 of amplifier U10A is connected to capacitor C38 and one end of inductor L11 respectively, and the other end of inductor L11 is connected to pin 4 of connector J2; pin 2 of amplifier U10A is connected to resistor R5 and one end of resistor R10 respectively; pin 1 of amplifier U10A is connected to the other end of resistor R10 and resistor R14 and one end of capacitor C13 respectively; the other end of resistor R5 is connected to pin 6 of amplifier U10B and one end of resistor R11 respectively;

[0017] Pin 5 of amplifier U10B is respectively connected to the other end of capacitor C38 and one end of inductor L15; the other end of inductor L15 is connected to pin 5 of connector J2; pin 7 of amplifier U10B is respectively connected to the other end of resistor R11 and one end of resistor R15 and capacitor C14; the other end of resistor R15 is respectively connected to the other end of resistor R14 and pin 10 of amplifier U10C;

[0018] Pin 9 of amplifier U10C is respectively connected to pin 8 of amplifier U10C, the signal amplifying circuit, resistor R18 and one end of resistor R30;

[0019] The other end of the resistor R18 is connected to the other end of the capacitor C13 and one end of the resistor R45 respectively; the other end of the resistor R30 is connected to the other end of the capacitor C14 and one end of the capacitor R46 respectively;

[0020] The other ends of the resistor R45 and the resistor R46 are connected to the data acquisition circuit.

[0021] According to the above technical solution, the signal amplification circuit includes an amplifier U10D and a resistor R2; wherein, pin 12 of the amplifier U10D is connected to pin 8 of the amplifier U10C; pin 13 of the amplifier U10D is respectively connected to pin 14 of the amplifier U10D and one end of the resistor R2; the other end of the resistor R2 is connected to pin 1 of the connector J2.

[0022] According to the above technical solution, the connector J2 is also connected to the control circuit.

[0023] According to the above technical solution, the control circuit includes a diode D2, a diode D6, a diode D8, a diode D10, a resistor R35 and a resistor R54;

[0024] One end of the diode D2 is connected to the No. 5 pin of the connector J2 and the signal processing circuit respectively; the other end of the diode D2 is connected to the power supply and one end of the diode D6 respectively; the other end of the diode D6 is connected to the No. 4 pin of the connector J2, one end of the resistor R35 and the signal processing circuit respectively;

[0025] One end of the diode D8 is connected to the No. 4 pin of the connector J2 and the signal processing circuit respectively; the other end of the diode D8 is connected to the power supply and one end of the diode D10 respectively; the other end of the diode D10 is connected to the No. 5 pin of the connector J2, one end of the resistor R54 and the signal processing circuit respectively;

[0026] The other ends of the resistor R35 and the resistor R54 are both grounded.

[0027] Compared with the prior art, the utility model has the following beneficial effects:

[0028] In the utility model, the connection design of chip U11, capacitors and resistors is used to accurately collect EEG signals and ensure the accuracy and reliability of data. The reasonable configuration of capacitors and resistors can help stabilize the transmission and processing of EEG signals, reduce interference and noise, and improve the stability of signal processing. The connection method of capacitors and resistors is clear and easy to maintain and debug, and is also conducive to subsequent upgrades and improvements. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 This is the EEG acquisition circuit diagram of the utility model. DETAILED DESCRIPTION

[0030] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0031] Embodiment 1

[0032] like Figure 1 As shown, an EEG measurement circuit of a smart wearable device includes a data acquisition circuit, characterized in that the data acquisition circuit includes a chip U11, a resistor RS2, a resistor R39, a resistor R53, a capacitor C15, a capacitor C16, a capacitor C51, a capacitor C52, a capacitor C56, a capacitor C58 and a capacitor C62;

[0033] Pin 1 of chip U11 is connected to one end of resistor RS2, and the other end of resistor RS2 is connected to one end of resistor R39; the other end of resistor R39 is connected to pin 8 of chip U11;

[0034] Pin 2 of chip U11 is connected to one end of capacitor C52 and one end of capacitor C56; Pin 3 of chip U11 is connected to one end of capacitor C51 and the other end of capacitor C52; the other end of capacitor C56 is grounded, and the other end of capacitor C51 is grounded;

[0035] Pin 4 of chip U11 is connected to capacitor C58, one end of capacitor C15 and a power source respectively; the other end of capacitor C58 and the other end of capacitor C15 are both grounded;

[0036] Pin 7 of chip U11 is connected to one end of capacitor C62, capacitor C16 and a power source respectively; the other ends of capacitor C62 and capacitor C16 are both grounded;

[0037] Pin 6 of the chip U11 is connected to one end of the resistor R53, and pin 6 of the chip U11 is also used for external signal input;

[0038] Pin 5 of the chip U11 and the other end of the resistor R53 are both grounded.

[0039] In the utility model, the connection design of chip U11, capacitors and resistors is used to accurately collect EEG signals and ensure the accuracy and reliability of data. The reasonable configuration of capacitors and resistors can help stabilize the transmission and processing of EEG signals, reduce interference and noise, and improve the stability of signal processing. The connection method of capacitors and resistors is clear and easy to maintain and debug, and is also conducive to subsequent upgrades and improvements.

[0040] Embodiment 2

[0041] This embodiment is a further refinement of the first embodiment.

[0042] The EEG measurement circuit also includes a connector J2, a signal amplifying circuit and a signal processing circuit; wherein the signal processing circuit is respectively connected to the connector J2, the signal amplifying circuit and the data acquisition circuit; the signal processing circuit is used to process the collected EEG data and amplify the signal through the signal processing circuit.

[0043] The signal processing circuit includes amplifiers U10A, U10B, U10C, capacitor C38, capacitor C13, capacitor C14, resistor R5, resistor R10, resistor R11, resistor R14, resistor R15, resistor R18, resistor R30, resistor R45, resistor R16, inductor L11 and inductor L15;

[0044] Pin 3 of amplifier U10A is connected to capacitor C38 and one end of inductor L11 respectively, and the other end of inductor L11 is connected to pin 4 of connector J2; pin 2 of amplifier U10A is connected to resistor R5 and one end of resistor R10 respectively; pin 1 of amplifier U10A is connected to the other end of resistor R10 and resistor R14 and one end of capacitor C13 respectively; the other end of resistor R5 is connected to pin 6 of amplifier U10B and one end of resistor R11 respectively;

[0045] Pin 5 of amplifier U10B is respectively connected to the other end of capacitor C38 and one end of inductor L15; the other end of inductor L15 is connected to pin 5 of connector J2; pin 7 of amplifier U10B is respectively connected to the other end of resistor R11 and one end of resistor R15 and capacitor C14; the other end of resistor R15 is respectively connected to the other end of resistor R14 and pin 10 of amplifier U10C;

[0046] Pin 9 of amplifier U10C is respectively connected to pin 8 of amplifier U10C, the signal amplifying circuit, resistor R18 and one end of resistor R30;

[0047] The other end of the resistor R18 is connected to the other end of the capacitor C13 and one end of the resistor R45 respectively; the other end of the resistor R30 is connected to the other end of the capacitor C14 and one end of the capacitor R46 respectively;

[0048] The other ends of the resistor R45 and the resistor R46 are connected to the data acquisition circuit.

[0049] The signal amplification circuit includes an amplifier U10D and a resistor R2; wherein, pin 12 of the amplifier U10D is connected to pin 8 of the amplifier U10C; pin 13 of the amplifier U10D is respectively connected to pin 14 of the amplifier U10D and one end of the resistor R2; the other end of the resistor R2 is connected to pin 1 of the connector J2.

[0050] Connector J2 is also connected to the control circuit.

[0051] The control circuit includes a diode D2, a diode D6, a diode D8, a diode D10, a resistor R35, and a resistor R54;

[0052] One end of the diode D2 is connected to the No. 5 pin of the connector J2 and the signal processing circuit respectively; the other end of the diode D2 is connected to the power supply and one end of the diode D6 respectively; the other end of the diode D6 is connected to the No. 4 pin of the connector J2, one end of the resistor R35 and the signal processing circuit respectively;

[0053] One end of the diode D8 is connected to the No. 4 pin of the connector J2 and the signal processing circuit respectively; the other end of the diode D8 is connected to the power supply and one end of the diode D10 respectively; the other end of the diode D10 is connected to the No. 5 pin of the connector J2, one end of the resistor R54 and the signal processing circuit respectively;

[0054] The other ends of the resistor R35 and the resistor R54 are both grounded.

[0055] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0056] Finally, it should be noted that the above description is only a preferred embodiment of the utility model and is not intended to limit the utility model. Although the utility model is described in detail with reference to the above embodiments, those skilled in the art can still modify the technical solutions recorded in the above embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. An electroencephalogram (EEG) measurement circuit for a smart wearable device, the EEG measurement circuit comprising a data acquisition circuit, characterized in that: The data acquisition circuit includes a chip U11, a resistor RS2, a resistor R39, a resistor R53, a capacitor C15, a capacitor C16, a capacitor C51, a capacitor C52, a capacitor C56, a capacitor C58 and a capacitor C62; Pin 1 of chip U11 is connected to one end of resistor RS2, and the other end of resistor RS2 is connected to one end of resistor R39; the other end of resistor R39 is connected to pin 8 of chip U11; Pin 2 of chip U11 is connected to one end of capacitor C52 and one end of capacitor C56; Pin 3 of chip U11 is connected to one end of capacitor C51 and the other end of capacitor C52; the other end of capacitor C56 is grounded, and the other end of capacitor C51 is grounded; Pin 4 of chip U11 is connected to capacitor C58, one end of capacitor C15 and a power source respectively; the other end of capacitor C58 and the other end of capacitor C15 are both grounded; Pin 7 of chip U11 is connected to one end of capacitor C62, capacitor C16 and a power source respectively; the other ends of capacitor C62 and capacitor C16 are both grounded; Pin 6 of the chip U11 is connected to one end of the resistor R53, and pin 6 of the chip U11 is also used for external signal input; Pin 5 of the chip U11 and the other end of the resistor R53 are both grounded.

2. The electroencephalogram measurement circuit of a smart wearable device according to claim 1, characterized in that: The EEG measurement circuit also includes a connector J2, a signal amplifying circuit and a signal processing circuit; wherein the signal processing circuit is respectively connected to the connector J2, the signal amplifying circuit and the data acquisition circuit; the signal processing circuit is used to process the collected EEG data and amplify the signal through the signal processing circuit.

3. The electroencephalogram measurement circuit of a smart wearable device according to claim 2, characterized in that: The signal processing circuit includes amplifiers U10A, U10B, U10C, capacitor C38, capacitor C13, capacitor C14, resistor R5, resistor R10, resistor R11, resistor R14, resistor R15, resistor R18, resistor R30, resistor R45, resistor R16, inductor L11 and inductor L15; Pin 3 of amplifier U10A is connected to capacitor C38 and one end of inductor L11 respectively, and the other end of inductor L11 is connected to pin 4 of connector J2; pin 2 of amplifier U10A is connected to resistor R5 and one end of resistor R10 respectively; pin 1 of amplifier U10A is connected to the other end of resistor R10 and resistor R14 and one end of capacitor C13 respectively; the other end of resistor R5 is connected to pin 6 of amplifier U10B and one end of resistor R11 respectively; Pin 5 of amplifier U10B is respectively connected to the other end of capacitor C38 and one end of inductor L15; the other end of inductor L15 is connected to pin 5 of connector J2; pin 7 of amplifier U10B is respectively connected to the other end of resistor R11 and one end of resistor R15 and capacitor C14; the other end of resistor R15 is respectively connected to the other end of resistor R14 and pin 10 of amplifier U10C; Pin 9 of amplifier U10C is respectively connected to pin 8 of amplifier U10C, the signal amplifying circuit, resistor R18 and one end of resistor R30; The other end of the resistor R18 is connected to the other end of the capacitor C13 and one end of the resistor R45 respectively; the other end of the resistor R30 is connected to the other end of the capacitor C14 and one end of the capacitor R46 respectively; The other ends of the resistor R45 and the resistor R46 are connected to the data acquisition circuit.

4. The electroencephalogram measurement circuit of a smart wearable device according to claim 3, characterized in that: The signal amplification circuit includes an amplifier U10D and a resistor R2; wherein, pin 12 of the amplifier U10D is connected to pin 8 of the amplifier U10C; pin 13 of the amplifier U10D is respectively connected to pin 14 of the amplifier U10D and one end of the resistor R2; the other end of the resistor R2 is connected to pin 1 of the connector J2.

5. The electroencephalogram measurement circuit of a smart wearable device according to claim 4, characterized in that: Connector J2 is also connected to the control circuit.

6. The electroencephalogram measurement circuit of a smart wearable device according to claim 5, characterized in that: The control circuit includes a diode D2, a diode D6, a diode D8, a diode D10, a resistor R35, and a resistor R54; One end of the diode D2 is connected to the No. 5 pin of the connector J2 and the signal processing circuit respectively; the other end of the diode D2 is connected to the power supply and one end of the diode D6 respectively; the other end of the diode D6 is connected to the No. 4 pin of the connector J2, one end of the resistor R35 and the signal processing circuit respectively; One end of the diode D8 is connected to the No. 4 pin of the connector J2 and the signal processing circuit respectively; the other end of the diode D8 is connected to the power supply and one end of the diode D10 respectively; the other end of the diode D10 is connected to the No. 5 pin of the connector J2, one end of the resistor R54 and the signal processing circuit respectively; The other ends of the resistor R35 and the resistor R54 are both grounded.

Images