Low-power-consumption FPGA switch monitoring circuit
By designing a low-power FPGA switch monitoring circuit, the real-time monitoring of FPGA core voltage, external voltage and temperature is achieved using temperature sensors, voltage sensors and analog-to-digital conversion modules, and the existing FPGA chips are solved under high frequency and high density layout. The core temperature and operating voltage problems achieve low power consumption monitoring, ensuring the reliability and safety of the FPGA.
Patent Information
- Application Number
- CN202421083582.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-17
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2034-05-17
AI Technical Summary
Existing FPGA chips can easily lead to core temperature and operating voltage problems under high frequency and high density layout, resulting in performance degradation and stability impacts. FPGAs with their own monitoring function will increase circuit power consumption after turning on the function and reduce the chip service life. .
A low-power FPGA switch monitoring circuit is designed. By combining temperature sensors, voltage sensors and analog-to-digital conversion modules, real-time monitoring of FPGA core voltage, external voltage and temperature is realized, and the working mode and operating frequency are adjusted through feedback. . At the same time, a low-power switch circuit module is set up to automatically choose whether to enable the monitoring function, avoiding continued power consumption without monitoring.
Real-time monitoring of the core voltage, external voltage and temperature of FPGA chips is realized, timely adjusting the working mode and operating frequency, reducing power consumption, ensuring the reliability and safety of FPGAs, and extending the service life of the chip.
Smart Images
Figure CN222506773U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of field editable logic gate arrays, in particular to a low-power FPGA switch monitoring circuit. Background Art
[0002] Nowadays, the FPGAs used in nuclear power plants have many functions and need to run uninterruptedly for a long time. The speed of FPGAs is getting faster and faster, and the scale is getting larger and larger, which makes the chip area very large. The core voltage of the chip will change with the position of the physical layout. The increase in device layout density and the increase in operating frequency make the temperature rise inside the FPGA chip not to be underestimated. The core operating voltage and heating problems of the FPGA chip will cause the performance of the chip to drop significantly and affect the stability of the FPGA. Therefore, extra attention needs to be paid to the core operating voltage and temperature of the chip. Most of the existing FPGAs do not have built-in monitoring functions. Although some FPGAs with built-in monitoring functions have appeared, FPGAs with built-in monitoring functions will increase circuit power consumption after turning on the function, which will reduce the service life of the chip in the long run.
[0003] Therefore, it is necessary to propose an improvement to overcome the defects of the prior art. Utility Model Content
[0004] The utility model aims to solve the problems in the prior art and provide a low-power FPGA switch monitoring circuit.
[0005] The technical solution of the utility model is:
[0006] A low-power FPGA switch monitoring circuit includes a switch circuit module, an analog-to-digital conversion module, a register module and a control circuit module, wherein the switch circuit module is connected to the analog-to-digital conversion module, the register module is connected to the analog-to-digital conversion module, the analog-to-digital conversion module includes a temperature sensor, a voltage sensor, a processing circuit and a cyclic conversion circuit, the output end of the temperature sensor and the output end of the voltage sensor are connected to the input end of the processing circuit, the output end of the processing circuit is connected to the input end of the cyclic conversion circuit, the output end of the cyclic conversion circuit is connected to the input end of the digital calibration circuit, the output end of the digital calibration circuit is connected to the input end of the control circuit module, the input end of the control circuit module is also connected to the FPGA, and the output end of the control circuit module is respectively connected to the register module, the processing circuit, the cyclic conversion circuit and the digital calibration circuit. The FPGA temperature, core voltage and external voltage are monitored by combining the temperature sensor, the voltage sensor and the cyclic conversion circuit, feedback and comparison are performed during the monitoring process, and the working mode or operating frequency of the FPGA is adjusted in time. At the same time, a low-power switching circuit module is provided, which can independently choose whether to turn on the monitoring function. When there is no monitoring requirement, the switching circuit module controls the entire monitoring circuit to turn off the monitoring function, thereby realizing low-power monitoring and ensuring the reliability and safety of FPGA operation.
[0007] As a preferred technical solution, the analog-to-digital conversion module also includes a channel selector, the register module includes a channel selection register, the channel selector input is connected to the voltage sensor output and the temperature sensor output, the channel selector output is connected to the processing circuit input, and the channel selector control is connected to the channel selection register. The multi-channel optional design can avoid the situation where only one signal is collected while all channels are turned on, causing excessive power consumption, further reducing power consumption, and can also avoid the stagnation of collecting multiple signals when there is only one channel.
[0008] The beneficial effects of the utility model are as follows:
[0009] The utility model is a low-power FPGA switch monitoring circuit, which realizes real-time monitoring of the core voltage, external voltage, and temperature of the FPGA chip by combining the use of voltage sensors, temperature sensors, and analog-to-digital loop module design, and timely performs feedback to adjust the working mode and operating frequency of the FPGA during the monitoring process. Through the setting of the switch circuit module and the multi-channel optional design, low-power consumption monitoring is achieved, ensuring the reliability and safety of FPGA operation. The utility model is suitable for real-time monitoring of the internal working voltage, temperature, and external input voltage of FPGAs that do not have a built-in power consumption monitoring function. Some FPGAs with built-in monitoring functions will increase circuit power consumption after the function is turned on, which will reduce the service life of the chip in the long run, so the utility model can also be applied to the monitoring of such FPGAs. BRIEF DESCRIPTION OF THE DRAWINGS
[0010] Figure 1 The utility model is a schematic diagram of a low-power FPGA switch monitoring circuit structure. DETAILED DESCRIPTION
[0011] In order to make the technical means, technical features, utility model objectives and technical effects achieved by the utility model easy to understand, the utility model is further explained below with reference to specific illustrations.
[0012] like Figure 1 As shown, a low-power FPGA switch monitoring circuit of the utility model is located in the center of the FPGA chip, including a switch circuit module, an analog-to-digital conversion module, a register module and a control circuit module, wherein the switch circuit module is connected to the analog-to-digital conversion module, and the register module is connected to the analog-to-digital conversion module. The switch circuit module is used to supply power to the entire monitoring circuit, the analog-to-digital conversion module is used to convert the collected analog signal into a digital signal for subsequent convenient processing and analysis, the register module is used to store data information and the selection of the collection channel, and the control circuit module is used to control the working state of the analog-to-digital conversion module and the register module.
[0013] The analog-to-digital conversion module includes a temperature sensor, a voltage sensor, a channel selector, a processing circuit and a cyclic conversion circuit. A channel selection register is provided in the register module. The output end of the temperature sensor and the output end of the voltage sensor are connected to the input end of the channel selector, the output end of the channel selector is connected to the input end of the processing circuit, and the control end of the channel selector is connected to the channel selection register. The output end of the processing circuit is connected to the input end of the cyclic conversion circuit, the output end of the cyclic conversion circuit is connected to the input end of the digital calibration circuit, the output end of the digital calibration circuit is connected to the input end of the control circuit, the input end of the control circuit is also connected to the FPGA, and the output end of the control circuit is respectively connected to the register module, the processing circuit, the cyclic conversion circuit, and the digital calibration circuit. The temperature sensor is used to detect the FPGA core temperature and collect temperature analog signals, the voltage sensor is used to detect the FPGA core / external voltage and collect voltage analog signals, the channel selector is used to control the on and off of the acquisition channels corresponding to the temperature, core voltage, and external voltage, the channel selector is controlled by the channel selection register, the processing circuit is used for data processing and noise reduction, and the cyclic conversion circuit is used to convert analog signals into digital signals. The multi-channel optional design can avoid the situation where only one signal is collected while all channels are turned on, resulting in excessive power consumption, and can also avoid the delay of collecting multiple signals when there is only one channel.
[0014] Working process:
[0015] First, the monitoring function of the FPGA is enabled by pulling up the control signal in the switch circuit module. After that, the voltage sensor and temperature sensor monitor the chip voltage and temperature in real time. The sampling mode register can be used to control the corresponding channel of the object to be collected for collection. The collected signal is then used as the input signal of the analog-to-digital conversion module. After the input analog signal is processed by the processing circuit for noise reduction, it is then transmitted to the cyclic conversion circuit to convert it into a digital signal, and then the digital calibration circuit generates valid data. Through feedback and comparison of the real-time monitoring of the internal temperature, core operating voltage and external voltage of the FPGA, the working mode or frequency of the FPGA is adjusted in time, thereby reducing the loss of the device. When there is no need for the monitoring function, the control signal in the switch circuit module can be pulled down to terminate the working mode of the entire monitoring circuit, further reducing power consumption loss.
[0016] The above description is only a preferred embodiment of the utility model, and is not intended to limit the scope of implementation of the utility model. That is, all equivalent changes and modifications made according to the content of the patent application scope of the utility model should belong to the technical scope of the utility model.
Claims
1. A low-power FPGA switch monitoring circuit, characterized in that: It includes a switch circuit module, an analog-to-digital conversion module, a register module and a control circuit module. The switch circuit module is connected to the analog-to-digital conversion module, the register module is connected to the analog-to-digital conversion module, the analog-to-digital conversion module includes a temperature sensor, a voltage sensor, a processing circuit and a loop conversion circuit, the output end of the temperature sensor and the output end of the voltage sensor are connected to the input end of the processing circuit, the output end of the processing circuit is connected to the input end of the loop conversion circuit, the output end of the loop conversion circuit is connected to the input end of the digital calibration circuit, the output end of the digital calibration circuit is connected to the input end of the control circuit module, the input end of the control circuit module is also connected to an FPGA, and the output end of the control circuit module is respectively connected to the register module, the processing circuit, the loop conversion circuit and the digital calibration circuit.
2. A low-power FPGA switch monitoring circuit according to claim 1, characterized in that: The analog-to-digital conversion module also includes a channel selector, the register module includes a channel selection register, the channel selector input end is connected to the voltage sensor output end and the temperature sensor output end, the channel selector output end is connected to the processing circuit input end, and the channel selector control end is connected to the channel selection register.