Dual-power switching circuit

Abstract

The utility model relates to a dual-power-supply switching circuit, comprising a first comparator, a second comparator, a third PMOS transistor, a fourth PMOS transistor, a fourth PMOS transistor, a fourth PMOS transistor and a fifth PMOS transistor, a second comparator; the anode of the first optical coupler is connected with the output end of the first comparator, the cathode and the emitter of the first optical coupler are grounded, and the collector of the first optical coupler is connected between the source of the first PMOS tube and the load power supply end through a first resistor and a second resistor which are connected in series; the anode of the second optical coupler is connected with the output end of the second comparator, the cathode of the second optical coupler is grounded, and the collector of the second optical coupler is connected with the position between the battery and the dual-PMOS tube switching circuit; the anode of the third optical coupler is connected with the output end of the second comparator, the cathode is grounded, and the collector is connected with the load power supply end. The dual-power-supply switching circuit can preferentially use the external switching power supply to supply power, and seamless switching between the external switching power supply and the battery is realized when the external switching power supply is powered down.

Description

Technical Field

[0001] The utility model relates to the technical field of load power supply, in particular to a dual power supply switching circuit. Background Art

[0002] In order to achieve the reliability of power supply to the load, dual power supplies are often used to provide a stable and continuous working voltage. One power supply is provided by a power supply outside the device, called an external power supply, and the other is provided by the device's own battery. When the external power supply works normally, the device is only powered by the external power supply. When the external power supply fails, it seamlessly switches to the device's own battery. To this end, it is necessary to design a dual power automatic switching circuit with small size, low power consumption, high reliability and short switching time.

[0003] The commonly used dual power switching method is to use relay switching or diode parallel switching, but the above switching methods all have disadvantages. Usually the reaction time of relays is in the millisecond level, which can easily cause the equipment to restart during the power switching process and is difficult to adapt to occasions with high reliability requirements. Although diodes do not have the power switching time problem, the heat power is large when working with high current, which brings great difficulties to the heat dissipation design. Utility Model Content

[0004] The utility model provides a dual power supply switching circuit, which enables the external switching power supply to be used first, and realizes seamless switching between the switching power supply and the battery when the external switching power supply is powered off, thereby ensuring the normal operation of the load; and reduces circuit loss and improves the circuit load capacity.

[0005] In order to achieve the above-mentioned utility model purpose, the utility model adopts the following technical solutions:

[0006] The present application provides a dual power switching circuit, comprising:

[0007] A first comparator, wherein a positive input terminal of the first comparator is connected to a first voltage-dividing output terminal of a first voltage-dividing circuit, a negative input terminal of the first comparator is connected to a reference voltage, a power supply of the first voltage-dividing circuit is connected to an external voltage output by an external switching power supply, and a first PMOS tube is connected between an output terminal of the external switching power supply and a load power supply terminal;

[0008] A second comparator, wherein a positive phase input terminal of the second comparator is connected to a second voltage-dividing output terminal of a second voltage-dividing circuit, a negative phase input terminal of the second comparator is connected to the reference voltage, and a power supply of the second voltage-dividing circuit is connected to the external voltage;

[0009] A first optical coupler, wherein the anode is connected to the output terminal of the first comparator, and when the level at the positive phase input terminal of the first comparator is higher than the level at the negative phase input terminal, the anode of the first optical coupler is at a high level, the cathode and the emitter are both grounded, the collector is connected to a position between the source of the first PMOS tube and the load power supply terminal through a first resistor and a second resistor connected in series, and the gate of the first PMOS tube is connected to a position between the first resistor and the second resistor;

[0010] A second optical coupler, wherein the anode is connected to the output terminal of the second comparator, and when the level at the positive phase input terminal of the second comparator is higher than the level at the negative phase input terminal, the anode of the second optical coupler is at a high level, the cathode is grounded, the collector is connected to the position between the battery and the dual PMOS tube switch circuit, the emitter and the gate of the second PMOS tube are both connected to the third voltage divider output terminal of the third voltage divider circuit, and the power supply of the third voltage divider circuit is connected to the battery;

[0011] A third optical coupler, wherein the anode is connected to the output end of the second comparator, the cathode is grounded, the collector is connected to the load power supply end, the emitter and the gate of the third PMOS tube are both connected to the fourth voltage-dividing output end of the fourth voltage-dividing circuit, and the power supply of the fourth voltage-dividing circuit is connected to the load power supply end;

[0012] The dual PMOS switch circuit is connected between the battery and the load power supply end, wherein the second PMOS tube and the third PMOS tube in the dual PMOS switch circuit are connected in series in a back-to-back common drain manner.

[0013] In some embodiments of the present application, the dual power switching circuit further includes:

[0014] A reference voltage circuit is used to generate the reference voltage.

[0015] In some embodiments of the present application, the reference voltage circuit includes:

[0016] A reference voltage chip, a first power supply is connected to an input end of the reference voltage chip, and an output end of the reference voltage chip outputs the reference voltage.

[0017] In some embodiments of the present application, the reference voltage circuit further includes:

[0018] A first filter capacitor, one end of which is connected to the input end of the reference voltage chip, and the other end is grounded;

[0019] A second filter capacitor has one end connected to the output end of the reference voltage chip and the other end grounded.

[0020] In some embodiments of the present application, the reference voltage circuit includes:

[0021] A voltage regulator tube, wherein the cathode of the voltage regulator tube is connected to the external voltage via a current limiting resistor, the position between the current limiting resistor and the cathode of the voltage regulator tube is respectively connected to the negative phase input terminal of the first comparator and the negative phase input terminal of the second comparator, and the anode of the voltage regulator tube is grounded.

[0022] In some embodiments of the present application, the dual power switching circuit further includes:

[0023] A first capacitor, used for filtering the power supply of the first comparator;

[0024] a second capacitor, used for filtering a power supply of the second comparator;

[0025] Wherein, the first comparator and the second comparator are both powered by the external voltage.

[0026] In some embodiments of the present application, the dual power switching circuit includes:

[0027] A first pull-up resistor, one end of which is connected to the output end of the first comparator, and the other end of which is connected to the external voltage;

[0028] A second pull-up resistor has one end connected to the output end of the second comparator and the other end connected to the external voltage.

[0029] In some embodiments of the present application, a forward diode is provided at the output end of the external switching power supply.

[0030] Compared with the prior art, the dual power switching circuit provided by the present application has the following advantages and beneficial effects:

[0031] (1) According to the external voltage output when the external switching power supply is powered on, the output levels of the first comparator and the first comparator are controlled, thereby controlling the conduction of the first optical coupler, the second optical coupler and the third optical coupler, realizing the conduction of the first PMOS tube and the disconnection of the second PMOS tube and the third PMOS tube, so that the external voltage is supplied to the load power supply terminal through the first PMOS tube;

[0032] When the external switching power supply loses power, due to the effect of the internal energy storage capacitor of the external switching power supply, the electric energy output by the external switching power supply slowly decreases, and the output voltage division of the first voltage division circuit and the second voltage division circuit can control the first PMOS tube, the second PMOS tube and the third PMOS tube to be disconnected before the external voltage decreases to the voltage range maintaining the normal working of the load, and at this time, the external voltage uses the body diode of the first PMOS tube to temporarily supply power to the load power supply end;

[0033] When the external voltage is reduced to the lowest voltage in the normal working voltage range of the load, the output voltage of the first voltage divider circuit and the second voltage divider circuit is divided, and then the second PMOS tube and the third PMOS tube are controlled to be turned on, and the battery is switched to supply power to the load power supply end, so as to realize seamless switching between the external switching power supply and the battery, and give priority to using the external switching power supply;

[0034] (2) The dual power switching circuit involved in the present application can give priority to the external voltage regardless of whether the battery voltage is lower than, equal to or higher than the external voltage output by the external switching power supply, and can achieve seamless switching between the external switching power supply and the battery when the external switching power supply is powered off;

[0035] (3) A first PMOS tube is provided on the circuit from the external switching power supply to the load power supply end, and a dual PMOS tube switching circuit is provided on the circuit from the battery to the load power supply end. The advantages of the low on-resistance, large overcurrent capability and reverse voltage cutoff of the PMOS tube's own body diode are utilized to greatly reduce the circuit conduction voltage drop loss, improve the circuit load capacity, extend the battery life, reduce heat generation, and reduce leakage current. In addition, the PMOS tube is small in size, which reduces the device space volume.

[0036] After reading the specific embodiments of the present invention in conjunction with the accompanying drawings, other features and advantages of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, a brief introduction will be given below to the drawings required for use in the embodiments. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0038] Figure 1 The present invention is a circuit diagram of an embodiment of a dual power supply switching circuit. DETAILED DESCRIPTION

[0039] The technical solutions in the embodiments of the present invention will be described clearly and completely below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments.

[0040] Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention. In the description of the present invention, it should be understood that the terms "center", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate the orientation or position relationship based on the orientation or position relationship shown in the accompanying drawings, which is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0041] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances. In the description of the above embodiments, specific features, structures, materials or characteristics can be combined in any one or more embodiments or examples in a suitable manner.

[0042] The terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, unless otherwise specified, "plurality" means two or more.

[0043] See also Figure 1 The present application relates to a dual power switching circuit for realizing seamless switching between an external switching power supply and a battery to power a load, wherein the dual power supply refers to an external voltage VIN output by the external switching power supply and a voltage BAT output by the battery.

[0044] In actual use, the external switching power supply and the battery are both located in the instrument housing, wherein the external switching power supply is externally connected to an external power supply (eg, 220V).

[0045] When the external switching power supply is powered on, the external switching power supply can output a 24V power supply, that is, Figure 1 The external voltage VIN output by the external switching power supply; when the external switching power supply loses power (for example, the user switches the external power supply to 220V), due to the effect of the internal energy storage capacitor of the external switching power supply, the external voltage output by the external switching power supply will not drop to 0V instantly, but will slowly drop from the output 24V.

[0046] Since the external switching power supply is always connected to the circuit board inside the instrument housing, when the 24V output by the external switching power supply drops to a level higher than the normal operating voltage range of the instrument circuit (i.e., load) (e.g., 20V~24V), the external voltage VIN output by the external switching power supply is still used for power supply until the external voltage VIN output by the external switching power supply continues to drop to a level lower than the normal operating voltage range of the instrument circuit, and then the power supply is stopped.

[0047] After that, the battery is switched to power the load.

[0048] When the external switching power supply is powered on again, the battery is still switched to the external switching power supply to continue to supply power to the load.

[0049] As follows, see Figure 1 , the structure of the dual power supply switching circuit will be described in detail.

[0050] In some embodiments of the present application, the dual power switching circuit includes a first comparator U1B, a second comparator U1A, a first optocoupler U2, a first PMOS tube Q1, a second optocoupler U3, a third optocoupler U4 and a dual PMOS tube switch circuit.

[0051] A positive phase input terminal of the first comparator U1B is connected to a first voltage-dividing output terminal of the first voltage-dividing circuit, and a negative phase input terminal is connected to a reference voltage.

[0052] The positive phase input terminal of the second comparator U1A is connected to the second voltage-dividing output terminal of the second voltage-dividing circuit, and the negative phase input terminal is connected to the reference voltage.

[0053] The power supply of the first voltage divider circuit and the second voltage divider circuit is connected to the external voltage VIN output by the external switching power supply.

[0054] In some embodiments of the present application, in order to prevent the current in the circuit from flowing back to the external switching power supply, a forward diode D1 is provided at the output end of the external switching power supply, that is, the anode of the diode D1 is connected to the external voltage VIN, and the cathode of the diode D1 is connected to the power supply of the first voltage divider circuit.

[0055] According to actual switching requirements, the circuit structure of the first voltage divider circuit and the second voltage divider circuit can be set to meet the requirements of giving priority to the use of the external switching power supply in this application and being able to seamlessly switch to battery power supply when the external switching power supply loses power.

[0056] See also Figure 1 In the present application, the first voltage divider circuit includes a resistor R1 and a resistor R6 connected in series, and the connection position between the resistor R1 and the resistor R6 is connected to the non-inverting input terminal of the first comparator U1B.

[0057] The second voltage divider circuit includes a resistor R12 and a resistor R15 connected in series, and the connection position between the resistor R12 and the resistor R15 is connected to the non-inverting input terminal of the second comparator U1A.

[0058] The negative phase input terminal of the first comparator U1B and the negative phase input terminal of the second comparator U1A are respectively connected to a reference voltage, wherein the magnitude of the reference voltage can be designed according to requirements.

[0059] The reference voltage is provided by a reference voltage circuit.

[0060] In some embodiments of the present application, the reference voltage circuit includes a reference voltage chip (not shown), and the required reference voltage is output through the reference voltage chip.

[0061] The input terminal of the reference voltage chip can receive a first power source (eg, an external voltage VIN output by an external switching power source), and the output terminal outputs a reference voltage.

[0062] In order to improve the stability of the reference voltage, the reference voltage circuit further includes a first filter capacitor (not shown) and a second filter capacitor (not shown).

[0063] One end of the first filter capacitor is connected to the input end of the reference voltage chip, and the other end is grounded.

[0064] One end of the second filter capacitor is connected to the output end of the reference voltage chip, and the other end is grounded.

[0065] By setting a first filter capacitor, the noise of the power supply input to the reference voltage chip is filtered out, thereby improving the accuracy and stability of the input level of the reference voltage chip; by setting a second filter capacitor, the noise of the power supply output by the reference voltage chip is filtered out, thereby improving the accuracy and stability of the output level of the reference voltage chip.

[0066] In some embodiments of the present application, the reference voltage circuit includes a voltage regulator tube D2, and the reference voltage is obtained through the voltage regulator tube D2.

[0067] The cathode of the voltage regulator tube D2 is connected to the external voltage VIN through the current limiting resistor R11, and the anode is grounded.

[0068] When a diode D1 is provided at the output end of the external switching power supply, one end of the current limiting resistor R11 is connected to the cathode of the diode D1 , and the other end of the current limiting resistor R11 is connected to the voltage regulator tube D2 .

[0069] A first PMOS transistor Q1 is connected between the output end of the external switching power supply and the load power supply end VCC. By controlling the on-off of the first PMOS transistor Q1, the external switching power supply is controlled to supply power or not to supply power to the load.

[0070] In some embodiments of the present application, the anode of the first optocoupler U2 is connected to the output end of the first comparator U1B, the cathode and the emitter are grounded, the collector is connected to the position between the source of the first PMOS tube Q1 and the load power supply terminal VCC through the series-connected resistor R4 and the resistor R5, and the gate of the first PMOS tube Q1 is connected to the position between the resistor R4 and the resistor R5.

[0071] The drain of the first PMOS tube Q1 is connected to the output end of the external switching power supply.

[0072] In some embodiments of the present application, when the level of the positive input terminal of the first comparator U1B is higher than the level of the negative input terminal, the output terminal of the first comparator U1B outputs a high level, and at this time, the anode of the first optical coupler U2 connected through the current limiting resistor R3 is also at a high level.

[0073] In order to ensure that the anode of the first optocoupler U2 is at a high level when the output of a comparator of certain models (for example, LM393) is open when the level at the positive input terminal is higher than the level at the negative input terminal, in some embodiments of the present application, a pull-up resistor R2 is provided at the output terminal of the first comparator U1B. When the output of the first comparator U1B is open, the anode of the first optocoupler U2 can be at a high level through the pull-up resistor R2.

[0074] A dual PMOS switch circuit is connected between the battery and the load power supply terminal VCC. By controlling the on and off of the dual PMOS switch circuit, the battery is controlled to supply power to the load or not.

[0075] The dual PMOS switch circuit includes a second PMOS Q2 and a third PMOS Q3, which are connected in series between the battery and the load power supply terminal VCC in a back-to-back common drain form.

[0076] In some embodiments of the present application, the anode of the second optocoupler U3 is connected to the output end of the second comparator U1A, the cathode is grounded, the collector is connected to the position between the battery and the dual PMOS tube switch circuit (that is, the collector is connected to the position between the battery and the source of the second PMOS tube Q2), and the emitter and the gate of the second PMOS tube Q2 are both connected to the third voltage divider output end of the third voltage divider circuit.

[0077] The power source of the third voltage divider circuit is connected to the battery.

[0078] In some embodiments of the present application, the third voltage-dividing circuit includes a resistor R7 and a resistor R16 connected in series, and the third voltage-dividing output end is a connection position between the resistor R7 and the resistor R16.

[0079] In some embodiments of the present application, the anode of the third optocoupler U4 is connected to the output end of the second comparator U1A, the cathode is grounded, the collector is connected to the load power supply end VCC, and the emitter and the gate of the third PMOS tube Q3 are both connected to the fourth voltage divider output end of the fourth voltage divider circuit.

[0080] The power supply of the fourth voltage-dividing circuit is connected to the load power supply terminal VCC.

[0081] In some embodiments of the present application, the fourth voltage-dividing circuit includes a resistor R8 and a resistor R14 connected in series, and the fourth voltage-dividing output end is a connection position between the resistor R8 and the resistor R14.

[0082] In some embodiments of the present application, when the level of the positive input terminal of the second comparator U1A is higher than the level of the negative input terminal, the output terminal of the second comparator U1A outputs a high level, and at this time, the anode of the second optocoupler U3 connected through the current limiting resistor R13 is also at a high level.

[0083] In order to ensure that when the output terminal of a comparator of certain models (for example, LM393) is open when the level at its positive input terminal is higher than the level at its negative input terminal, the anode of the second optocoupler U3 and the anode of the third optocoupler U4 can also be at a high level, in some embodiments of the present application, a pull-up resistor R10 is provided at the output terminal of the second comparator U1A. When the output of the second comparator U1A is open, the anode of the second optocoupler U3 and the anode of the third optocoupler U4 can be at a high level through the pull-up resistor R10.

[0084] As follows, the working principle of the dual power switching circuit will be described.

[0085] (1) When the external switching power supply is powered on and connected to the circuit

[0086] The current output by the external switching power supply passes through the body diode of the first PMOS tube Q1 to set the load power supply terminal VCC to a high level.

[0087] The positive phase input terminal of the first comparator U1B is divided by the resistors R1 and R6 to obtain a positive phase level V1B+, and the positive phase input terminal of the second comparator U1A is divided by the resistors R12 and R15 to obtain a positive phase level V1A+.

[0088] The voltage level V1B- at the negative phase input terminal of the first comparator U1B and the voltage level V1A- at the negative phase input terminal of the second comparator U1A are stabilized to the reference level V- through the voltage regulator D2, so that V1B+ and V1A+ are both higher than V-. At this time, the anode of the first optical coupler U2, the anode of the second optical coupler U3 and the anode of the third optical coupler U4 are all at high levels. Therefore, the first optical coupler U2, the second optical coupler U3 and the third optical coupler U4 are all turned on.

[0089] The first PMOS tube Q1 is divided by the resistor R4 and the resistor R5 so that the gate voltage of the first PMOS tube Q1 is less than the source voltage, so the first PMOS tube Q1 is turned on, and the external switch power supply supplies power to the load.

[0090] Since the second optical coupler U3 and the third optical coupler U4 are both turned on, the gate and source of the second PMOS tube Q2 are approximately short-circuited, and the gate and source of the third PMOS tube Q3 are approximately short-circuited. The gate-source voltage difference of the PMOS tube cannot reach the turn-on voltage of the second PMOS tube Q2 and the third PMOS tube Q3. The second PMOS tube Q2 and the third PMOS tube Q3 are both turned off, and the body diode of the second PMOS tube Q2 is reversely cut off. The battery cannot be connected to the load, and the entire load is preferentially powered by the external switching power supply.

[0091] (2) When the external switch power fails

[0092] When the external switching power supply loses power, due to the existence of the internal energy storage capacitor of the external switching power supply itself, the external voltage VIN cannot be reduced to 0V instantaneously, but gradually reduces to 0V.

[0093] In order to ensure the normal operation of the load and the timely connection of the battery during the power-off process, the appropriate voltage regulator D2 and the resistance values ​​of the resistors R1, R6, R12 and R15 are selected in advance, so that when the external voltage VIN drops to a level higher than the normal operating voltage range of the load (for example, 20V~24V), the voltage level V1B+ at the positive input terminal of the first comparator U1B is lower than the level V- at the negative input terminal through the voltage division of the resistors R1 and R6, and the output of the first comparator U1B is grounded.

[0094] And through the voltage division of the resistors R12 and R15, the voltage level V1A+ at the positive input terminal of the second comparator U1A is still higher than the voltage level V- at the negative input terminal, so the second optical coupler U3 and the third optical coupler U4 are still turned on, and as described in (1) above, the line between the battery and the load power supply terminal VCC is disconnected.

[0095] When the output of the first comparator U1B is grounded, the gate and source voltages of the first PMOS tube Q1 are consistent, and the first PMOS tube Q1 is turned off. At this time, the external voltage VIN temporarily powers subsequent loads through the body diode of the first PMOS tube Q1.

[0096] (3) When the external switching power supply is powered off and the output external voltage VIN drops below the normal operating voltage range

[0097] When the external voltage VIN continues to drop below the normal operating voltage range, through the voltage division of the resistors R12 and R15, the level V1A+ at the positive input terminal of the second comparator U1A is lower than the level V- at the negative input terminal, the output of the second comparator U1A is grounded, and the second optocoupler U3 and the third optocoupler U4 are both turned off.

[0098] For the second PMOS transistor Q2 , the voltage of the gate of the second PMOS transistor Q2 is less than the source voltage through the voltage division of the resistor R7 and the resistor R16 , and the second PMOS transistor Q2 is turned on.

[0099] The battery voltage pulls up the source voltage of the third PMOS tube Q3 through the body diode of the second PMOS tube Q2 and the third PMOS tube Q3, and then the gate voltage of the third PMOS tube Q3 is smaller than the source voltage through the voltage division of the resistor R8 and the resistor R14, and the third PMOS tube Q3 is turned on.

[0100] At this time, the path between the battery and the load power supply end is connected, and the battery is connected to the load to supply power to the load.

[0101] (4) When the external switching power supply is powered on again

[0102] When the external switching power supply is powered on again, the working principle of the dual power supply switching circuit returns to (1) as described above, and the external switching power supply is used again for power supply.

[0103] It should be noted that, in some embodiments of the present application, the power supply terminals of the first comparator U1B and the second comparator U1A are respectively powered by an external voltage VIN.

[0104] As described above, after the external voltage drops to 20V, the positive input voltages of the first comparator U1B and the second comparator U1A are both lower than the negative input voltage, and the outputs of the first comparator U1B and the second comparator U1A are both grounded, that is, no matter how much the external switching power supply output external voltage VIN (that is, the supply voltage of the first comparator U1B and the supply voltage of the second comparator U1A) continues to drop, the outputs of the first comparator U1B and the second comparator U1A will be grounded.

[0105] The dual power switching circuit as described above can achieve that when the external switching power supply is powered on, no matter the external voltage VIN output by the external switching power supply is greater than, less than or equal to the battery voltage BAT, the external switching power supply can be used preferentially, and when the external switching power supply is powered off, it can be seamlessly switched to the battery without affecting the normal operation of the load.

[0106] The first PMOS tube Q1 is arranged on the line where the external switching power supply supplies power to the load, and the second PMOS tube Q2 and the third PMOS tube Q3 are arranged on the line where the battery supplies power to the load. The advantages of the low on-resistance, large overcurrent capability and reverse voltage cutoff of the PMOS tube's own body diode are utilized to greatly reduce the circuit conduction voltage drop loss, improve the circuit load capacity, extend the battery life, reduce heat generation, reduce leakage current, and the PMOS tube is small in size, which reduces the device space volume.

[0107] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit the same. Although the present invention has been described in detail with reference to the above embodiments, it is still possible for a person skilled in the art to modify the technical solutions described in the above embodiments, or to replace some of the technical features therein with equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions claimed to be protected by the present invention.

Claims

1. A dual power switching circuit, characterized in that: include: A first comparator, wherein a positive phase input terminal is connected to a first voltage-dividing output terminal of a first voltage-dividing circuit, a negative phase input terminal is connected to a reference voltage, a power supply of the first voltage-dividing circuit is connected to an external voltage output by an external switching power supply, and a first PMOS tube is connected between the output terminal of the external switching power supply and a load power supply terminal; A second comparator, wherein a positive phase input terminal of the second comparator is connected to a second voltage-dividing output terminal of a second voltage-dividing circuit, a negative phase input terminal of the second comparator is connected to the reference voltage, and a power supply of the second voltage-dividing circuit is connected to the external voltage; A first optical coupler, wherein the anode is connected to the output terminal of the first comparator, and when the level at the positive phase input terminal of the first comparator is higher than the level at the negative phase input terminal, the anode of the first optical coupler is at a high level, the cathode and the emitter are both grounded, the collector is connected to a position between the source of the first PMOS tube and the load power supply terminal through a first resistor and a second resistor connected in series, and the gate of the first PMOS tube is connected to a position between the first resistor and the second resistor; A second optical coupler, wherein the anode is connected to the output terminal of the second comparator, and when the level at the positive phase input terminal of the second comparator is higher than the level at the negative phase input terminal, the anode of the second optical coupler is at a high level, the cathode is grounded, the collector is connected to the position between the battery and the dual PMOS tube switch circuit, the emitter and the gate of the second PMOS tube are both connected to the third voltage divider output terminal of the third voltage divider circuit, and the power supply of the third voltage divider circuit is connected to the battery; A third optical coupler, wherein the anode is connected to the output end of the second comparator, the cathode is grounded, the collector is connected to the load power supply end, the emitter and the gate of the third PMOS tube are both connected to the fourth voltage-dividing output end of the fourth voltage-dividing circuit, and the power supply of the fourth voltage-dividing circuit is connected to the load power supply end; The dual PMOS switch circuit is connected between the battery and the load power supply end, wherein the second PMOS tube and the third PMOS tube in the dual PMOS switch circuit are connected in series in a back-to-back common drain manner.

2. The dual power switching circuit according to claim 1, characterized in that: Also includes: A reference voltage circuit is used to generate the reference voltage.

3. The dual power switching circuit according to claim 2, characterized in that: The reference voltage circuit comprises: A reference voltage chip, a first power supply is connected to an input end of the reference voltage chip, and an output end of the reference voltage chip outputs the reference voltage.

4. The dual power switching circuit according to claim 3, characterized in that: The reference voltage circuit further includes: A first filter capacitor, one end of which is connected to the input end of the reference voltage chip, and the other end is grounded; A second filter capacitor has one end connected to the output end of the reference voltage chip and the other end grounded.

5. The dual power switching circuit according to claim 2, characterized in that: The reference voltage circuit comprises: A voltage regulator tube, wherein the cathode of the voltage regulator tube is connected to the external voltage via a current limiting resistor, the position between the current limiting resistor and the cathode of the voltage regulator tube is respectively connected to the negative phase input terminal of the first comparator and the negative phase input terminal of the second comparator, and the anode of the voltage regulator tube is grounded.

6. The dual power switching circuit according to claim 1, characterized in that: The dual power switching circuit also includes: A first capacitor, used for filtering the power supply of the first comparator; a second capacitor, used for filtering a power supply of the second comparator; Wherein, the first comparator and the second comparator are both powered by the external voltage.

7. The dual power switching circuit according to claim 1, characterized in that: The dual power switching circuit comprises: A first pull-up resistor, one end of which is connected to the output end of the first comparator, and the other end of which is connected to the external voltage; A second pull-up resistor has one end connected to the output end of the second comparator and the other end connected to the external voltage.

8. The dual power switching circuit according to claim 1, characterized in that: A forward diode is arranged at the output end of the external switching power supply.

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