Display device

Abstract

A display device includes: a substrate; a first pixel electrode; a pixel defining layer defining a first opening overlapping the first pixel electrode; a bank structure defining a second opening overlapping the first opening; a first light emitting layer in the first opening; a first common electrode in contact with the bank structure in the second opening; a first auxiliary electrode completely covering the first common electrode in the second opening and contacting the bank structure; a second auxiliary electrode disposed on the first auxiliary electrode, fully covering the first auxiliary electrode in the second opening, and contacting the bank structure; and a first encapsulation layer disposed on the second auxiliary electrode and the bank structure, where the bank structure includes: a first bank layer disposed on the pixel defining layer; and a second bank layer disposed on the first bank layer and including a tip protruding from a side surface of the first bank layer toward the first opening, where the second auxiliary electrode is in contact with the second bank layer, and where the first auxiliary electrode is spaced apart from the second bank layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and all benefits arising from Korean Patent Application No. 10-2023-0062844, filed on May 16, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device. Background Art

[0004] With the progress of the information age, people's demand for various forms of display devices for displaying images has increased. For example, display devices have been applied to various electronic devices such as smart phones, digital cameras, laptop computers, navigation devices, or smart TVs. The display device can be a flat panel display device such as a liquid crystal display device, a field emission display device, or an organic light-emitting display device. Among the flat panel display devices, the light-emitting display device may include a self-luminous light-emitting element included in each of a plurality of pixels of a display panel, so that an image can be displayed even in the absence of a backlight unit for providing light to the display panel. Utility Model Content

[0005] Various aspects of the present disclosure provide a display device having reduced resistance and improved moisture and oxygen permeability.

[0006] However, the aspects of the present disclosure are not limited to those described herein. The above and other aspects of the present disclosure will become more apparent to those skilled in the art to which the present disclosure belongs by referring to the description of the present disclosure given below.

[0007] An embodiment of a display device includes: a substrate; a first pixel electrode, disposed on the substrate; a pixel defining layer, disposed on the substrate and defining a first opening overlapping the first pixel electrode; a levee structure, disposed on the pixel defining layer and defining a second opening overlapping the first opening; a first light-emitting layer, disposed on the first pixel electrode and in the first opening; a first common electrode, disposed on the first light-emitting layer and in contact with the levee structure in the second opening; a first auxiliary electrode, disposed on the first common electrode, the first auxiliary electrode completely covering the first common electrode in the second opening and in contact with the levee structure; a second auxiliary electrode, disposed on the first auxiliary electrode, the second auxiliary electrode completely covering the first auxiliary electrode in the second opening and in contact with the levee structure; and a first encapsulation layer, disposed on the second auxiliary electrode and the levee structure, wherein the levee structure includes: a first levee layer, disposed on the pixel defining layer and including a conductive material; and a second levee layer, disposed on the first levee layer and including a tip protruding toward the first opening than a side surface of the first levee layer, wherein the second auxiliary electrode is in contact with the second levee layer, and wherein the first auxiliary electrode may be spaced apart from the second levee layer.

[0008] In an embodiment, the side surface of the first embankment layer may include: a first portion, contacting the first common electrode; a second portion, contacting the first auxiliary electrode; and a third portion, contacting the second auxiliary electrode, wherein the second portion is positioned between the first portion and the third portion, and wherein the areas of the first portion, the second portion and the third portion may be different.

[0009] In an embodiment, an area of ​​the second portion of the side surface of the first bank layer contacting the first auxiliary electrode may be greater than an area of ​​the first portion of the side surface of the first bank layer contacting the first common electrode.

[0010] In an embodiment, the area of ​​the second portion of the side surface of the first bank layer contacting the first auxiliary electrode may be greater than the area of ​​the third portion of the side surface of the first bank layer contacting the second auxiliary electrode.

[0011] In an embodiment, the display device may further include a capping layer that completely covers the second auxiliary electrode in the first opening, wherein the capping layer exposes a portion of the second auxiliary electrode in the second opening.

[0012] In an embodiment, an exposed portion of the second auxiliary electrode not covered by the capping layer in the second opening may contact the first encapsulation layer.

[0013] In an embodiment, the thickness of the first auxiliary electrode in a direction perpendicular to the first direction may be different from the thickness of the second auxiliary electrode in the direction perpendicular to the first direction, and the thickness of the first auxiliary electrode in the direction perpendicular to the first direction may be smaller than the thickness of the second auxiliary electrode in the direction perpendicular to the first direction.

[0014] In an embodiment, the first auxiliary electrode may include a silver alloy, and wherein the second auxiliary electrode may include a transparent conductive oxide.

[0015] In an embodiment, the first auxiliary electrode may further include palladium and copper.

[0016] In an embodiment, the thickness of the first auxiliary electrode in a direction perpendicular to the first direction may be or greater and or smaller.

[0017] In an embodiment, the thickness of the second auxiliary electrode in a direction perpendicular to the first direction may be or greater and or smaller.

[0018] In an embodiment, the display device may further include: a first organic pattern, arranged on the second embankment layer of the embankment structure and surrounding the first opening, wherein the first organic pattern and the first light-emitting layer include the same material; and a first electrode pattern, arranged on the first organic pattern and surrounding the first opening, wherein the first electrode pattern and the first common electrode include the same material, wherein the first organic pattern overlaps with the tip of the second embankment layer and is separated from the first light-emitting layer, and wherein the first electrode pattern may overlap with the tip of the second embankment layer and be separated from the first common electrode.

[0019] In an embodiment, the display device may further include: a first auxiliary pattern, arranged on the first electrode pattern and surrounding the first opening, wherein the first auxiliary pattern and the first auxiliary electrode include the same material; and a second auxiliary pattern, arranged on the first auxiliary pattern and surrounding the first opening, wherein the second auxiliary pattern and the second auxiliary electrode include the same material, wherein the first auxiliary pattern may overlap with the tip of the second embankment layer and be spaced apart from the first auxiliary electrode, and wherein the second auxiliary pattern may overlap with the tip of the second embankment layer and be spaced apart from the second auxiliary electrode.

[0020] In an embodiment, the second embankment layer may further include a first surface disposed to face the first embankment layer, wherein the second auxiliary electrode and the second auxiliary pattern are in contact with the first surface of the second embankment layer, and wherein the second auxiliary electrode and the second auxiliary pattern in contact with the first surface of the second embankment layer may be spaced apart from each other.

[0021] In an embodiment, the second bank layer and the first encapsulation layer may contact each other at a region between the second auxiliary pattern and the second auxiliary electrode on the first surface of the second bank layer.

[0022] In an embodiment, the display device may further include a capping pattern disposed in the area overlapping with the second opening, wherein the capping pattern at least partially covers the second auxiliary pattern, wherein the capping pattern may at least partially expose the second auxiliary pattern in the area overlapping with the second opening, and wherein a portion of the second auxiliary pattern partially exposed by the capping pattern may contact the first encapsulation layer.

[0023] In an embodiment, the display device may further include: a second pixel electrode, spaced apart from the first pixel electrode, wherein the pixel defining layer may be between the first pixel electrode and the second pixel electrode; a second light-emitting layer, disposed on the second pixel electrode; a second common electrode, disposed on the second light-emitting layer; a third auxiliary electrode, disposed on the second common electrode; and a fourth auxiliary electrode, disposed on the third auxiliary electrode, wherein the first encapsulation layer further includes: a first inorganic layer, covering the second auxiliary electrode; and a second inorganic layer, covering the fourth auxiliary electrode, wherein the first inorganic layer and the second inorganic layer may be disposed to be spaced apart from each other.

[0024] In an embodiment, the display device may further include a second encapsulation layer disposed on the first encapsulation layer, wherein the second encapsulation layer and the second embankment layer of the embankment structure contact each other in an area where the first inorganic layer and the second inorganic layer included in the first encapsulation layer may be spaced apart from each other.

[0025] An embodiment of a display device includes: a substrate; a first pixel electrode, arranged on the substrate; a pixel defining layer, arranged on the substrate and defining a first opening overlapping the first pixel electrode; a levee structure, arranged on the pixel defining layer and defining a second opening overlapping the first opening; a first light-emitting layer, arranged on the first pixel electrode and in the first opening; a first common electrode, arranged on the first light-emitting layer and in contact with the levee structure in the second opening; a first auxiliary electrode, arranged on the first common electrode, the first auxiliary electrode completely covering the first common electrode in the second opening, and the first auxiliary electrode in contact with the levee structure; a second auxiliary electrode, arranged on the first auxiliary electrode, the second auxiliary electrode completely covering the first auxiliary electrode in the second opening, and the second auxiliary electrode in contact with the levee structure; a first electrode pattern, arranged on the levee structure, wherein the first electrode pattern surrounds the a first opening and is separated from the first common electrode; a first auxiliary pattern, completely covering the first electrode pattern, and the first auxiliary pattern is separated from the first auxiliary electrode in an area overlapping with the second opening; a second auxiliary pattern, completely covering the first auxiliary pattern, and the second auxiliary pattern is separated from the second auxiliary electrode in the area overlapping with the second opening; and an encapsulation layer, completely covering the second auxiliary electrode and the second auxiliary pattern in the area overlapping with the second opening, wherein the embankment structure may include: a first embankment layer, which is arranged on the pixel defining layer and includes a conductive material; and a second embankment layer, which is arranged on the first embankment layer and includes a tip protruding toward the first opening than a side surface of the first embankment layer, wherein the second auxiliary pattern includes: a first surface, overlapping with the second opening and covering the side surface of the second embankment layer; and a second surface, covering a surface of the second embankment layer facing the first embankment layer.

[0026] In an embodiment, the second auxiliary electrode extends to a boundary surface where the first bank layer and the second bank layer may contact each other, wherein the second auxiliary pattern also includes a third surface in contact with the surface of the second bank layer facing the first bank layer, and wherein the second surface of the second auxiliary pattern covering the surface of the second bank layer and the third surface of the second auxiliary electrode in contact with the surface of the second bank layer may be spaced apart from each other.

[0027] In the display device according to the embodiment of the present disclosure, resistance can be reduced and brightness can be improved.

[0028] In the display device according to the embodiment of the present disclosure, the permeability of moisture and oxygen may be reduced, and the brightness may be improved.

[0029] However, the effects according to the embodiments of the present disclosure are not limited to the effects exemplified above, and various other effects are also incorporated herein. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other aspects and features of the present disclosure will become more apparent by describing in detail example embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0031] Figure 1 is a schematic perspective view showing an electronic device according to an embodiment;

[0032] Figure 2 is a perspective view showing a display device included in an electronic device according to an embodiment;

[0033] Figure 3 is a diagram showing a display device 10 viewed from one side. Figure 2 A cross-sectional view of a display device;

[0034] Figure 4 is a plan view showing a display layer of a display device according to an embodiment;

[0035] Figure 5 is a plan view showing the arrangement of emission areas in a first display area of ​​a display device according to an embodiment;

[0036] Figure 6 It is along Figure 5 A cross-sectional view taken along line X1-X1';

[0037] Figure 7 yes Figure 6 A cross-sectional view of a first emission region;

[0038] Figure 8 yes Figure 7 An enlarged view of area "A";

[0039] Fig. 9 yes Figure 7 an enlarged cross-sectional view of region "C" of FIG.

[0040] Fig.10 yes Figure 6 An enlarged cross-sectional view of area "T". DETAILED DESCRIPTION

[0041] Hereinafter, the present invention will now be described more fully with reference to the accompanying drawings, in which various embodiments of the present invention are shown. However, the present invention can be implemented in different forms and should not be construed as being limited to the embodiments set forth herein. On the contrary, these embodiments are provided so that the disclosure will be exhaustive and complete and will fully convey the scope of the present invention to those skilled in the art. The same reference numerals refer to the same components throughout the specification. In the accompanying drawings, the thickness of layers and zones is exaggerated for clarity.

[0042] It will also be understood that when a layer is referred to as being “on” another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present.

[0043] It will be understood that although the terms "first", "second", or "third", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element or for the convenience of its description and explanation. For example, without departing from the teachings herein, when discussing a "first element" in the description, the "first element" may be referred to as a "second element" or a "third element", and the "second element" and the "third element" may be named in a similar manner.

[0044] The terms used herein are only for the purpose of describing specific embodiments, and are not intended to be restrictive. Unless the context clearly indicates otherwise, as used herein, "one", "one (kind / person)", "the (said)" and "at least one (kind / person)" do not represent the limitation of quantity, and are intended to include both singular and plural. Unless the context clearly indicates otherwise, for example, "an element" has the same meaning as "at least one element". "At least one (kind / person)" is not interpreted as being limited to "one" or "one (kind / person)". "Or" means "and / or". As used herein, the term "and / or" may include any and all combinations of one or more related listed items. It will also be understood that when used in this specification, the term "comprises and / or comprising" or "includes and / or including" indicates the presence of stated features, regions, wholes, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, components and / or their groups.

[0045] In addition, relative terms such as "lower" or "bottom" and "upper" or "top" may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. It will be understood that, in addition to the orientation depicted in the accompanying drawings, spatial terms are also intended to cover different orientations of the device. For example, if the device in a figure is turned over, the element described as "on the "lower" side of the other elements will then be oriented "on the "upper" side of the other elements. Therefore, depending on the specific orientation of the accompanying drawings, the term "lower" can cover both "upper" and "lower" orientations. Similarly, if the device in a figure is turned over, the element described as "below" or "under" the other elements will then be oriented "above" the other elements. Therefore, the terms "below..." or "under..." can cover both upper and lower orientations.

[0046] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, or ±5% of the stated value.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and should not be interpreted in an idealized or overly formal sense.

[0048] Embodiments are described herein with reference to schematically illustrated cross-sectional illustrations as idealized embodiments. Therefore, variations in the shapes of the illustrations due to, for example, manufacturing techniques and / or tolerances are expected. Therefore, the embodiments described herein should not be interpreted as being limited to the specific shapes of the zones shown herein, but rather include deviations in shapes due to, for example, manufacturing. For example, a zone shown or described as flat may typically have rough and / or nonlinear features. In addition, the sharp corners shown may be rounded. Therefore, the zones shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the precise shapes of the zones, and are not intended to limit the scope of the claims.

[0049] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0050] Figure 1 is a schematic perspective view showing an electronic device 1 according to the embodiment.

[0051] Reference Figure 1 , the electronic device 1 can display a moving image or a still image. The electronic device 1 may refer to all suitable electronic devices including a display screen. For example, the electronic device 1 may be or include a television, a laptop computer, a monitor, a billboard, an Internet of Things device, a mobile phone, a smart phone, a tablet computer (PC), an electronic watch, a smart watch, a watch phone, a head-mounted display, a mobile communication terminal, an electronic diary, an electronic book, a portable multimedia player (PMP), a navigator, a game console, a digital camera, and a video camera, etc.

[0052] The electronic device 1 may include a display device 10 for providing a display screen (see Figure 2 ). Examples of display devices include inorganic light emitting diode display devices, organic light emitting display devices, quantum dot light emitting display devices, plasma display devices, and field emission display devices. In the examples described herein, an organic light emitting diode display device is used as an example of a display device, but the example of the display device is not limited to the organic light emitting diode display device, and other display devices may be applied with the same technical spirit as applied thereto.

[0053] The shape of the electronic device 1 may be variously modified. For example, the electronic device 1 may be a horizontally long rectangular shape, a vertically long rectangular shape, a square shape, a square shape with rounded corners (vertices), other polygonal shapes, and a circular shape, etc. The shape of the display area DA of the electronic device 1 may also be similar to the overall shape of the electronic device 1. Figure 1 , the electronic device 1 is in a rectangular shape that is longer in the second direction Y.

[0054] The electronic device 1 may include a display area DA and a non-display area NDA. The display area DA is an area where an image can be displayed, and the non-display area NDA is an area where an image is not displayed. The display area DA may be referred to as an active area, and the non-display area NDA may be referred to as an inactive area. The display area DA generally occupies the center of the electronic device 1.

[0055] The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The second display area DA2 and the third display area DA3 are areas where components for adding various functions to the electronic device 1 are disposed, and may correspond to component areas.

[0056] Figure 2 is a perspective view showing a display device 10 included in the electronic device 1 according to the embodiment.

[0057] Reference Figure 2 , according to the electronic device 1 of the embodiment (see Figure 1) may include a display device 10. The display device 10 may provide an image displayed by the electronic device 1. The display device 10 may have a planar shape similar to the planar shape of the electronic device 1. For example, the display device 10 may have a shape similar to a rectangular shape having a short side in a first direction X and a long side in a second direction Y. The corner at which the short side in the first direction X and the long side in the second direction Y intersect may be rounded to have an arc, but is not limited thereto, and may be formed to have a right angle. The planar shape of the display device 10 is not limited to a quadrilateral shape, and may be formed to be similar to other polygonal shapes, a circular shape, or an elliptical shape.

[0058] The display device 10 may include a display panel 100 , a display driver 200 , a circuit board 300 , and a touch driver 400 .

[0059] The display panel 100 may include a main area MA and a sub area SBA.

[0060] The main area MA may include a display area DA (including pixels for displaying an image) and a non-display area NDA disposed near the display area DA. The display area DA may include a first display area DA1, a second display area DA2, and a third display area DA3. The display area DA may emit light from a plurality of light-emitting areas or a plurality of opening areas. For example, the display panel 100 may include a pixel circuit including a switching element, a pixel defining layer defining a light-emitting area or an opening area, and a self-luminous element.

[0061] For example, the self-luminous element may include at least one of an organic light emitting diode including an organic light emitting layer, a quantum dot light emitting diode including a quantum dot light emitting layer, an inorganic LED including an inorganic semiconductor, and a micro LED.

[0062] The non-display area NDA may be an outer area of ​​the display area DA. The non-display area NDA may be defined as an edge area of ​​the main area MA of the display panel 100. The non-display area NDA may include a gate driver (not shown) for supplying gate signals to gate lines and fan-out lines (not shown) connecting the display driver 200 with the display area DA.

[0063] The sub-region SBA may be a region extending from one side of the main region MA. The sub-region SBA may include a flexible material that can be bent, folded, or curled, etc. For example, when the sub-region SBA is bent, the sub-region SBA may overlap with the main region MA in the thickness direction (third direction Z). The sub-region SBA may include a display driver 200 and a pad portion connected to the circuit board 300. In another embodiment, the sub-region SBA may be omitted, and the display driver 200 and the pad portion may be disposed in the non-display area NDA.

[0064] The display driver 200 may output signals and voltages for driving the display panel 100. The display driver 200 may supply data voltages to data lines. The display driver 200 supplies power voltages to power lines and gate control signals to gate drivers. The display driver 200 may be formed by an integrated circuit IC and then packaged on the display panel 100 by a chip on glass (COG) method, a chip on plastic (COP) method, or an ultrasonic bonding method. For example, the display driver 200 may be disposed in a sub-region SBA and overlap with the main region MA in a thickness direction by bending the sub-region SBA. In another example, the display driver 200 may be packaged on a circuit board 300.

[0065] The circuit board 300 may be attached to the pad portion of the display panel 100 through an anisotropic conductive film (ACF). The leads of the circuit board 300 may be electrically connected to the pad portion of the display panel 100. The circuit board 300 may be formed of a flexible film, and may be, for example, a printed circuit board (such as a flexible printed circuit board) or a chip on film.

[0066] The touch driver 400 may be packaged on the circuit board 300. The touch driver 400 may be connected to the touch sensor of the display panel 100. The touch driver 400 may supply a touch drive signal to a plurality of touch electrodes of the touch sensor, and sense the amount of change in capacitance between the plurality of touch electrodes. For example, the touch drive signal may be a pulse signal having a predetermined frequency. The touch driver 400 may calculate whether to perform input and input coordinates based on the amount of change in capacitance between the plurality of touch electrodes. The touch driver 400 may be formed as an integrated circuit (IC).

[0067] Figure 3 is a diagram showing a display device 10 viewed from one side. Figure 2 1 is a cross-sectional view of a display device 10 .

[0068] Reference Figure 3 , the display panel 100 may include a display layer DPL, a touch sensing layer 180 and a color filter layer 190. In addition, the display layer DPL may include a substrate 110, a thin film transistor layer 130, a light emitting element layer 150 and a thin film encapsulation layer 170.

[0069] The substrate 110 may be a base substrate or a base member. The substrate 110 may be a flexible substrate that can be bent, folded, or rolled. For example, the substrate 110 may include a polymer resin such as polyimide (PI), but is not limited thereto. For example, the substrate 110 may include a glass material or a metal material.

[0070] The thin film transistor layer 130 may be disposed on the substrate 110. The thin film transistor layer 130 may include a plurality of thin film transistors constituting a pixel circuit of a pixel. The thin film transistor layer 130 may also include a gate line, a data line, a power line, a gate control line, a fan-out line for connecting the display driver 200 to the data line, and a lead for connecting the display driver 200 to the pad portion. Each of the plurality of thin film transistors may include a semiconductor region, a source region, a drain electrode, and a gate electrode. For example, when a gate driver is formed on one side of a non-display area NDA of the display panel 100, the gate driver may include a thin film transistor.

[0071] The thin film transistor layer 130 may be disposed in the display area DA, the non-display area NDA, and the sub-area SBA. The thin film transistors, gate lines, data lines, and power lines of the respective pixels of the thin film transistor layer 130 may be disposed in the display area DA. The gate control lines and fan-out lines of the thin film transistor layer 130 may be disposed in the non-display area NDA. The leads of the thin film transistor layer 130 may be disposed in the sub-area SBA.

[0072] The light emitting element layer 150 may be disposed on the thin film transistor layer 130. The light emitting element layer 150 may include a plurality of light emitting elements including a first electrode, a second electrode and a light emitting layer to emit light and a pixel defining layer defining pixels. The plurality of light emitting elements of the light emitting element layer 150 may be disposed in the display area DA.

[0073] In an embodiment, the light-emitting layer may be an organic light-emitting layer including an organic material. The light-emitting layer may include a hole transport layer, an organic light-emitting layer, and an electron transport layer. When the first electrode receives a voltage through the thin film transistor of the thin film transistor layer 130, and the second electrode receives a cathode voltage, holes and electrons may move to the organic light-emitting layer through the hole transport layer and the electron transport layer, respectively, and may recombine with each other in the organic light-emitting layer to emit light.

[0074] In another embodiment, the light emitting element may include a quantum dot light emitting diode including a quantum dot light emitting layer, an inorganic light emitting diode including an inorganic semiconductor, or a micro light emitting diode.

[0075] The thin film encapsulation layer 170 may cover the upper surface and the side of the light emitting element layer 150 and protect the light emitting element layer 150. The thin film encapsulation layer 170 may include at least one inorganic layer and at least one organic layer to encapsulate the light emitting element layer 150.

[0076] The touch sensing layer 180 may be disposed on the thin film encapsulation layer 170. The touch sensing layer 180 may include a plurality of touch electrodes for sensing a user's touch in a capacitive manner and touch lines connecting the touch electrodes and the touch driver 400. For example, the touch sensing layer 180 may sense a user's touch in a mutual capacitance manner or a self capacitance manner.

[0077] In an embodiment, the touch sensing layer 180 may be disposed on a separate substrate disposed on the display layer DPL. In this case, the substrate supporting the touch sensing layer 180 may be a base member encapsulating the display layer DPL.

[0078] The touch electrodes of the touch sensing layer 180 may be disposed in a touch sensing area overlapping the display area DA. The touch lines of the touch sensing layer 180 may be disposed in a touch peripheral area overlapping the non-display area NDA.

[0079] In some embodiments, the display device 10 may further include an optical device 500. The optical device 500 may be disposed in the second display area DA2 or the third display area DA3. The optical device 500 may emit or receive light in an infrared band, an ultraviolet band, or a visible light band. For example, the optical device 500 may be an optical sensor capable of sensing light incident on the display device 10. For example, the optical sensor may be a proximity sensor, an illumination sensor, a camera sensor, or an image sensor.

[0080] The color filter layer 190 may overlap with an emission region disposed on the thin film encapsulation layer 170 (e.g., such that the color filter layer 190 is disposed on the thin film encapsulation layer 170). The color filter layer 190 may include a plurality of color filters corresponding to the plurality of emission regions, respectively. Each of the plurality of color filters may selectively transmit light of a specific wavelength and block or absorb light of other wavelengths. The color filter layer 190 may absorb a portion of the light introduced from outside the display device 10 to reduce the amount of reflected light due to external light. Therefore, the color filter layer 190 may prevent color distortion due to reflection of external light.

[0081] exist Figure 3 In the example embodiment shown in FIG. 1 , the color filter layer 190 is directly disposed on the thin film encapsulation layer 170, and the display device 10 may be implemented without a separate substrate for the color filter layer 190. Therefore, the thickness of the display device 10 may be relatively small compared to other display devices.

[0082] Figure 4 FIG. 1 is a diagram showing a display device 10 according to an embodiment (see FIG. Figure 3 )’s plan view of the display layer DPL.

[0083] Reference Figure 4, also refer to Figure 2 , the display layer DPL may include a display area DA and a non-display area NDA.

[0084] The display area DA may be disposed at the center of the display panel 100. A plurality of pixels PX, a plurality of gate lines GL, a plurality of data lines DL, and a plurality of power lines VL may be disposed in the display area DA. Each of the plurality of pixels PX may be defined as a minimum unit for emitting light.

[0085] The plurality of gate lines GL may supply gate signals received from the gate driver 210 to the plurality of pixels PX. The plurality of gate lines GL may extend in a first direction X, and may be spaced apart from each other in a second direction Y crossing the first direction X.

[0086] The plurality of data lines DL may supply data voltages received from the display driver 200 to the plurality of pixels PX. The plurality of data lines DL may extend in the second direction Y, and may be spaced apart from each other in the first direction X.

[0087] The plurality of power lines VL may supply a power voltage received from the display driver 200 to the plurality of pixels PX. The power voltage may be at least one of a driving voltage, an initialization voltage, a reference voltage, and a low potential voltage. The plurality of power lines VL may extend in the second direction Y and may be spaced apart from each other in the first direction X.

[0088] The non-display area NDA may surround the display area DA. The gate driver 210, the fan-out line FOL, and the gate control line GCL may be disposed in the non-display area NDA. The gate driver 210 may generate a plurality of gate signals based on the gate control signal, and may sequentially supply the plurality of gate signals to the plurality of gate lines GL according to a set order.

[0089] The fan-out line FOL may extend from the display driver 200 to the display area DA. The fan-out line FOL may supply a data voltage received from the display driver 200 to the plurality of data lines DL.

[0090] The gate control line GCL may extend from the display driver 200 to the gate driver 210. The gate control line GCL may supply a gate control signal received from the display driver 200 to the gate driver 210.

[0091] The sub-area SBA may include the display driver 200 and the pad area DPA.

[0092] The display driver 200 may output signals and voltages for driving the display panel 100 to the fan-out lines FOL. The display driver 200 may supply data voltages to the data lines DL through the fan-out lines FOL. The data voltages may be supplied to a plurality of pixels PX, and the brightness of the plurality of pixels PX may be controlled. The display driver 200 may supply gate control signals to the gate driver 210 through the gate control lines GCL.

[0093] The pad area DPA may be disposed at an edge of the sub-area SBA. The pad area DPA may be electrically connected to the circuit board 300 by using a material such as, for example, an anisotropic conductive film or a self-assembled anisotropic conductive paste (SAP).

[0094] The pad area DPA may include a plurality of display pads DP. The plurality of display pads DP may be connected to a graphics system through the circuit board 300. The plurality of display pads DP may be connected to the circuit board 300 to receive digital video data, and may supply the digital video data to the display driver 200.

[0095] Figure 5 is a plan view showing the arrangement of emission areas EA1 to EA3 in the first display area DA1 of the display device 10 according to the embodiment.

[0096] Reference Figure 5 , also refer to Figure 2 , the display device 10 may include a plurality of emission areas EA1 to EA3 (also referred to herein as a plurality of light emitting areas EA1 , EA2 , and EA3 ) disposed in the display area DA. Figure 5 The display area DA shown in the figure may be the first display area DA1 described herein, and the emission areas EA1 to EA3 may be disposed in the first display area DA1. However, in some embodiments, the emission areas EA1 to EA3 may also be disposed in the second display area DA2 and the third display area DA3 of the display area DA.

[0097] The emission areas EA1 to EA3 may include a first emission area EA1, a second emission area EA2, and a third emission area EA3 that emit light of different colors. Each of the first emission area EA1 to the third emission area EA3 may emit red light, green light, or blue light, and the color of the light emitted from each of the first emission area EA1 to the third emission area EA3 may be determined according to the light emitting element ED1, ED2, or ED3 (see FIG. 1 ) provided in the light emitting element layer 150 to be described later. Figure 6). In an example embodiment, the first emission area EA1 may emit red first light, the second emission area EA2 may emit green second light, and the third emission area EA3 may emit blue third light. However, the present disclosure is not limited thereto, and each of the first emission area EA1 to the third emission area EA3 may be configured to emit any one of red light, green light, or blue light.

[0098] The emission areas EA1 to EA3 can be arranged as Type, e.g. diamond For example, the first emission area EA1 and the third emission area EA3 may be spaced apart from each other in the first direction X, and may be alternately disposed in the first direction X and the second direction Y. In the arrangement of the emission areas EA1 to EA3, the first emission area EA1 and the third emission area EA3 may be alternately disposed in the first row R1 and the third row R3 in the first direction X. The first emission area EA1 and the third emission area EA3 may be alternately disposed in the first column C1 and the third column C3 in the second direction Y.

[0099] Each of the second emission areas EA2 may be spaced apart from other adjacent second emission areas EA2 in the first direction X and the second direction Y, and may be spaced apart from the adjacent first emission areas EA1 and the third emission areas EA3 in the fourth direction DR4 or the fifth direction DR5. The second emission areas EA2 may be repeatedly arranged along the first direction X and the second direction Y. The second emission areas EA2 and the first emission areas EA1 or the second emission areas EA2 and the third emission areas EA3 may be alternately arranged along the fourth direction DR4 or the fifth direction DR5. In the arrangement of the emission areas EA1 to EA3, the second emission areas EA2 may be repeatedly arranged in the second row R2 and the fourth row R4 in the first direction X, and may be repeatedly arranged in the second column C2 and the fourth column C4 in the second direction Y.

[0100] The first to third emission areas EA1 to EA3 may be respectively formed of an inorganic pixel defining layer 151 (see FIG. 1 ) of a light emitting element layer 150 to be described later herein. Figure 6 ) and dike structure 160 (see Figure 6 ) is defined by a plurality of first openings OP1 and second openings OP2 formed.

[0101] Figure 6 The display device 10 according to the embodiment (see Figure 5 ) is a cross-sectional view of a portion of ). Figure 6 It is along Figure 5 A cross-sectional view taken along line X1-X1'.

[0102] Figure 6is a partial cross-sectional view of the display device 10 , which shows a substrate 110 , a thin film transistor layer 130 , a light emitting element layer 150 , a thin film encapsulation layer 170 , a touch sensing layer 180 , and a color filter layer 190 .

[0103] Reference Figure 6 , also refer to Figure 1 and Figure 2 , the display layer DPL may include a substrate 110 , a thin film transistor layer 130 , a light emitting element layer 150 , and a thin film encapsulation layer 170 .

[0104] For the sake of brevity, repeated detailed descriptions about the substrate 110 will be omitted in the following description.

[0105] The thin film transistor layer 130 may include a first buffer layer 111, a bottom metal layer BML, a second buffer layer 113, a thin film transistor TFT, a gate insulating layer 131, a first interlayer insulating layer 133, a capacitor electrode CPE, a second interlayer insulating layer 135, a first connection electrode CNE1, a first passivation layer 137, a second connection electrode CNE2 and a second passivation layer 139.

[0106] The first buffer layer 111 may be disposed on the substrate 110. The first buffer layer 111 may include an inorganic layer capable of preventing air or moisture from penetrating. In some examples, the first buffer layer 111 may include a plurality of inorganic layers alternately stacked.

[0107] The bottom metal layer BML may be disposed on the first buffer layer 111. In some examples, each of the bottom metal layers BML may be a single layer or a multilayer made of any one or more of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and alloys thereof.

[0108] The second buffer layer 113 may cover the first buffer layer 111 and the bottom metal layer BML. The second buffer layer 113 may include an inorganic layer that may prevent penetration of air or moisture. In some examples, the second buffer layer 113 may include a plurality of alternately stacked inorganic layers.

[0109] The thin film transistor TFT may be disposed on the second buffer layer 113 and may constitute respective pixel circuits of a plurality of pixels. For example, each of the thin film transistors TFT may be a driving transistor or a switching transistor of a pixel circuit. Each of the thin film transistors TFT may include a semiconductor layer ACT, a source electrode SE, a drain electrode DE, and a gate electrode GE.

[0110] The semiconductor layer ACT may be disposed on the second buffer layer 113. The semiconductor layer ACT may overlap the bottom metal layer BML and the gate electrode GE in the thickness direction, and may be insulated from the gate electrode GE by the gate insulating layer 131. In a portion of the semiconductor layer ACT, the material of the semiconductor layer ACT may be made conductive to form a source electrode SE and a drain electrode DE.

[0111] The gate electrode GE may be disposed on the gate insulating layer 131. The gate electrode GE may overlap the semiconductor layer ACT with the gate insulating layer 131 interposed therebetween.

[0112] The gate insulating layer 131 may be disposed on the semiconductor layer ACT. For example, the gate insulating layer 131 may cover the semiconductor layer ACT and the second buffer layer 113 and may isolate the semiconductor layer ACT from the gate electrode GE. The gate insulating layer 131 may include a contact hole through which the first connection electrode CNE1 may pass.

[0113] The first interlayer insulating layer 133 may cover the gate electrode GE and the gate insulating layer 131. The first interlayer insulating layer 133 may include a contact hole through which the first connection electrode CNE1 may pass. The contact hole of the first interlayer insulating layer 133 may be connected to the contact hole of the gate insulating layer 131 and the contact hole of the second interlayer insulating layer 135.

[0114] The capacitor electrode CPE may be disposed on the first interlayer insulating layer 133. The capacitor electrode CPE may overlap the gate electrode GE in a thickness direction. The capacitor electrode CPE and the gate electrode GE may form a capacitance.

[0115] The second interlayer insulating layer 135 may cover the capacitor electrode CPE and the first interlayer insulating layer 133. The second interlayer insulating layer 135 may include a contact hole through which the first connection electrode CNE1 passes. The contact hole of the second interlayer insulating layer 135 may be connected to the contact hole of the first interlayer insulating layer 133 and the contact hole of the gate insulating layer 131.

[0116] The first connection electrode CNE1 may be disposed on the second interlayer insulating layer 135. The first connection electrode CNE1 may electrically connect the drain electrode DE of the thin film transistor TFT to the second connection electrode CNE2. The first connection electrode CNE1 may be inserted into a contact hole formed in the second interlayer insulating layer 135, the first interlayer insulating layer 133, and the gate insulating layer 131 to contact the drain electrode DE of the thin film transistor TFT.

[0117] The first passivation layer 137 may cover the first connection electrode CNE1 and the second interlayer insulating layer 135. The first passivation layer 137 may protect the thin film transistor TFT. The first passivation layer 137 may include a contact hole through which the second connection electrode CNE2 passes.

[0118] The second connection electrode CNE2 may be disposed on the first passivation layer 137. The second connection electrode CNE2 may electrically connect the first connection electrode CNE1 to the pixel electrodes AE1 to AE3 of the light emitting elements ED1 to ED3. The second connection electrode CNE2 may be inserted into a contact hole formed in the first passivation layer 137 to contact the first connection electrode CNE1.

[0119] The second passivation layer 139 may cover the second connection electrode CNE2 and the first passivation layer 137. The second passivation layer 139 may include contact holes through which the pixel electrodes AE1 to AE3 of the light emitting elements ED1 to ED3 may pass.

[0120] The light emitting element layer 150 may be disposed on the thin film transistor layer 130. The light emitting element layer 150 may include light emitting elements ED1 to ED3, an inorganic pixel defining layer 151, and a bank structure 160. Each of the light emitting elements ED1 to ED3 may include a pixel electrode AE1, AE2, or AE3, a light emitting layer EL1, EL2, or EL3, and a common electrode CE1, CE2, or CE3.

[0121] The display device 10 may include a plurality of emission areas EA1 to EA3 disposed in the display area DA.

[0122] In some embodiments, the first emission area EA1 to the third emission area EA3 may have the same area or size. For example, in the display device 10, the second opening OP2 of the embankment structure 160 may have the same diameter, and the first emission area EA1 to the third emission area EA3 may have the same area. However, the present disclosure is not limited to this. For example, in the display device 10, the first emission area EA1 to the third emission area EA3 may have different areas or sizes. In the example, the area of ​​each second emission area EA2 may be greater than the area of ​​each first emission area EA1 and the area of ​​each third emission area EA3, and the area of ​​each third emission area EA3 may be greater than the area of ​​each first emission area EA1. The intensity of light emitted from each of the emission areas EA1 to EA3 may vary according to the area of ​​the emission area EA1, EA2 or EA3, and the color of the screen displayed on the display device 10 or the electronic device 1 can be controlled by adjusting the area of ​​each of the emission areas EA1 to EA3. That is, for example, the electronic device 1 and the display device 10 can freely adjust the areas of the light emitting areas EA1 , EA2 , and EA3 according to target colors for the screens of the display device 10 and the electronic device 1 .

[0123] In the display device 10, the first emission area EA1, the second emission area EA2, and the third emission area EA3 disposed adjacent to each other may form a pixel group. The pixel group may include emission areas EA1, EA2, and EA3 that emit light of different colors, thereby representing a white grayscale, but the present disclosure is not limited thereto. The combination of emission areas EA1, EA2, and EA3 constituting a pixel group may be modified in various ways depending on the arrangement of the emission areas EA1, EA2, and EA3 and the color of the light emitted from the emission areas EA1, EA2, and EA3.

[0124] The pixel electrodes AE1 to AE3 may be disposed on the second passivation layer 139. Each of the pixel electrodes AE1 to AE3 may overlap the second opening OP2 through the bank structure 160. The pixel electrodes AE1 to AE3 may be electrically connected to the drain electrode DE of the thin film transistor TFT through the first and second connection electrodes CNE1 and CNE2.

[0125] The pixel electrodes AE1 to AE3 may be disposed in the emission areas EA1 to EA3, respectively. The pixel electrodes AE1 to AE3 may include a first pixel electrode AE1 disposed in the first emission area EA1, a second pixel electrode AE2 disposed in the second emission area EA2, and a third pixel electrode AE3 disposed in the third emission area EA3. Each of the first pixel electrode AE1, the second pixel electrode AE2, and the third pixel electrode AE3 may be spaced apart from each other on the second passivation layer 139. The pixel electrodes AE1 to AE3 may be disposed in different emission areas EA1 to EA3, respectively, to form light emitting elements ED1 to ED3 that emit light of different colors.

[0126] In example embodiments, the pixel electrodes AE1 to AE3 may have a material such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In 2 O 3 ) as an example and a stacked structure of a reflective material layer such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pb), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca) or a mixture thereof. The material layer with a high work function can be disposed on the reflective material layer so that the material layer with a high work function is positioned close to the light-emitting layers EL1 to EL3. For example, the pixel electrodes AE1 to AE3 can have, but are not limited to, ITO / Mg, ITO / MgF 2 , ITO / Ag or ITO / Ag / ITO multilayer structure.

[0127] The display device 10 may include an inorganic pixel defining layer 151 and pixel electrodes AE1 to AE3 disposed on the second passivation layer 139. The inorganic pixel defining layer 151 may define a plurality of first openings OP1 forming emission areas EA1, EA2, and EA3. The inorganic pixel defining layer 151 may be disposed on the entire surface of the second passivation layer 139 and partially overlap with the pixel electrodes AE1, AE2, and AE3 while partially exposing the upper surfaces of the pixel electrodes AE1, AE2, and AE3. For example, the inorganic pixel defining layer 151 may expose the pixel electrodes AE1, AE2, and AE3 at the portions overlapping with the first openings OP1, and the light emitting layers EL1, EL2, and EL3 disposed on the pixel electrodes AE1, AE2, and AE3, respectively, may be disposed directly on the pixel electrodes AE1, AE2, and AE3.

[0128] The inorganic pixel defining layer 151 may include an inorganic insulating material, for example, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride.

[0129] The embankment structure 160 may be positioned on the inorganic pixel defining layer 151. The embankment structure 160 may define a plurality of second openings OP2 for forming the light emitting areas EA1, EA2, and EA3, and the light emitting elements ED1, ED2, and ED3 of the display device 10 may be disposed to overlap with the second openings OP2 of the embankment structure 160. The embankment structure 160 may include a first embankment layer 161 and a second embankment layer 163 including metal materials and structures different from each other to serve different functions. The embankment structure 160 will be described in more detail later hereinafter.

[0130] The light-emitting layers EL1 to EL3 may be disposed on the pixel electrodes AE1 to AE3. The light-emitting layers EL1 to EL3 may be organic light-emitting layers made of an organic material and may be formed on the pixel electrodes AE1 to AE3 by a deposition process. When the thin film transistor TFT applies a predetermined voltage to the pixel electrodes AE1 to AE3 of the light-emitting elements ED1 to ED3 and when the common electrodes CE1 to CE3 of the light-emitting elements ED1 to ED3 receive a common voltage or a cathode voltage, holes and electrons may move to the light-emitting layers EL1 to EL3 through the hole transport layer and the electron transport layer, respectively. Then, the holes and electrons may be combined with each other in the light-emitting layers EL1 to EL3 to emit light.

[0131] The light-emitting layers EL1 to EL3 may include a first light-emitting layer EL1, a second light-emitting layer EL2, and a third light-emitting layer EL3 disposed in different emission areas EA1 to EA3. The first light-emitting layer EL1 may be disposed on the first pixel electrode AE1 in the first emission area EA1, the second light-emitting layer EL2 may be disposed on the second pixel electrode AE2 in the second emission area EA2, and the third light-emitting layer EL3 may be disposed on the third pixel electrode AE3 in the third emission area EA3. The first light-emitting layer EL1 to the third light-emitting layer EL3 may be light-emitting layers of the first light-emitting element ED1 to the third light-emitting element ED3, respectively. The first light-emitting layer EL1 may be a light-emitting layer emitting red light of a first color, the second light-emitting layer EL2 may be a light-emitting layer emitting green light of a second color, and the third light-emitting layer EL3 may be a light-emitting layer emitting blue light of a third color.

[0132] According to an embodiment, portions of the light emitting layers EL1 to EL3 of the light emitting elements ED1 to ED3 may be disposed between the pixel electrodes AE1 to AE3 and the inorganic pixel defining layer 151. The inorganic pixel defining layer 151 may be disposed on the pixel electrodes AE1 to AE3, but may be spaced apart from the upper surfaces of the pixel electrodes AE1 to AE3. In the deposition process of the light emitting layers EL1 to EL3, the materials of the light emitting layers EL1 to EL3 may be deposited in a direction inclined to the upper surface of the substrate 110, rather than in a direction perpendicular to the upper surface of the substrate 110. Therefore, the light emitting layers EL1 to EL3 may be formed on the upper surfaces of the pixel electrodes AE1 to AE3 exposed by the second openings OP2 of the embankment structure 160, and may fill the space between the pixel electrodes AE1 to AE3 and the inorganic pixel defining layer 151. The deposition process of the light emitting layers EL1, EL2, and EL3 will be described in detail later.

[0133] In the manufacturing process of the display device 10, a temporary protective layer may be provided between the inorganic pixel defining layer 151 and the pixel electrodes AE1 to AE3, and then partially removed. In the area where the temporary protective layer is removed, the light-emitting layers EL1 to EL3 may be provided, and the lower surface of the inorganic pixel defining layer 151 may be spaced apart from the pixel electrodes AE1 to AE3. However, in the area between the inorganic pixel defining layer 151 and the pixel electrodes AE1 to AE3, the temporary protective layer that is not removed may remain as a residual pattern 157. Therefore, the area between the inorganic pixel defining layer 151 and the pixel electrodes AE1 to AE3 may be filled with the residual pattern 157 and the light-emitting layers EL1 to EL3.

[0134] The common electrodes CE1 to CE3 may be disposed on the light emitting layers EL1 to EL3. The common electrodes CE1 to CE3 may include a transparent conductive material to allow light generated by the light emitting layers EL1 to EL3 to pass therethrough. The common electrodes CE1 to CE3 may receive a common voltage or a low potential voltage. When the pixel electrodes AE1 to AE3 receive a voltage corresponding to the data voltage and the common electrodes CE1 to CE3 receive a low potential voltage, a potential difference may be formed between the pixel electrodes AE1 to AE3 and the common electrodes CE1 to CE3. Therefore, the light emitting layers EL1 to EL3 may emit light.

[0135] For example, the common electrodes CE1, CE2, and CE3 may include silver (Ag), but are not limited thereto. The common electrodes CE1, CE2, and CE3 may include all materials having a low work function such as Li, Ca, LiF, Al, Mg, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF 2The common electrodes CE1, CE2 and CE3 may further include a transparent metal oxide layer disposed on the material layer having a low work function.

[0136] The common electrodes CE1, CE2, and CE3 may include a first common electrode CE1, a second common electrode CE2, and a third common electrode CE3 disposed in respective light emitting areas EA1, EA2, and EA3 different from each other. The first common electrode CE1 may be disposed on the first light emitting layer EL1 in the first light emitting area EA1, the second common electrode CE2 may be disposed on the second light emitting layer EL2 in the second light emitting area EA2, and the third common electrode CE3 may be disposed on the third light emitting layer EL3 in the third light emitting area EA3.

[0137] In the display device 10 according to an embodiment of the present disclosure, the common electrodes CE1, CE2, and CE3 disposed in different light emitting areas EA1, EA2, and EA3 may be electrically connected to each other through the first bank structure layer 161 of the bank structure 160, without being directly connected to each other. Therefore, a portion of the common electrodes CE1, CE2, and CE3 may be disposed on one side of the first bank layer 161 of the bank structure 160.

[0138] The first auxiliary electrodes AX11, AX12, and AX13 and the second auxiliary electrodes AX21, AX22, and AX23 may be disposed on the common electrodes CE1, CE2, and CE3, respectively. The first auxiliary electrodes AX11, AX12, and AX13 and the second auxiliary electrodes AX21, AX22, and AX23 will be described in detail later.

[0139] A capping layer 159 may be disposed on the second auxiliary electrodes AX21, AX22, and AX23. The capping layer 159 may include an inorganic insulating material to cover the light emitting elements ED1 to ED3 and a pattern disposed on the embankment structure 160. The capping layer 159 may prevent the light emitting elements ED1 to ED3 from being damaged by external air during a manufacturing process of the display device 10, and prevent the pattern disposed on the embankment structure 160 from being peeled off. In example embodiments, the capping layer 159 may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, or silicon oxynitride.

[0140] The thin film encapsulation layer 170 may be disposed on the light emitting elements ED1 to ED3 and the embankment structure 160, and may cover the light emitting elements ED1 to ED3 and the embankment structure 160. The thin film encapsulation layer 170 may include at least one inorganic layer to prevent oxygen or moisture from penetrating into the light emitting element layer 150. The thin film encapsulation layer 170 may include at least one organic layer to protect the light emitting element layer 150 from foreign substances such as dust, for example. In example embodiments, the thin film encapsulation layer 170 may include a first encapsulation layer 171, a second encapsulation layer 173, and a third encapsulation layer 175 sequentially stacked. The first encapsulation layer 171 and the third encapsulation layer 175 may be inorganic encapsulation layers, and the second encapsulation layer 173 disposed between the first encapsulation layer 171 and the third encapsulation layer 175 may be an organic encapsulation layer.

[0141] Each of the first encapsulation layer 171 and the third encapsulation layer 175 may include one or more inorganic insulating materials. The inorganic insulating material may include aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and silicon oxynitride.

[0142] The second encapsulation layer 173 may include a polymer-based material. Examples of polymer-based materials may include acrylic resin, epoxy resin, polyimide, and polyethylene. For example, the second encapsulation layer 173 may include an acrylic resin such as polymethyl methacrylate or polyacrylic acid. The second encapsulation layer 173 may be formed by curing a monomer or applying a polymer.

[0143] The first encapsulation layer 171 may include a first inorganic layer 171 - 1 , a second inorganic layer 171 - 2 , and a third inorganic layer 171 - 3 disposed to correspond to different emission areas EA1 to EA3 , respectively.

[0144] The touch sensing layer 180 may be disposed on the thin film encapsulation layer 170. The touch sensing layer 180 may include a touch buffer layer 181, a touch insulating layer 183, a touch electrode TE, and a touch protection layer 185.

[0145] The touch buffer layer 181 may be disposed on the thin film encapsulation layer 170. The touch buffer layer 181 may have insulating and optical functions. The touch buffer layer 181 may include at least one inorganic layer. Optionally, the touch buffer layer 181 may be omitted. Although not shown in the drawings, a connection electrode electrically connected to the touch electrode may be disposed on the touch buffer layer 181. The connection electrode may be a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or indium tin oxide (ITO), or may be a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and indium tin oxide (ITO / Al / ITO), an APC alloy, or a stacked structure of an APC alloy and indium tin oxide (ITO / APC / ITO).

[0146] The touch insulating layer 183 may cover the touch buffer layer 181. For example, the touch insulating layer 183 may be an inorganic layer including at least one of a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, and an aluminum oxide layer.

[0147] Some of the touch electrodes TE may be disposed on the touch insulating layer 183. Each of the touch electrodes TE may not overlap with the first to third emission areas EA1 to EA3. Each of the touch electrodes TE may be a single layer of molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or indium tin oxide (ITO), or may be a stacked structure of aluminum and titanium (Ti / Al / Ti), a stacked structure of aluminum and indium tin oxide (ITO / Al / ITO), an APC alloy, or a stacked structure of an APC alloy and indium tin oxide (ITO / APC / ITO).

[0148] The touch protection layer 185 may cover the touch electrode TE and the touch insulating layer 183 . The touch protection layer 185 may have insulating and optical functions. The touch protection layer 185 may be made of at least one of the example materials of the touch insulating layer 183 .

[0149] The light blocking layer BM may be disposed on the touch sensing layer 180. The light blocking layer BM may overlap the inorganic pixel defining layer 151 and the embankment structure 160. The light blocking layer BM may include a light absorbing material. For example, the light blocking layer BM may include an inorganic black pigment or an organic black pigment. The inorganic black pigment may be carbon black, and the organic black pigment may include at least one of lactam black, perylene black, and aniline black. However, the present disclosure is not limited thereto. The light blocking layer BM may prevent color mixing by preventing the intrusion of visible light between the first emission area EA1 to the third emission area EA3, thereby improving the color gamut of the display device 10.

[0150] The color filter layer 190 may be disposed on the touch protection layer 185 and the light blocking layer BM to overlap the emission areas EA1 to EA3 .

[0151] The color filter layer 190 may include a first color filter 191, a second color filter 193, and a third color filter 195 that are respectively arranged to correspond to different emission areas EA1 to EA3. Each of the color filters 191, 193, and 195 may include a colorant such as a dye or pigment that absorbs light of a wavelength band other than a specific wavelength band, and may be arranged to correspond to the color of light emitted from one of the emission areas EA1 to EA3. For example, the first color filter 191 may be a red color filter that overlaps with the first emission area EA1 and transmits only red first light. The second color filter 193 may be a green color filter that overlaps with the second emission area EA2 and transmits only green second light, and the third color filter 195 may be a blue color filter that overlaps with the third emission area EA3 and transmits only blue third light.

[0152] exist Figure 6 In the embodiment, each of the color filters 191, 193, and 195 is spaced apart from other adjacent color filters 191, 193, and 195 on the light blocking layer BM. However, the present disclosure is not limited thereto. That is, each of the color filters 191, 193, and 195 may also partially overlap with other adjacent color filters 191, 193, and 195. Different color filters 191, 193, and 195 may overlap with each other on the light blocking layer BM in areas that do not overlap with the emission areas EA1 to EA3.

[0153] An overcoat layer OC may be disposed on the color filter layer 190 and the light blocking layer BM to flatten the upper ends of the color filters 191, 193, and 195. The overcoat layer OC may be a colorless light-transmitting layer having no color in the visible light band. For example, the overcoat layer OC may include a colorless light-transmitting organic material such as, for example, acrylic resin.

[0154] Figure 7 yes Figure 6 1 is a cross-sectional view of the first emission area EA1, which shows the first light emitting element ED1 disposed in the first emission area EA1 and a portion of the embankment structure 160 around the first light emitting element ED1. Figure 8 yes Figure 7 Magnified view of area "A".

[0155] Reference Figure 7 , also refer to Figure 6 , the bank structure 160 may be positioned on the inorganic pixel defining layer 151. The bank structure 160 may include a first bank layer 161 and a second bank layer 163.

[0156] The first bank layer 161 may be positioned on the inorganic pixel defining layer 151. The first bank layer 161 may include a metal having high conductivity. For example, the first bank layer 161 may include aluminum (Al) having high conductivity.

[0157] In some embodiments, the first bank layer 161 may include a first surface 161 a contacting the inorganic pixel defining layer 151 and a side surface 161 c facing the first opening OP1 .

[0158] The first surface 161 a of the first bank layer 161 may be positioned along the inorganic pixel defining layer 151 . Thus, the first surface 161 a of the first bank layer 161 may cover the step of the inorganic pixel defining layer 151 .

[0159] The side surface 161c of the first bank structure layer 161 may be positioned at an angle corresponding to a direction between the first direction X and the third direction Z. In some embodiments, the bank structure 160 may be formed by a deposition and etching process instead of a mask process, and the first bank structure layer 161 may be formed by a wet etching process. Therefore, the side surface 161c of the first bank layer 161 may be recessed in the first direction X than the inorganic pixel defining layer 151, and thus may have an inclined surface shape. For example, the side surface 161c may be positioned as an inclined surface shape inclined in the first direction X based on the third direction Z.

[0160] The first bank layer 161 may be electrically connected to the common electrodes CE1, CE2, and CE3, the first auxiliary electrodes AX11, AX12, and AX13, and the second auxiliary electrodes AX21, AX22, and AX23. In some aspects, the contact area between the common electrodes CE1, CE2, and CE3, the first auxiliary electrodes AX11, AX12, and AX13, and the second auxiliary electrodes AX21, AX22, and AX23 and the first bank layer 161 increases, and the resistance of the display device 10 may be reduced. In example embodiments, the thickness W161 of the first bank layer 161 may be greater than the thickness W163 of the second bank layer 163.

[0161] The second bank layer 163 may be positioned on the first bank layer 161. The second bank layer 163 may include a material having a lower etching rate than the first bank layer 161, and, for example, may include titanium (Ti).

[0162] In some embodiments, the second bank layer 163 may include a first surface 163a facing the first bank layer 161 and a side surface 163c facing the first opening OP1. The second bank layer 163 may be formed by a wet etching process similar to or the same as the formation of the first bank layer 161. Compared to the first bank layer 161, the second bank layer 163 may include a material that is relatively stable compared to the wet etching process, and therefore, the side surface 163c of the second bank layer 163 is shaped such that the side surface 163c protrudes toward the first opening OP1 beyond the side surface 161c of the first bank layer 161 toward the first opening OP1. In other words, the side surface 161c of the first bank layer 161 may be shaped such that the side surface 161c is recessed inward from the side surface 163c of the second bank layer 163. Therefore, the second bank layer 163 of the bank structure 160 may include a tip TIP protruding toward the first opening OP1 (also referred to as a protruding tip TIP herein), and an undercut may be formed between a lower portion of the tip TIP of the second bank layer 163 and a side surface 161 c of the first bank layer 161 .

[0163] In some embodiments, the light-emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3 may be formed by a thermal evaporation process. Since the thermal evaporation process is performed in a high vacuum chamber, the light-emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3 may move with a relatively large mean free path value compared to the mean free path produced by the sputtering deposition process. Therefore, the particles of the light-emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3 formed during the manufacturing process may move with a relatively large mean free path value compared to the particles of the first auxiliary electrodes AX11, AX12, and AX13 and the second auxiliary electrodes AX21, AX22, and AX23 to be described later.

[0164] As described herein, the common electrodes CE1, CE2, and CE3 of the display device 10 may be indirectly connected. For example, the common electrodes CE1, CE2, and CE3 may be electrically connected through the first bank layer 161 of the bank structure 160. Therefore, when the contact area between the first bank structure layer 161 and the common electrodes CE1, CE2, and CE3 is formed to be wide (for example, such that the contact area between the first bank structure layer 161 and the common electrodes CE1, CE2, and CE3 is greater than the threshold distance), the resistance of the display device 10 may be reduced, thereby improving the brightness. In some cases, since the particles of the common electrodes CE1, CE2, and CE3 may move linearly, the material may not be smoothly deposited under the protruding tip TIP of the bank structure 160. According to one or more embodiments of the present disclosure, a structure capable of reducing the resistance of the display device 10 by assisting the common electrodes CE1, CE2, and CE3 is described herein.

[0165] Reference Figure 7 and Figure 8 , also refer to Figure 6 , the first auxiliary electrode AX11 may be positioned to completely cover the first common electrode CE1 in the region overlapping with the first opening OP1. For example, according to the plan view, the first auxiliary electrode AX11 may completely cover the first common electrode CE1. In addition, in the region overlapping with the second opening OP2, the first auxiliary electrode AX11 may be positioned to partially cover the side surface 161c of the first bank layer 161 and contact the side surface 161c of the first bank layer 161. In other words, the first auxiliary electrode AX11 positioned to overlap with the second opening OP2 may completely cover the first common electrode CE1 in the direction toward the second bank layer 163, and may extend along the side surface 161c of the first bank layer 161. In some embodiments, the first auxiliary electrode AX11 may be spaced apart from the first surface 163a of the second bank layer 163. In some alternative and / or additional embodiments, examples of describing a region as "overlapping with an opening..." may include implementations where the area is equal to the area of ​​the opening.

[0166] In some embodiments, the first auxiliary electrodes AX11, AX12, and AX13 have good electrical conductivity and thermal conductivity (e.g., electrical conductivity and thermal conductivity are equal to or greater than target electrical conductivity and thermal conductivity), and may include, for example, a silver (Ag) compound. Specifically, the first auxiliary electrodes AX11, AX12, and AX13 may include a silver-palladium-copper compound (Ag-Pd-Cu, APC), in which palladium and copper are added at 1 wt% or less. That is, the silver (Ag) content of the first auxiliary electrodes AX11, AX12, and AX13 may be equal to or greater than 99 wt%.

[0167] The first auxiliary electrodes AX11, AX12, and AX13 may be formed by a sputtering deposition process. For example, since the sputtering deposition process is performed under relatively low vacuum conditions compared to the thermal evaporation process, the mean free path of the particles forming the first auxiliary electrodes AX11, AX12, and AX13 may be less than the mean free path of the particles forming the light-emitting layers EL1 to EL3 and the common electrodes CE1, CE2, and CE3. Therefore, the first auxiliary electrodes AX11, AX12, and AX13 may be formed so that the step coverage of the first auxiliary electrodes AX11, AX12, and AX13 is higher than the step coverage of the light-emitting layers EL1, EL2, and EL3 and the common electrodes CE1, CE2, and CE3. In some aspects, a higher step coverage may support reduced complexity associated with depositing the first auxiliary electrodes AX11, AX12, and AX13 below the protruding tip TIP of the embankment structure 160 (e.g., the first auxiliary electrodes AX11, AX12, and AX13 may be easily deposited below the protruding tip TIP of the embankment structure 160). In the region overlapping with the protruding tip TIP of the bank structure 160, the first auxiliary electrodes AX11, AX12, and AX13 may be deposited on the side surface 161c of the first bank layer 161 with an area larger than that of the common electrodes CE1, CE2, and CE3. Expressed in another way, the first auxiliary electrodes AX11, AX12, and AX13 may be deposited on the side surface 161c of the first bank layer 161 so that the respective areas of the first auxiliary electrodes AX11, AX12, and AX13 according to the plan view are larger than (and may completely overlap at least in the X direction) the respective areas of the common electrodes CE1, CE2, and CE3. Therefore, for example, the display device 10 may have a low resistance, and the brightness of the display device 10 may be improved.

[0168] Reference Figure 8 , also refer to Figure 6 , the thickness W-AX11 of the first auxiliary electrode AX11 in the third direction Z may be or greater and It will be understood that a phrase referring to a measurement as "X or more and Y or less" may refer to a measurement having a range from X to Y.

[0169] like Figure 8As shown in , in an example where the side surface 161c of the first bank layer 161 is divided into a first portion 161c-1 in contact with the first common electrode CE1 and a second portion 161c-2 in contact with the first auxiliary electrode AX11, an area A-CE of the first portion 161c-1 in contact with the first common electrode CE1 of the side surface 161c of the first bank layer 161 may be smaller than an area A-AX11 of the second portion 161c-2 in contact with the first auxiliary electrode AX11 of the side surface 161c of the first bank layer 161. The term "area" described herein (e.g., with reference to the area A-CE and the area A-AX11, etc.) may refer to a thickness and a length in a cross-sectional view. For ease of description, Figure 7 and Figure 8 Only the first auxiliary electrode AX11 positioned in the first emission area is illustrated, and the first auxiliary electrodes AX12 and AX13 positioned in the second emission area EA2 and the third emission area EA3, respectively, may include the same structures and characteristics described with reference to the first auxiliary electrode AX11.

[0170] In some embodiments, the second auxiliary electrodes AX21 , AX22 , and AX23 may be positioned on the first auxiliary electrodes AX11 , AX12 , and AX13 , respectively.

[0171] Reference Figure 7 and Figure 8 , the second auxiliary electrode AX21 may be positioned to completely cover the first auxiliary electrode AX11 in the region overlapping with the first opening OP1. For example, in the region overlapping with the first opening OP1, the second auxiliary electrode AX21 may completely cover the first auxiliary electrode AX11, and further, according to the plan view, may also completely overlap with the first auxiliary electrode AX11. In addition, in the region overlapping with the second opening OP2, the second auxiliary electrode AX21 may be positioned along the side surface 161c of the first bank layer 161 to completely cover the first auxiliary electrode AX11. For example, the second auxiliary electrode AX21 may completely cover the first auxiliary electrode AX11 along the side surface 161c of the first bank layer 161.

[0172] As described herein, in the region overlapping with the second opening OP2, the first auxiliary electrode AX11 may not contact the first surface 163a of the second bank layer 163, and the first auxiliary electrode AX11 and the first surface 163a may be spaced apart from each other. Therefore, a portion cp of the side surface 161c of the first bank layer 161 may be exposed without being covered by the first auxiliary electrode AX11. Therefore, the partially exposed side surface 161c of the first bank layer 161 may be completely covered by the second auxiliary electrode AX21.

[0173] Reference Figure 8 , also refer to Figure 6 and Figure 7, the second auxiliary electrode AX21 positioned to overlap the second opening OP2 may extend along the side surface 161c of the first bank layer 161, and the second auxiliary electrode AX21 may be in contact with the first surface 163a of the second bank layer 163. Therefore, the second auxiliary electrode AX21 may include a cover surface AX21a of the second auxiliary electrode AX21 in contact with the first surface 163a of the second bank layer 163. For example, the thickness W-AX21 of the second auxiliary electrode AX21 may have or greater and or smaller value.

[0174] In some embodiments, the second auxiliary electrodes AX21, AX22, and AX23 may have high light transmittance and low moisture permeability, and may have good adhesion to the first encapsulation layer 171. Therefore, the second auxiliary electrodes AX21, AX22, and AX23 may completely cover the first auxiliary electrodes AX11, AX12, and AX13 and the common electrodes CE1, CE2, and CE3 so that moisture does not penetrate. Therefore, the second auxiliary electrodes AX21, AX22, and AX23 may help improve the reliability of the display device 10.

[0175] In some embodiments, the second auxiliary electrodes AX21, AX22, and AX23 may include a transparent conductive material. For example, the second auxiliary electrodes AX21, AX22, and AX23 may include indium zinc oxide (IZO). In example embodiments, the second auxiliary electrodes AX21, AX22, and AX23 may include 90 wt % of indium oxide and 10 wt % of zinc oxide, but the present disclosure is not limited thereto.

[0176] The second auxiliary electrodes AX21, AX22 and AX23 may be formed by a sputtering deposition process. More specifically, in the sputtering deposition process, the mean free path of the particles may be adjusted by adjusting the pressure, the thickness of the gas and the deposition material, etc. That is, the step coverage of the second auxiliary electrodes AX21, AX22 and AX23 may be adjusted to be higher than the step coverage of the first auxiliary electrodes AX11, AX12 and AX13. Therefore, the area of ​​the side surface 161c of the second auxiliary electrodes AX21, AX22 and AX23 covering the first bank layer 161 may be greater than the area of ​​the side surface 161c of the first auxiliary electrodes AX11, AX12 and AX13 covering the first bank layer 161.

[0177] like Figure 8As shown in , when the side surface 161c of the first bank layer 161 is divided into a second portion 161c-2 in contact with the first auxiliary electrode AX11 and a third portion 161c-3 in contact with the second auxiliary electrode AX21, an area A-AX21 of the third portion 161c-3 in contact with the second auxiliary electrode AX21 of the side surface 161c of the first bank layer 161 may be smaller than an area A-AX11 of the second portion 161c-2 in contact with the first auxiliary electrode AX11 of the side surface 161c of the first bank layer 161. The meaning of the above area can be represented by the thickness and length in the cross-sectional view. Specifically, the area of ​​the side surface 161c of the first bank layer 161 covered by the second auxiliary electrode AX21 may be larger than the area of ​​the side surface 161c of the first bank layer 161 covered by the first auxiliary electrode AX11, but the area A-AX21 in which the second auxiliary electrode AX21 contacts the side surface 161c of the first bank layer 161 may be smaller than the area A-AX11 in which the first auxiliary electrode AX11 contacts the side surface 161c of the first bank layer 161. Although for ease of description, Figure 7 and Figure 8 Only the second auxiliary electrode AX21 positioned in the first emission area is shown in FIG. 1 , but the second auxiliary electrodes AX22 and AX23 positioned in the second emission area EA2 and the third emission area EA3 , respectively, may also include the same structure and characteristics.

[0178] Fig. 9 yes Figure 7 An enlarged cross-sectional view of area "C".

[0179] Reference Figures 6 to 9 , the display device 10 may include organic patterns ELP1 to ELP3 , electrode patterns CEP1 to CEP3 , and capping patterns 159 - 1 to 159 - 3 .

[0180] The organic patterns ELP1 to ELP3, the electrode patterns CEP1 to CEP3, and the capping patterns 159-1 to 159-3 may be disposed on the embankment structure 160 and may surround the emission areas EA1 to EA3 or the first opening OP1. The stacked structure of the organic patterns ELP1 to ELP3, the electrode patterns CEP1 to CEP3, and the capping patterns 159-1 to 159-3 disposed around the emission areas EA1 to EA3 may be partially etched during the manufacturing process of the display device 10, and thus the pattern shape may vary. Therefore, portions of the upper surface of the second embankment layer 163 of the embankment structure 160 may not be covered by the organic patterns ELP1 to ELP3, the electrode patterns CEP1 to CEP3, and the capping patterns 159-1 to 159-3, and trenches TP may be formed in these portions by the above-mentioned patterns.

[0181] The organic patterns ELP1 to ELP3 may be disposed on the second bank layer 163 to partially overlap the second bank layer 163. The organic patterns ELP1 to ELP3 may include the same material as the light-emitting layers EL1 to EL3 of the light-emitting elements ED1 to ED3. The first organic pattern ELP1 may include the same material as the first light-emitting layer EL1 of the first light-emitting element ED1, the second organic pattern ELP2 may include the same material as the second light-emitting layer EL2 of the second light-emitting element ED2, and the third organic pattern ELP3 may include the same material as the third light-emitting layer EL3 of the third light-emitting element ED3. According to the description herein, it will be understood that the phrase "the pattern ... may include the same material as ..." may be equivalent to "the pattern ... may be formed of the same material as ...".

[0182] The organic patterns ELP1 to ELP3 may form traces by being separated from the light emitting layers EL1 to EL3 because the bank structure 160 includes a tip TIP. The light emitting layers EL1 to EL3 may be formed in the first and second openings OP1 and OP2, and the organic patterns ELP1 to ELP3 may be separated from the light emitting layers EL1 to EL3 by the tip TIP of the bank structure 160.

[0183] Reference Fig. 9 , also refer to Figure 6 The first organic pattern ELP1 may be positioned on the second bank 163 in a region overlapping the second opening OP2 and include a side surface ELP1c of the first organic pattern ELP1 covering a side surface 163c of the second bank 163. The second and third organic patterns ELP2 and ELP3 may also have the same structure as the first organic pattern ELP1.

[0184] A plurality of electrode patterns CEP1, CEP2, and CEP3 may be disposed on a plurality of organic patterns ELP, ELP, and ELP3, respectively. The electrode patterns CEP1, CEP2, and CEP3 may include a first electrode pattern CEP1, a second electrode pattern CEP2, and a third electrode pattern CEP3 of respective light emitting elements ED1, ED2, and ED3, and each of the electrode patterns CEP1, CEP2, and CEP3 includes the same material as that included in the common electrodes CE1, CE2, and CE3. For example, the first electrode pattern CEP1, the second electrode pattern CEP2, and the third electrode pattern CEP3 may be disposed directly on the first organic pattern ELP1, the second organic pattern ELP2, and the third organic pattern ELP3, respectively. The arrangement relationship of the electrode patterns CEP1, CEP2, and CEP3 and the organic patterns ELP1, ELP2, and ELP3 may be the same as the arrangement relationship of the light emitting layers EL1, EL2, and EL3 of the respective light emitting elements ED1, ED2, and ED3 and the common electrodes CE1, CE2, and CE3. Since the electrode dam structure 160 includes the tip TIP, the electrode patterns CEP1, CEP2, and CEP3 may be marks formed when the deposition material is disconnected without being connected to the common electrodes CE1, CE2, and CE3. Even in a deposition process without using a mask, in the display device 10, the common electrodes CE1, CE2, and CE3 may be separately formed in different regions by the tip TIP of the dam structure 160.

[0185] Reference Fig. 9 , also refer to Figure 6 , the first electrode pattern CEP1 may be positioned on the first organic pattern ELP1 in the region overlapping the second opening OP2. In the region overlapping the second opening OP2, the first electrode pattern CEP1 may include a side surface CEP1c of the first electrode pattern CEP1 covering a side surface ELP1c of the first organic pattern ELP1 and a lower surface CEP1a of the first electrode pattern CEP1 positioned toward the first bank layer 161. The second electrode pattern CEP2 and the third electrode pattern CEP3 may also have the same structure as the first electrode pattern CEP1.

[0186] A plurality of first auxiliary patterns AXP11, AXP12, and AXP13 may be disposed on a plurality of electrode patterns CEP1, CEP2, and CEP3, respectively. The first auxiliary patterns AXP11, AXP12, and AXP13 may include the same material as the first auxiliary electrodes AX11, AX12, and AX13. The arrangement relationship between the electrode patterns CEP1, CEP2, and CEP3 and the first auxiliary patterns AXP11, AXP12, and AXP13 is similar to the arrangement relationship between the common electrodes CE1, CE2, and CE3 and the first auxiliary electrodes AX11, AX12, and AX13. Since the embankment structure 160 includes a tip TIP, the first auxiliary electrodes AX11, AX12, and AX13 may be marks formed when the deposited material is disconnected and not connected to the first auxiliary electrodes AX11, AX12, and AX13. Even in a deposition process without using a mask, in the display device 10, the first auxiliary electrodes AX11, AX12, and AX13 may be formed separately in different regions by the tip TIP of the embankment structure 160.

[0187] Reference Fig. 9 , also refer to Figure 6 , the first auxiliary pattern AXP11 may be positioned to completely cover the first electrode pattern CEP1 in an area overlapping with the second opening OP2. The first auxiliary pattern AXP11 may include a side surface AXP11c of the first auxiliary pattern AXP11 covering the side surface CEP1c of the first electrode pattern CEP1 and a lower surface AXP11a of the first auxiliary pattern AXP11 covering the lower surface CEP1a of the first electrode pattern CEP1. As described herein, since the first auxiliary electrodes AX11, AX12, and AX13 have a high step coverage characteristic, the first auxiliary electrodes AX11, AX12, and AX13 may cover both the side surface CEP1c and the lower surface CEP1a of the electrode patterns CEP1, CEP2, and CEP3, respectively. Although the first auxiliary pattern AXP11 overlapping with the first emission area is described for ease of description, the first auxiliary patterns AXP12 and AXP13 positioned in the second emission area EA2 and the third emission area EA3, respectively, may also include the same structure and characteristics.

[0188] A plurality of second auxiliary patterns AXP21, AXP22, and AXP23 may be disposed on the plurality of first auxiliary patterns AXP11, AXP12, and AXP13, respectively. The second auxiliary patterns AXP21, AXP22, and AXP23 may include the same material as the second auxiliary electrodes AX21, AX22, and AX23. Since the embankment structure 160 includes a tip TIP, the second auxiliary patterns AXP21, AXP22, and AXP23 may be marks formed when the deposited material is disconnected and not connected to the second auxiliary patterns AXP21, AXP22, and AXP23. Even in a deposition process without using a mask, in the display device 10, the second auxiliary patterns AXP21, AXP22, and AXP23 may be formed separately in different regions by the tip TIP of the embankment structure 160.

[0189] Reference Fig. 9 , also refer to Figure 6 , the second auxiliary pattern AXP21 may be positioned to completely cover the first auxiliary pattern AXP11 in an area overlapping with the second opening OP2. The second auxiliary pattern AXP21 may include a side surface AXP21c of the second auxiliary pattern AXP21 covering the side surface AXP11c of the first auxiliary pattern AXP11 and a lower surface AXP21a of the second auxiliary pattern AXP21 covering the lower surface AXP11a of the first and second auxiliary patterns AXP11. As described herein, since the second auxiliary patterns AXP21, AXP22, and AXP23 have a step coverage characteristic higher than that of the first auxiliary patterns AXP11, AXP12, and AXP13, the lower surface AXP21a of the second auxiliary pattern AXP21 may cover the lower surface CEP1a of the first electrode pattern CEP1 facing the first bank layer 161, and extend to the lower surface CEP1a to cover a portion of the first surface 163a of the second bank layer 163.

[0190] In some embodiments, the lower surface AXP21a of the second auxiliary pattern AXP21 may be positioned to be spaced apart from the cover surface AX21a of the second auxiliary electrode AX21. The first surface 163a of the second bank layer 163 may contact the first inorganic layer 171-1 at a spacing portion ap (e.g., region or area) between the lower surface AXP21a of the second auxiliary pattern AXP21 and the cover surface AX21a of the second auxiliary electrode AX21.

[0191] Although the second auxiliary pattern AXP21 overlapping the first emission area is described for convenience of description, the second auxiliary patterns AXP22 and AXP23 positioned in the second emission area EA2 and the third emission area EA3 , respectively, may also include the same structure and characteristics.

[0192] In some embodiments, the capping patterns 159-1, 159-2, and 159-3 may be disposed on the second auxiliary patterns AXP21, AXP22, and AXP23, respectively. The capping patterns 159-1, 159-2, and 159-3 may include the same material as the capping layer 159 disposed on the second auxiliary electrodes AX21, AX22, and AX23. Each of the capping patterns 159-1, 159-2, and 159-3 may be disposed directly on the second auxiliary patterns AXP21, AXP22, and AXP23, respectively. Since the embankment structure 160 includes a tip TIP, the capping patterns 159-1, 159-2, and 159-3 may be marks formed by disconnecting the material forming the capping layer 159 through the tip TIP of the embankment structure without being connected to the capping layer 159. Referring to Figure 6 In the area overlapping the second opening OP2, the second auxiliary electrodes AX21, AX22 and AX23 and the second auxiliary patterns AXP21, AXP22 and AXP23 may be positioned at spacing portions (eg, regions or areas) between the capping layer 159 and the capping patterns 159-1, 159-2 and 159-3, respectively.

[0193] Reference Fig. 9 , also refer to Figure 6 In the region overlapping with the second opening OP2, the first capping pattern 159-1 may include a side surface 159-1c, and the side surface 159-1c of the first capping pattern 159-1 may cover the side surface AXP21c of the second auxiliary pattern AXP21. Fig. 9 In the example of FIG. 1 , the first capping pattern 159 - 1 does not cover the lower surface AXP21a of the second auxiliary pattern AXP21. The second capping pattern 159 - 2 and the third capping pattern 159 - 3 may include the same structure and features as the first capping pattern 159 - 1.

[0194] In some embodiments, reference Figure 6 , the first to third inorganic layers 171-1 to 171-3 may be formed on the embankment structure 160 and disposed to cover each emission area EA1 to EA3 or the light emitting elements ED1, ED2, and ED3 in the second opening OP2 of the embankment structure 160. The first to third inorganic layers 171-1 to 171-3 may prevent the light emitting elements ED1 to ED3 from being damaged by external air and may prevent a pattern disposed on the embankment structure 160 from being peeled off during a manufacturing process of the display device 10.

[0195] In some embodiments, the first inorganic layer 171-1, the second inorganic layer 171-2, and the third inorganic layer 171-3 may be formed by chemical vapor deposition so that the first inorganic layer 171-1, the second inorganic layer 171-2, and the third inorganic layer 171-3 may be formed with a uniform thickness along the step difference of the deposition layer. For example, the first inorganic layer 171-1, the second inorganic layer 171-2, and the third inorganic layer 171-3 may even form a thin film under the undercut caused by the tip TIP of the first bank layer 161 and the second bank layer 163.

[0196] In the display device 10, the first to third inorganic layers 171-1 to 171-3 may be provided on the same layer, but may be formed in different processes during the manufacturing process of the display device 10. For example, the light-emitting layers EL1 to EL3 in the first to third light-emitting elements ED1 to ED3 may be formed in different processes so that the light-emitting elements ED1 to ED3 are not formed at the same time. In an example embodiment, the first inorganic layer 171-1 may be formed after the first light-emitting element ED1 is formed, the second inorganic layer 171-2 may be formed after the second light-emitting element ED2 is formed, and the third inorganic layer 171-3 may be formed after the third light-emitting element ED3 is formed. That is, for example, the first inorganic layer 171-1 may be formed before the second and third light-emitting elements ED2 and ED3 are formed, and the second inorganic layer 171-2 may be formed before the third light-emitting element ED3 is formed.

[0197] In other words, the shape of the first inorganic layer 171-1 can be formed to completely cover the second emission area EA2 and the third emission area EA3 (for example, the first inorganic layer 171-1 can be formed so that the shape of the first inorganic layer 171-1 completely covers the second emission area EA2 and the third emission area EA3), and the first inorganic layer 171-1 can be partially or completely removed from the second emission area EA2 and the third emission area EA3 by a dry etching process. In addition, after forming the first inorganic layer 171-1, the second inorganic layer 171-2 can be formed so that the shape of the second inorganic layer 171-2 completely covers the first emission area EA1 and the third emission area EA3 (for example, the shape of the second inorganic layer 171-2 can be formed to completely cover the first emission area EA1 and the third emission area EA3), and the second inorganic layer 171-2 can be partially or completely removed from the second emission area EA2 and the third emission area EA3 by a dry etching process. In addition, after forming the first inorganic layer 171-1 and the second inorganic layer 171-2, the third inorganic layer 171-3 can be formed so that the shape of the third inorganic layer 171-3 completely covers the first emission area EA1 and the second emission area EA2 (for example, the shape of the third inorganic layer 171-3 can be formed to completely cover the first emission area EA1 and the second emission area EA2), and the third inorganic layer 171-3 can be partially or completely removed from the first emission area EA1 and the second emission area EA2 by a dry etching process.

[0198] In some embodiments, the second auxiliary electrodes AX21, AX22, and AX23 and the second auxiliary patterns AXP21, AXP22, and AXP23 may protect the embankment structure 160 during the dry etching process of removing the first inorganic layer 171-1, the second inorganic layer 171-2, and the third inorganic layer 171-3. As described herein, the second auxiliary electrodes AX21, AX22, and AX23 may include indium zinc oxide (IZO), and include 90wt% of indium oxide and 10wt% of zinc oxide. Therefore, the second auxiliary electrodes AX21, AX22, and AX23 may not be etched in the dry etching process, thereby covering and protecting the embankment structure 160.

[0199] Fig.10 yes Figure 6 An enlarged cross-sectional view of area "T".

[0200] Reference Fig.10, the first inorganic layer 171-1, the lower pattern covered by the first inorganic layer 171-1, the second inorganic layer 171-2, and the lower pattern covered by the second inorganic layer 171-2 formed by different processes may be arranged to be spaced apart from each other on the embankment structure 160. Therefore, for example, a portion of the second embankment layer 163 of the embankment structure 160 that does not overlap with the first inorganic layer 171-1 and the second inorganic layer 171-2 may be exposed. The exposed portion of the second embankment layer 163 may be in direct contact with the second encapsulation layer 173 of the thin film encapsulation layer 170.

[0201] The relationship between the first inorganic layer 171-1 and the second inorganic layer 171-2 as shown in the drawings is an example. According to one or more embodiments of the present disclosure, similar to the description provided with reference to the first inorganic layer 171-1, the third inorganic layer 171-3 may also be disposed to be spaced apart from the second inorganic layer 171-2.

[0202] The examples described in this disclosure should not be interpreted as being limited to the embodiments set forth herein. Instead, these embodiments are provided so that this disclosure will be detailed and complete, and will fully convey the concept of the utility model to those skilled in the art.

[0203] While the invention has been particularly shown and described with reference to embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined by the following claims.

Claims

1. A display device, characterized in that: The display device comprises: substrate; A first pixel electrode is disposed on the substrate; a pixel defining layer, disposed on the substrate and defining a first opening overlapping the first pixel electrode; a bank structure disposed on the pixel defining layer and defining a second opening overlapping the first opening; A first light emitting layer is disposed on the first pixel electrode and in the first opening; a first common electrode disposed on the first light emitting layer and contacting the bank structure in the second opening; a first auxiliary electrode, disposed on the first common electrode, the first auxiliary electrode completely covering the first common electrode in the second opening, and the first auxiliary electrode contacting the bank structure; a second auxiliary electrode disposed on the first auxiliary electrode, the second auxiliary electrode completely covering the first auxiliary electrode in the second opening, and the second auxiliary electrode contacting the bank structure; and a first encapsulation layer, disposed on the second auxiliary electrode and the bank structure, Wherein, the embankment structure comprises: A first bank layer disposed on the pixel defining layer and comprising a conductive material; and a second bank layer disposed on the first bank layer and including a tip protruding toward the first opening from a side surface of the first bank layer, wherein the second auxiliary electrode is in contact with the second bank layer, and Wherein, the first auxiliary electrode is spaced apart from the second bank layer.

2. The display device according to claim 1, characterized in that The side surface of the first bank layer includes: a first portion, in contact with the first common electrode; a second portion in contact with the first auxiliary electrode; and a third portion, in contact with the second auxiliary electrode, wherein the second portion is positioned between the first portion and the third portion, and The area of ​​the second portion of the side surface of the first bank layer contacting the first auxiliary electrode is greater than the area of ​​the first portion of the side surface of the first bank layer contacting the first common electrode.

3. The display device according to claim 2, characterized in that: The area of ​​the second portion of the side surface of the first bank layer in contact with the first auxiliary electrode is greater than the area of ​​the third portion of the side surface of the first bank layer in contact with the second auxiliary electrode.

4. The display device according to claim 1, characterized in that The display device further includes a capping layer, wherein the capping layer completely covers the second auxiliary electrode in the first opening. The capping layer exposes a portion of the second auxiliary electrode in the second opening.

5. The display device according to claim 4, characterized in that: An exposed portion of the second auxiliary electrode not covered by the capping layer in the second opening contacts the first encapsulation layer.

6. The display device according to claim 1, characterized in that: A thickness of the first auxiliary electrode in a direction perpendicular to the first direction is smaller than a thickness of the second auxiliary electrode in the direction perpendicular to the first direction.

7. The display device according to claim 1, characterized in that: The display device further includes: a first organic pattern disposed on the second bank layer of the bank structure and surrounding the first opening, wherein the first organic pattern and the first light emitting layer include the same material; and a first electrode pattern disposed on the first organic pattern and surrounding the first opening, wherein the first electrode pattern and the first common electrode include the same material, wherein the first organic pattern overlaps with the tip of the second bank layer and is spaced apart from the first light emitting layer, and The first electrode pattern overlaps with the tip of the second bank layer and is spaced apart from the first common electrode.

8. The display device according to claim 7, characterized in that: The display device further includes: a first auxiliary pattern disposed on the first electrode pattern and surrounding the first opening, wherein the first auxiliary pattern and the first auxiliary electrode include the same material; and a second auxiliary pattern disposed on the first auxiliary pattern and surrounding the first opening, wherein the second auxiliary pattern and the second auxiliary electrode include the same material, wherein the first auxiliary pattern overlaps with the tip of the second bank layer and is spaced apart from the first auxiliary electrode, and The second auxiliary pattern overlaps with the tip of the second bank layer and is spaced apart from the second auxiliary electrode.

9. The display device according to claim 8, characterized in that: The second bank layer further includes a first surface facing the first bank layer, wherein the second auxiliary electrode and the second auxiliary pattern are in contact with the first surface of the second bank layer, and The second auxiliary electrode contacting the first surface of the second bank layer and the second auxiliary pattern are spaced apart from each other.

10. A display device, characterized in that: The display device comprises: substrate; A first pixel electrode is disposed on the substrate; a pixel defining layer, disposed on the substrate and defining a first opening overlapping the first pixel electrode; a bank structure disposed on the pixel defining layer and defining a second opening overlapping the first opening; A first light emitting layer is disposed on the first pixel electrode and in the first opening; a first common electrode disposed on the first light emitting layer and contacting the bank structure in the second opening; a first auxiliary electrode, disposed on the first common electrode, the first auxiliary electrode completely covering the first common electrode in the second opening, and the first auxiliary electrode contacting the bank structure; a second auxiliary electrode disposed on the first auxiliary electrode, the second auxiliary electrode completely covering the first auxiliary electrode in the second opening, and the second auxiliary electrode contacting the bank structure; a first electrode pattern disposed on the embankment structure, wherein the first electrode pattern surrounds the first opening and is spaced apart from the first common electrode; a first auxiliary pattern completely covering the first electrode pattern, and the first auxiliary pattern being spaced apart from the first auxiliary electrode in a region overlapping the second opening; a second auxiliary pattern that completely covers the first auxiliary pattern and is spaced apart from the second auxiliary electrode in the region overlapping the second opening; and an encapsulation layer, completely covering the second auxiliary electrode and the second auxiliary pattern in the region overlapping the second opening, Wherein, the embankment structure comprises: A first bank layer is disposed on the pixel defining layer; and a second bank layer disposed on the first bank layer and including a tip protruding toward the first opening from a side surface of the first bank layer, Wherein, the second auxiliary pattern comprises: a first surface overlapping the second opening and covering the side surface of the second bank layer; and The second surface covers a surface of the second bank layer facing the first bank layer.

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