Power device characteristic test circuit

Abstract

The utility model relates to the technical field of power electronics, and discloses a power device characteristic test circuit, which comprises a capacitor bank, a first switching circuit, a second switching circuit, a third switching circuit and a power inductor, when a short-circuit current test, a switching time test and a reverse recovery time parameter test are carried out on a tested power device and an accompanying test power device under a large current, the on-off states of the first switching circuit, the second switching circuit and the third switching circuit are controlled; the first switch circuit or the second switch circuit is made to be stray inductance follow current generated by large current, and therefore power device characteristic testing under the large current is achieved. Accuracy of characteristic test data of the power device under large current can be improved, influence of internal resistance of a circuit relay is reduced, and authenticity of actual test voltage and current of the power device is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of power electronics, in particular to a power device characteristic testing circuit. Background Art

[0002] At present, the third-generation semiconductor material high-power devices on the market (such as GaN (gallium nitride), SiC (silicon carbide), etc.) have generally existed high-voltage and high-current high-power test conditions in their electrical performance tests. The short-circuit current capability of KV-level MOSFET or IGBT products is often higher than KA level. In addition, there are multiple test items in the dynamic parameter tester, such as switching time parameters, reverse recovery time parameters, gate charge parameters, short-circuit current parameters and other test items, and these test items are tested separately by switching relays. The relay contact on-resistance is about 20mΩ, which is obviously not suitable for KA-level short-circuit test. For example, during the 5000A short-circuit test, the voltage drop of the relay reaches 5000A×20mΩ=100V. Under the condition of high voltage drop, it is obviously impossible to accurately measure the actual waveform of the DUT, and the test data is also inaccurate, which seriously affects the accuracy of the test waveform and data; and under high power conditions, the life of the relay will be shortened, and the failure rate of the instrument will increase. In addition, in a highly integrated dynamic parameter tester, the space is relatively limited, and adding relays is not an effective solution. Utility Model Content

[0003] Therefore, the technical problem to be solved by the present invention is to overcome the problem in the prior art that the testing device cannot test the characteristics of the power device under a large current, thereby providing a power device characteristic testing circuit.

[0004] In order to achieve the above object, the utility model provides the following technical solutions:

[0005] The utility model provides a power device characteristic test circuit, comprising: a capacitor group, a first switch circuit, a second switch circuit, a third switch circuit and a power inductor, wherein the first switch circuit, a first end of which is connected to the first end of the capacitor group, the first end of the second switch circuit and the positive end of an external power supply, and a second end of which is connected to the first end of the third switch circuit and the first end of a power device to be tested; the second switch circuit, a second end of which is connected to the first end of the power inductor, the second end of the power device to be tested and the first end of a power device to be tested; the third switch circuit, a second end of which is connected to the second end of the power inductor, and a third end of which is connected to the second end of the capacitor group, the second end of the power device to be tested and the negative end of the external power supply; the control end of the power device to be tested and the control end of the power device to be tested are respectively connected to a first drive signal source and a second drive signal source; the capacitor group is used to limit the impact current in the circuit; when a short-circuit current test is performed on the power device to be tested, after the first switch circuit and the third switch circuit are turned off, The first switch circuit and the accompanying power device for test are for the stray inductance in the circuit to continue current, and the short-circuit current test is performed on the power device under test by adjusting the on-off state of the second switch circuit and the output state of the second drive signal source; when the switching time test is performed on the power device under test, after the second switch circuit is controlled to be turned off, the second switch circuit and the accompanying power device for test are for the stray inductance in the circuit to continue current, and the switching time test is performed on the power device under test by adjusting the on-off state of the first switch circuit and the third switch circuit and the output state of the second drive signal source; when the reverse recovery time parameter test is performed on the accompanying power device under test, after the second switch circuit is controlled to be turned off, the second switch circuit is for the stray inductance in the circuit to continue current, and the reverse recovery time parameter test is performed on the accompanying power device under test by adjusting the on-off state of the first switch circuit and the third switch circuit and the output state of the first drive signal source; the stray inductance is generated by the current when the power device under test and the accompanying power device under test are tested.

[0006] The power device characteristic test circuit provided by the utility model performs short-circuit current test, switch time test and reverse recovery time parameter test on the power device under test or the accompanying power device under test by switching the on-off state of the first switch circuit, the second switch circuit and the third switch circuit; when the on-off state of the switch circuit is switched under the action of a large current, the stray inductance in the circuit is continued to flow through the first switch circuit or the second switch circuit, and the capacitor group is used to limit the impact current in the circuit, so as to avoid the high-voltage impact of the stray inductance on the components in the circuit, reduce the damage of the components by the large current impact, improve the service life of the circuit, improve the authenticity of the actual test voltage and current of the power device under test, and improve the accuracy of the test result.

[0007] In an optional implementation, the capacitor group includes a plurality of non-inductive film capacitors connected in parallel.

[0008] The power device characteristic test circuit provided by the utility model has the advantages of small self-inductance, small equivalent series resistance, small loss and good frequency characteristics, and can withstand the impact of high voltage and high current, further improving the life of other components in the circuit, thereby improving the accuracy of the power device characteristic test results under high current.

[0009] In an optional embodiment, the second switch circuit includes: a switch module, a first end of which is connected to the first end of the first switch circuit, the first end of the capacitor group and the positive end of the external power supply, and a second end of which is connected to the first end of the power inductor, the second end of the accompanying power device and the first end of the power device under test; when a short-circuit current test is performed on the power device under test, the on-off state of the switch module and the output state of the second drive signal source are adjusted after the first switch circuit and the third switch circuit are controlled to be turned off, and the short-circuit current test is performed on the power device under test; when a switching time test is performed on the power device under test, the on-off state of the first switch circuit and the third switch circuit are adjusted after the switch module is controlled to be turned off, and the output state of the second drive signal source is adjusted to perform a switching time test on the power device under test; when a reverse recovery time parameter test is performed on the accompanying power device under test, the on-off state of the first switch circuit and the third switch circuit are adjusted after the switch module is controlled to be turned off, and the output state of the first drive signal source is adjusted to perform a reverse recovery time parameter test on the accompanying power device under test.

[0010] In an optional embodiment, the third switching circuit includes: a first single-pole single-throw relay and a second single-pole single-throw relay, wherein the first single-pole single-throw relay has a first end connected to the first end of the accompanying power device and the second end of the first switching circuit, and a second end connected to the first end of the second single-pole single-throw relay and the second end of the power inductor; the second single-pole single-throw relay has a second end connected to the second end of the power device under test, the second end of the capacitor group and the negative end of the external power supply; when a short-circuit current test is performed on the power device under test, the first single-pole single-throw relay and the second single-pole single-throw relay are controlled to be disconnected; when a switching time test is performed on the power device under test, the first single-pole single-throw relay is controlled to be closed and the second single-pole single-throw relay is controlled to be disconnected; when a reverse recovery time parameter test is performed on the accompanying power device under test, the first single-pole single-throw relay is controlled to be disconnected and the second single-pole single-throw relay is controlled to be closed.

[0011] In an optional embodiment, the power device characteristic test circuit also includes: a first operational amplifier circuit and a second operational amplifier circuit, wherein the first operational amplifier circuit has an input end connected to the first drive signal source, an output end connected to the control end of the power device under test, a first power supply end connected to the first drive power supply, and a second power supply end connected to the second drive power supply, and is used to amplify the first drive signal source; the second operational amplifier circuit has an input end connected to the second drive signal source, an output end connected to the control end of the power device under test, a first power supply end connected to the third drive power supply, and a second power supply end connected to the fourth drive power supply, and is used to amplify the second drive signal source; the first drive power supply and the second drive power supply are both connected to the first ground terminal; the third drive power supply and the fourth drive power supply are both connected to the second ground terminal.

[0012] The power device characteristic test circuit provided by the utility model can flexibly adjust the on and off voltages of the accompanying power device by adjusting the first driving power supply and the second driving power supply, and can flexibly adjust the on and off voltages of the tested power device by adjusting the third driving power supply and the fourth driving power supply.

[0013] In an optional embodiment, the power device characteristic test circuit also includes: a first adjustable gate drive resistor array and a second adjustable gate drive resistor array, wherein the first adjustable gate drive resistor array has a first end connected to the output end of the first operational amplifier circuit, and a second end connected to the control end of the accompanying power device, and is used to adjust the on-off speed of the accompanying power device; the second adjustable gate drive resistor array has a first end connected to the output end of the second operational amplifier circuit, and a second end connected to the control end of the power device under test, and is used to adjust the on-off speed of the power device under test.

[0014] The utility model provides a power device characteristic test circuit, in which the adjustable gate drive resistor array controls the on-off speed of the voltage conversion circuit by adjusting the current at the output end of the voltage conversion circuit, thereby ensuring the on-off speed of the voltage conversion circuit and improving the test efficiency without damaging the test device.

[0015] In an optional implementation, the first adjustable gate drive resistor array and the second adjustable gate drive resistor array both include: a first resistor array branch and a second resistor array branch connected in reverse parallel.

[0016] In an optional embodiment, the power device characteristic test circuit also includes: a third operational amplifier circuit, whose input end is connected to the third drive signal source, whose output end is connected to the third end of the second switch circuit, whose first power supply end is connected to the fifth drive power supply, and whose second power supply end is connected to the third ground end, and which is used to amplify the third drive signal source.

[0017] In an optional embodiment, the power device characteristic test circuit also includes: a supporting capacitor, a first end of which is connected to the second end of the first switching circuit, the first end of the third switching circuit and the first end of the power device under test, and a second end of which is connected to the third end of the third switching circuit, the second end of the capacitor group and the second end of the power device under test.

[0018] In an optional embodiment, the power device characteristic test circuit also includes: a power supply module, whose positive end is connected to the first end of the first switching circuit, the first end of the second switching circuit and the first end of the capacitor group, and whose negative end is connected to the second end of the capacitor group, the third end of the third switching circuit and the second end of the power device under test, and is used to provide power for the test circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the specific implementation methods of the utility model or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 A composition diagram of a specific example of a power device characteristic test circuit according to an embodiment of the utility model;

[0021] Figure 2 A composition diagram of a specific example of a capacitor bank according to an embodiment of the present utility model;

[0022] Figure 3 A structural diagram of a specific circuit of a power device characteristic test circuit according to an embodiment of the utility model;

[0023] Figure 4 A structural diagram of a specific circuit during short-circuit current testing of an embodiment of the utility model;

[0024] Figure 5 This is a normal timing diagram of the short-circuit current test of an embodiment of the utility model;

[0025] Figure 6 This is a timing diagram of a power device under test breaking down during a short-circuit current test of an embodiment of the utility model;

[0026] Figure 7 A structural diagram of a specific circuit for testing the switching time of an embodiment of the utility model;

[0027] Figure 8 This is a timing diagram of the switch time test of an embodiment of the utility model;

[0028] Fig. 9 A structural diagram of a specific circuit for reverse recovery time parameter testing of an embodiment of the utility model;

[0029] Fig.10 This is a timing diagram of the reverse recovery time parameter test of an embodiment of the present utility model. DETAILED DESCRIPTION

[0030] The technical solution of the utility model will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0031] In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.

[0032] In the description of the present utility model, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0033] In addition, the technical features involved in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0034] This embodiment provides a power device characteristic test circuit, such as Figure 1 As shown, it includes: a first switch circuit 1, a second switch circuit 2, a third switch circuit 3, a power inductor L and a capacitor group 4.

[0035] like Figure 1As shown, the first switch circuit 1 has a first end connected to the first end of the capacitor group 4, the first end of the second switch circuit 2 and the positive end of the external power supply, and a second end connected to the first end of the third switch circuit 3 and the first end of the accompanying power device HDUT; the second switch circuit 2 has a second end connected to the first end of the power inductor L, the second end of the accompanying power device HDUT and the first end of the power device DUT under test; the third switch circuit 3 has a second end connected to the second end of the power inductor L, and a third end connected to the second end of the capacitor group 4, the second end of the power device DUT under test and the negative end of the external power supply.

[0036] like Figure 1 As shown, the control end of the accompanying power device HDUT and the control end of the power device under test DUT are connected to the first driving signal source HVG and the second driving signal source VG respectively; the capacitor group 4 is used to limit the inrush current in the circuit.

[0037] Figure 1 In the present invention, when a short-circuit current test is performed on the power device DUT under test, after the first switch circuit 1 and the third switch circuit 3 are turned off, the first switch circuit 1 and the accompanying power device HDUT are continued to flow by the stray inductance in the circuit, and the short-circuit current test is performed on the power device DUT under test by adjusting the on-off state of the second switch circuit 2 and the output state of the second drive signal source VG.

[0038] Figure 1 When the switching time test is performed on the power device DUT under test, after the second switch circuit 2 is controlled to be turned off, the second switch circuit 2 and the accompanying power device HDUT are continued by the stray inductance in the circuit, and the switching time test is performed on the power device DUT under test by adjusting the on-off state of the first switch circuit 1 and the third switch circuit 3 and adjusting the output state of the second drive signal source VG.

[0039] Figure 1 In the reverse recovery time parameter test of the accompanying power device HDUT, after the second switch circuit 2 is turned off, the second switch circuit 2 is controlled to continue the current of the stray inductance in the circuit, and the reverse recovery time parameter test of the accompanying power device HDUT is performed by adjusting the on-off state of the first switch circuit 1 and the third switch circuit 3 and adjusting the output state of the first drive signal source HVG, wherein the stray inductance is generated by the current when the power device under test and the accompanying power device are tested. Specifically, refer to Figure 1, when the power device characteristic test circuit of this embodiment is used to perform power characteristic test on the power device under test and the accompanying power device under test under the action of a large current of KA level, if the third switch circuit is closed under the action of a large current, stray inductance will be generated in the circuit, and the stray inductance will produce a high-voltage impact on the components in the circuit, and the capacitor group 4 has the function of improving the overcurrent capability, and can reduce the stray inductance in the circuit; at the same time, the first switch circuit 1, the second switch circuit 2 and the accompanying power device under test HDUT all include a reverse-parallel freewheeling circuit, that is, when the first switch circuit 1, the second switch circuit 2 and the accompanying power device under test HDUT are turned off, the stray inductance in the circuit can still flow through the freewheeling circuits of the first switch circuit 1, the second switch circuit 2 and the accompanying power device under test HDUT and use the capacitor group 4 to limit the impact current in the circuit, so that the test result precision and accuracy of the test circuit are not affected by the large current. The power device characteristic test circuit provided by the utility model performs short-circuit current test, switch time test and reverse recovery time parameter test on the power device under test or the accompanying power device under test by switching the on-off state of the first switch circuit, the second switch circuit and the third switch circuit; when the on-off state of the switch circuit is switched under the action of a large current, the stray inductance in the circuit is continued to flow through the first switch circuit or the second switch circuit, and the capacitor group is used to limit the impact current in the circuit, so as to avoid the high-voltage impact of the stray inductance on the components in the circuit, reduce the damage of the components by the large current impact, improve the service life of the circuit, improve the authenticity of the actual test voltage and current of the power device under test, and improve the accuracy of the test result.

[0040] In an optional embodiment, if Figure 3 As shown, the capacitor group 4 includes a plurality of non-inductive film capacitors C connected in parallel.

[0041] For example, Figure 2 As shown, the capacitor group 4 includes a circuit board 41 and a plurality of non-inductive thin film capacitors C. The top layer of the circuit board is connected to the power supply POWER, and the bottom layer is connected to the ground GND. The circuit board 41 is parallelly paved with copper over a large area. The copper plating can increase the overcurrent capability while reducing the large current loop area and reducing the stray inductance. One end of each non-inductive thin film capacitor C is connected to the top layer of the circuit board 41, and the other end is connected to the bottom layer of the circuit board 41. The non-inductive thin film capacitor C has the advantages of small self-inductance, small equivalent series resistance, small loss, and good frequency characteristics, and can withstand the impact of high voltage and high current, further improving the life of other components in the circuit, thereby improving the accuracy of the power device characteristic test results under high current.

[0042] In an optional embodiment, if Figure 3As shown, the second switch circuit 2 includes: a switch module SS2, a first end of which is connected to the first end of the first switch circuit 1, the first end of the capacitor group 4 and the positive end of the external power supply HV_POWER, and a second end of which is connected to the first end of the power inductor L, the second end of the accompanying power device HDUT and the first end of the power device under test DUT.

[0043] Figure 3 When a short-circuit current test is performed on the power device DUT under test, the first switch circuit 1 and the third switch circuit 3 are controlled to be turned off, and then the on-off state of the switch module SS2 and the output state of the second drive signal source VG are adjusted to perform a short-circuit current test on the power device DUT under test.

[0044] Figure 3 When the switching time test is performed on the power device DUT under test, the switching module SS2 is controlled to be turned off, the on-off state of the first switch circuit 1 and the third switch circuit 3 is adjusted, and the output state of the second drive signal source VG is adjusted to perform the switching time test on the power device DUT under test.

[0045] Figure 3 When the reverse recovery time parameter test is performed on the accompanying power device HDUT, the on-off state of the first switch circuit 1 and the third switch circuit 3 is adjusted, and the output state of the first drive signal source HVG is adjusted to perform the reverse recovery time parameter test on the accompanying power device HDUT after the switch module SS2 is turned off.

[0046] For example, Figure 3 In the circuit, the switch module SS2 uses two high-power IGBT module devices connected in parallel. The advantage is that it can withstand large current impacts; the disadvantage is that the switching speed is slower than SiC, which is in the microsecond level; but the gate drive voltage VGE of the IGBT can be adjusted to make the IGBT work in an amplified state, thereby achieving the purpose of limiting large currents.

[0047] In an optional embodiment, if Figure 3 As shown, the third switch circuit 3 includes: a first single-pole single-throw relay K1 and a second single-pole single-throw relay K2, wherein the first single-pole single-throw relay K1 has a first end connected to the first end of the accompanying power device HDUT and the second end of the first switch circuit 1, and a second end connected to the first end of the second single-pole single-throw relay K2 and the second end of the power inductor L; the second single-pole single-throw relay K2 has a second end connected to the second end of the power device DUT under test, the second end of the capacitor group 4 and the negative end of the external power supply HV_POWER.

[0048] Specifically, Figure 3When the short-circuit current test is performed on the power device under test, the first single-pole single-throw relay K1 and the second single-pole single-throw relay K2 are controlled to be disconnected; when the switching time test is performed on the power device under test DUT, the first single-pole single-throw relay K1 is controlled to be closed and the second single-pole single-throw relay K2 is controlled to be disconnected; when the reverse recovery time parameter test is performed on the accompanying power device HDUT, the first single-pole single-throw relay K1 is controlled to be disconnected and the second single-pole single-throw relay K2 is controlled to be closed.

[0049] In an optional embodiment, if Figure 3 As shown, the power device characteristic test circuit also includes: a first operational amplifier circuit 5 and a second operational amplifier circuit 6, wherein the first operational amplifier circuit 5 has an input end connected to the first drive signal source VG, an output end connected to the control end of the accompanying power device HDUT, a first power supply end connected to the first drive power supply HVG+, and a second power supply end connected to the second drive power supply HVG-, and is used to amplify the first drive signal source VG; the second operational amplifier circuit 6 has an input end connected to the second drive signal source HVG, an output end connected to the control end of the power device under test, a first power supply end connected to the third drive power supply VG+, and a second power supply end connected to the fourth drive power supply VG-, and is used to amplify the second drive signal source HVG; the first drive power supply HVG+ and the second drive power supply HVG- are both connected to the first ground terminal HVG_GND; the third drive power supply VG+ and the fourth drive power supply VG- are both connected to the second ground terminal VG_GND.

[0050] like Figure 3 As shown, the power device characteristic test circuit also includes: a third operational amplifier circuit 9, whose input end is connected to the third drive signal source S2, whose output end is connected to the third end of the second switch circuit 2, whose first power supply end is connected to the fifth drive power supply HVCC, and whose second power supply end is connected to the third ground end HGND, which is used to amplify the third drive signal source S2.

[0051] like Figure 3 As shown, the power device characteristic test circuit also includes: a first adjustable gate drive resistor array 7 and a second adjustable gate drive resistor array 8, wherein the first adjustable gate drive resistor array 7, whose first end is connected to the output end of the first operational amplifier circuit 5, and whose second end is connected to the control end of the accompanying power device HDUT, is used to adjust the on-off speed of the accompanying power device HDUT; the second adjustable gate drive resistor array 8, whose first end is connected to the output end of the second operational amplifier circuit 6, and whose second end is connected to the control end of the power device DUT under test, is used to adjust the on-off speed of the power device DUT under test. Wherein, the first adjustable gate drive resistor array 7 and the second adjustable gate drive resistor array 8 both include a first resistor array branch (HR_P or R_P) and a second resistor array branch (HR_N or R_N) connected in reverse parallel.

[0052] like Figure 3 As shown, the power device characteristic test circuit also includes: a supporting capacitor C2, a first end of which is connected to the second end of the first switch circuit 1, the first end of the third switch circuit 3 and the first end of the accompanying power device HDUT, and a second end of which is connected to the third end of the third switch circuit 3, the second end of the capacitor group 4 and the second end of the power device DUT under test.

[0053] For example, Figure 3 In the present invention, when a short-circuit current test is performed on the power device DUT under test, the first single-pole single-throw relay K1 and the second single-pole single-throw relay K2 are controlled to release and the switch SS1 in the first switch circuit 1 and the accompanying power device HDUT under test are controlled to be in the cut-off state. At this time, only the corresponding body diodes of the switch SS1 and the accompanying power device HDUT participate in the work; when the test circuit works under a large current, the body diode of the switch SS1 and the body diode of the accompanying power device HDUT continue to flow for the stray current generated by the large current, thereby improving the high-voltage impact when the first single-pole single-throw relay K1 and the second single-pole single-throw relay K2 are turned off with a large current; by adjusting the on-off state of the switch module SS2 and the output state of the second drive signal source VG, a short-circuit current test is performed on the power device DUT under test, and the circuit is simplified to Figure 4 , the current flows through the external power supply HV_POWER, the switch module SS2, the current transformer I_Sense, the power inductor L, the power device under test DUT and the current sensor IDS in sequence.

[0054] For example, Figure 4 In the example, the three terminals VGS, VDS, and IDS of the current sensor IDS are connected to the oscilloscope measurement port (OSC) for testing related data and waveforms. In this embodiment, the connection method in the figure is only used as an example, but it is not limited to this. It can achieve the measurement of related data and waveforms. Under normal circumstances, that is, when the power device under test is not damaged, the timing diagram of the short-circuit current test is as follows: Figure 5 As shown; if during the short-circuit current test, the power device under test breaks down and conducts, the switch module SS2 will be triggered to work in the amplification state for current limiting protection. Figure 6 This is the timing diagram at this time.

[0055] For example, Figure 3In the present invention, when the switching time of the power device DUT under test is tested, the first single-pole single-throw relay K1 is controlled to be closed, the second single-pole single-throw relay K2 is released, and the switch module SS2 and the accompanying power device HDUT under test in the second switch circuit 2 are controlled to be in the cut-off state. At this time, only the corresponding body diodes of the switch module SS2 and the accompanying power device HDUT participate in the work. When the test circuit works under a large current, the body diode of the switch module SS2 and the body diode of the accompanying power device HDUT continue to flow for the stray current generated by the large current, thereby improving the high-voltage impact when the second single-pole single-throw relay K2 is closed under a large current; by adjusting the on-off state of the switch SS1 and the output state of the second drive signal source VG, the switching time of the power device DUT under test is tested, and the circuit is simplified to Figure 7 , the current flows through the external power supply HV_POWER, the current transformer I_Sense, the power inductor L, the power device under test DUT and the current sensor IDS in sequence.

[0056] Figure 8 This is the timing diagram of the switching time test. In state II, the second drive signal source VG controls the power device DUT under test to be turned on. When the I_Sense current sensor detects that the IDS current reaches the set value Iset through the detection circuit of the subsequent stage, the second drive signal source VG controls the power device DUT under test to be turned off and reaches state III. The body diode of the accompanying power device HDUT acts as a freewheeling diode of the power inductor L. In state IV, the second drive signal source VG controls the DUT to enter the on state again. The waveforms of VGS, VDS and IDS are sampled by the oscilloscope and processed by the host computer to output the test results of the switching time parameters, such as TDON, TR, TDOFF, TF, EON, EOFF, etc., which will not be repeated here.

[0057] For example, Figure 3 In the embodiment, when the reverse recovery time parameter test is performed on the accompanying power device HDUT, the first single-pole single-throw relay K1 is controlled to be released, the second single-pole single-throw relay K2 is controlled to be closed, and the switch module SS2 in the second switch circuit 2 and the power device DUT under test are controlled to be in the cut-off state. At this time, only the corresponding body diodes of the switch module SS2 and the power device DUT under test participate in the work; when the test circuit works under a large current, the body diode of the switch module SS2 and the body diode of the power device DUT under test continue the flow of the stray current generated by the large current, thereby improving the high-voltage impact when the first single-pole single-throw relay K1 is turned off at a large current; by adjusting the on-off state of the switch SS1 and the output state of the second drive signal source VG, the reverse recovery time parameter test is performed on the accompanying power device HDUT under test, and the circuit is simplified to Fig. 9The current flows through the supporting capacitor C2, the accompanying power device HDUT, the power inductor L and the current transformer I_Sense in sequence, and then changes direction, and flows through the current sensor IDS, the power device DUT, the power inductor L and the current transformer I_Sense in sequence.

[0058] Fig.10 This is the timing diagram of the reverse recovery time parameter test. When the I_Sense current sensor detects that the current value reaches the set value IMax through the detection circuit of the subsequent stage, the first drive signal source HVG controls the accompanying power device HDUT to turn off and reach state III. The body diode of the power device DUT under test acts as a freewheeling diode of the power inductor L. The purpose of the reverse recovery time parameter test is to test the reverse recovery time parameters of the body diode of the power device DUT under test. In state IV, the first drive signal source HVG controls the accompanying power device HDUT to turn on again. The waveforms of VGS, VDS and IDS are sampled by the oscilloscope and processed by the host computer to output the test results of the switching time parameters, such as TDON, TR, TDOFF, TF, EON, EOFF, etc., which will not be repeated here.

[0059] Although the embodiments of the present invention are described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A power device characteristic test circuit, characterized in that: include: A capacitor group, a first switch circuit, a second switch circuit, a third switch circuit and a power inductor, wherein: A first switch circuit, wherein a first end of the first switch circuit is connected to a first end of the capacitor bank, a first end of the second switch circuit and a positive end of an external power supply, and a second end of the first switch circuit is connected to a first end of the third switch circuit and a first end of a test companion power device; A second switch circuit, a second end of which is connected to the first end of the power inductor, the second end of the accompanying power device and the first end of the power device under test; A third switch circuit, a second end of which is connected to the second end of the power inductor, and a third end of which is connected to the second end of the capacitor bank, the second end of the power device under test, and the negative end of the external power supply; The control end of the accompanying power device and the control end of the power device under test are connected to the first driving signal source and the second driving signal source respectively; The capacitor bank is used to limit the inrush current in the circuit; When a short-circuit current test is performed on the power device under test, after the first switch circuit and the third switch circuit are turned off, the first switch circuit and the accompanying power device are freewheeling for the stray inductance in the circuit, and the short-circuit current test is performed on the power device under test by adjusting the on-off state of the second switch circuit and the output state of the second drive signal source; When the switching time test is performed on the power device under test, after the second switch circuit is controlled to be turned off, the second switch circuit and the accompanying power device are freewheeling for the stray inductance in the circuit, and the switching time test is performed on the power device under test by adjusting the on-off state of the first switch circuit and the third switch circuit and adjusting the output state of the second drive signal source; When the reverse recovery time parameter test is performed on the accompanying power device, after the second switch circuit is turned off by controlling the second switch circuit, the second switch circuit is the stray inductance in the circuit for freewheeling, and the reverse recovery time parameter test is performed on the accompanying power device by adjusting the on-off state of the first switch circuit and the third switch circuit and adjusting the output state of the first drive signal source; The stray inductance is generated by the current when the power device under test and the accompanying power device under test are tested.

2. The test circuit according to claim 1, characterized in that: The capacitor group includes a plurality of non-inductive film capacitors connected in parallel.

3. The test circuit according to claim 1, characterized in that: The second switch circuit comprises: A switch module, wherein a first end of the switch module is connected to a first end of the first switch circuit, a first end of the capacitor bank and a positive end of an external power supply, and a second end of the switch module is connected to a first end of the power inductor, a second end of the accompanying power device and a first end of the power device under test; When a short-circuit current test is performed on the power device under test, the on-off state of the switch module and the output state of the second drive signal source are adjusted after the first switch circuit and the third switch circuit are controlled to be turned off, so as to perform a short-circuit current test on the power device under test; When a switching time test is performed on the power device under test, the switching time test is performed on the power device under test by controlling the switch module to be turned off, adjusting the on / off state of the first switch circuit and the third switch circuit, and adjusting the output state of the second drive signal source; When the reverse recovery time parameter test is performed on the accompanying power device, the reverse recovery time parameter test is performed on the accompanying power device by controlling the switch module to turn off, adjusting the on-off state of the first switch circuit and the third switch circuit, and adjusting the output state of the first drive signal source.

4. The test circuit according to claim 1, characterized in that: The third switch circuit includes: a first single-pole single-throw relay and a second single-pole single-throw relay, wherein: A first single-pole single-throw relay, a first end of which is connected to the first end of the accompanying power device and the second end of the first switch circuit, and a second end of which is connected to the first end of the second single-pole single-throw relay and the second end of the power inductor; A second single-pole single-throw relay, a second end of which is connected to the second end of the power device under test, the second end of the capacitor group and the negative end of the external power supply; When a short-circuit current test is performed on the power device under test, the first single-pole single-throw relay and the second single-pole single-throw relay are controlled to be disconnected; When the switching time test is performed on the power device under test, the first single-pole single-throw relay is controlled to be closed and the second single-pole single-throw relay is controlled to be opened; When the reverse recovery time parameter test is performed on the accompanying power device, the first single-pole single-throw relay is controlled to be disconnected and the second single-pole single-throw relay is controlled to be closed.

5. The test circuit according to claim 1, characterized in that: Also includes: A first operational amplifier circuit and a second operational amplifier circuit, wherein: A first operational amplifier circuit, whose input end is connected to the first driving signal source, whose output end is connected to the control end of the accompanying power device, whose first power supply end is connected to the first driving power supply, and whose second power supply end is connected to the second driving power supply, and is used to amplify the first driving signal source; A second operational amplifier circuit, whose input terminal is connected to the second driving signal source, whose output terminal is connected to the control terminal of the power device under test, whose first power supply terminal is connected to the third driving power supply, and whose second power supply terminal is connected to the fourth driving power supply, and is used to amplify the second driving signal source; The first driving power source and the second driving power source are both connected to a first ground terminal; The third driving power source and the fourth driving power source are both connected to the second ground terminal.

6. The test circuit according to claim 5, characterized in that: Also includes: A first adjustable gate drive resistor array and a second adjustable gate drive resistor array, wherein: A first adjustable gate drive resistor array, a first end of which is connected to the output end of the first operational amplifier circuit, and a second end of which is connected to the control end of the accompanying test power device, and is used to adjust the on-off speed of the accompanying test power device; A second adjustable gate drive resistor array has a first end connected to the output end of the second operational amplifier circuit and a second end connected to the control end of the power device under test, and is used to adjust the on-off speed of the power device under test.

7. The test circuit according to claim 6, characterized in that: The first adjustable gate drive resistor array and the second adjustable gate drive resistor array both include: The first resistor array branch and the second resistor array branch are connected in reverse parallel.

8. The test circuit according to claim 1, characterized in that: Also includes: The third operational amplifier circuit has its input end connected to the third driving signal source, its output end connected to the third end of the second switching circuit, its first power supply end connected to the fifth driving power supply, and its second power supply end connected to the third ground end, and is used to amplify the third driving signal source.

9. The test circuit according to claim 1, characterized in that: Also includes: A supporting capacitor, wherein a first end of the supporting capacitor is connected to the second end of the first switching circuit, the first end of the third switching circuit and the first end of the accompanying power device, and a second end of the supporting capacitor is connected to the third end of the third switching circuit, the second end of the capacitor group and the second end of the power device under test.

10. The test circuit according to claim 1, characterized in that: Also includes: A power supply module, whose positive end is connected to the first end of the first switch circuit, the first end of the second switch circuit and the first end of the capacitor group, and whose negative end is connected to the second end of the capacitor group, the third end of the third switch circuit and the second end of the power device under test, and is used to provide power for the test circuit.

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