Power semiconductor device dynamic test circuit with adjustable absorption capacitance
By using relay switches in a dynamic test system to combine capacitors of different capacitance sizes in series and parallel, the absorption capacitance value is adjusted, which solves the inaccurate test data and system damage caused by fixed capacitance values, and improves the test accuracy and system Security.
Patent Information
- Application Number
- CN202411702897.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-26
- Publication Date
- 2025-02-21
AI Technical Summary
The capacitance value of the absorber in the existing dynamic testing system is fixed and cannot be adjusted according to the requirements, resulting in inaccurate test data and system damage.
By combining relay switches with capacitors of different capacitances in series and parallel, the absorber capacitance value can be adjusted to meet different test needs.
The adjustable range of the absorber capacitor is expanded, the impact of impurity on the test results is reduced, and the test accuracy and system safety are improved.
Smart Images
Figure CN119492969A_ABST
Abstract
Description
Technical Field
[0001] The invention relates to the technical field of power semiconductor device testing, and in particular to a power semiconductor device dynamic testing circuit with adjustable absorption capacitance. Background Art
[0002] In order to understand the various switching characteristic parameters of power semiconductor devices in detail, it is necessary to perform dynamic tests such as double pulse, short circuit and reverse recovery. Among them, the absorption capacitor is used in the dynamic test system to absorb the peak voltage, thereby protecting other components from damage. Due to different power device specifications and test conditions, the required absorption capacitor is also different. The absorption capacitor value of the general dynamic test system is fixed and cannot be adjusted according to demand, which may cause inaccurate test data and damage to the system.
[0003] In the prior art, different numbers of capacitors with the same capacitance value are usually connected in parallel to achieve capacitance adjustment. The capacitance value of the absorption capacitor is adjusted to change the load condition to simulate the power factor, current waveform, etc. of different working conditions. However, this solution has a small capacitance adjustment range and introduces large noise, which affects the test results. Summary of the invention
[0004] In order to increase the adjustable range of the absorption capacitor value and reduce the influence of stray inductance on the test results, this scheme proposes a dynamic test circuit with adjustable absorption capacitor value. By combining capacitors of different capacitance sizes in series and parallel through relay switches, a wider capacitance value range can be obtained to meet different test requirements. Compared with using large-capacity capacitors or small-capacity capacitors alone, series connection can reduce the equivalent series inductance and equivalent series resistance of the overall circuit, reduce stray parameters, and improve test accuracy.
[0005] According to a first aspect of the present invention, there is provided a dynamic test circuit for a power semiconductor device with an adjustable absorption capacitor, comprising a DC power supply, a bus support capacitor, an adjustable capacitor group and a device under test, wherein the DC power supply is connected in parallel with the bus support capacitor, and the DC power supply is used to provide a DC voltage to the system to drive the device under test to work; the bus support capacitor is used to filter and stabilize the DC power supply; the adjustable capacitor group is respectively connected in parallel with the bus support capacitor and the device under test, and is used to absorb the peak voltage generated during the switching process of the device under test, and the adjustable capacitor group comprises a plurality of capacitors and relays in series-parallel combination, and the relay is externally connected to a control system, and the control system is used to adjust the capacitance value of the adjustable capacitor group by controlling the opening and closing of the relay.
[0006] Optionally, in the dynamic test circuit of a power semiconductor device with adjustable absorption capacitance provided by the present invention, the adjustable capacitor group includes a plurality of large-capacity capacitors and a plurality of small-capacity capacitors, each large-capacity capacitor is connected in series with a relay, and each small-capacity capacitor is connected in parallel with a relay, the capacitance of the large-capacity capacitor is not less than 10 μF, and the capacitance value of the small-capacity capacitor is not greater than 1 μF.
[0007] Optionally, in the power semiconductor device dynamic test circuit with adjustable absorption capacitance provided by the present invention, the control system is used to control the absorption capacitance of the adjustable capacitor group required by the device under test by controlling the switch combination of the relay.
[0008] Optionally, in the power semiconductor device dynamic test circuit with adjustable absorption capacitance provided by the present invention, the total capacity of the adjustable capacitor group is determined according to the rated voltage, current and frequency characteristics of the device under test.
[0009] Optionally, in the dynamic test circuit of a power semiconductor device with adjustable absorption capacitance provided by the present invention, when the absorption capacitance required by the device under test is greater than a first preset capacitance value, the relay connected in series with the large-capacity capacitor is controlled to be turned on so that the capacitance value of multiple large-capacity capacitors connected in parallel is greater than the first preset capacitance value.
[0010] Optionally, in the dynamic test circuit of a power semiconductor device with adjustable absorption capacitance provided by the present invention, when the absorption capacitance required by the device under test is less than a second preset capacitance value, the relay connected in parallel with the small-capacity capacitor is controlled to be turned on so that the capacitance value of the large-capacity capacitor and the small-capacity capacitor connected in series is less than the second preset capacitance value.
[0011] Optionally, in the power semiconductor device dynamic test circuit with adjustable absorption capacitance provided by the present invention, the relay is a solid-state relay.
[0012] Optionally, in the dynamic test circuit of a power semiconductor device with adjustable absorption capacitance provided by the present invention, the dynamic test system further comprises an inductor, which is connected in parallel with the device under test and is used to simulate an actual load of the circuit.
[0013] Optionally, in the dynamic test circuit for power semiconductor devices with adjustable absorption capacitance provided by the present invention, the device under test is any one of IGBT, MOSFET, SiC MOSFET, and GaN MOSFET.
[0014] Optionally, in the power semiconductor device dynamic test circuit with adjustable absorption capacitance provided by the present invention, a shielding cover or a shielding surround coil is provided outside the adjustable capacitance group.
[0015] The power semiconductor device dynamic test circuit with adjustable absorption capacitance provided by the present invention can obtain a wider range of capacitance values and meet different test requirements by combining capacitors of different capacitance sizes in series and parallel through a relay switch. Compared with using large-capacity capacitors or small-capacity capacitors alone, the series connection can reduce the equivalent series inductance and equivalent series resistance of the overall circuit, reduce stray parameters, and improve test accuracy.
[0016] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 A schematic diagram of the structure of a dynamic test circuit for a power semiconductor device is shown; Figure 2 A schematic structural diagram of a dynamic test circuit for a power semiconductor device with adjustable absorption capacitance according to an embodiment of the present invention is shown. DETAILED DESCRIPTION
[0018] For different types of power semiconductor devices, such as MOSFET, IGBT, SiC MOSFET, etc., it is necessary to conduct electrical parameter (maximum withstand voltage, turn-on voltage, turn-off voltage, on-resistance, etc.) testing, temperature characteristics testing, dynamic characteristics (switching speed, switching loss, reverse recovery time) testing, reliability testing, etc.
[0019] Among them, the dynamic test system of power semiconductor devices is usually composed of a DC power supply, busbar support capacitors, absorption capacitors, drive circuits, semiconductor devices under test, load inductors, a pulse generator for providing control signals, and an oscilloscope for measuring voltage and current waveforms. Figure 1 The schematic diagram of the structure of the dynamic test circuit of the power semiconductor device is shown in FIG. Figure 1 As shown, the dynamic test circuit includes a DC power supply U dc , busbar support capacitor C dc , absorption capacitor C s , the power device MOSFET under test, and the inductor L. During the dynamic test, since the switching process of the device under test may generate spike voltage or spike current, the absorption capacitor can absorb the charge and protect other components from damage. Therefore, the impact of spike signals on the system can be effectively reduced by reasonably selecting and configuring the absorption capacitor.
[0020] This solution changes the total capacitance value of the absorption capacitor by selecting a suitable capacitor layout and connection method through a relay switch combination, which can improve the accuracy of the test results and the safety of the test system.
[0021] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
[0022] Figure 2 FIG. 2 shows a schematic diagram of a dynamic test circuit for a power semiconductor device with adjustable absorption capacitance according to an embodiment of the present invention. Figure 2 As shown, the test circuit includes a DC power supply U dc , busbar support capacitor C dc , adjustable capacitor group, device under test S, inductor L. The DC power supply is connected in parallel with the bus support capacitor. The DC power supply is used to provide DC voltage to the system to drive the device under test to work; the bus support capacitor is used to filter and stabilize the DC power supply. The inductor L is connected in parallel with the device under test to simulate the actual load of the circuit. The adjustable capacitor group is connected in parallel with the bus support capacitor and the device under test respectively to absorb the peak voltage generated during the switching process of the device under test. The adjustable capacitor group includes multiple capacitors and relays in series and parallel combinations. Figure 2 As shown, C1 is a large-capacity capacitor, C2 is a small-capacity capacitor, and the relay is connected in series with C1 and in parallel with C2.
[0023] Relays K1...Kn are externally connected to a control system, and the control system is used to adjust the capacitance value of the adjustable capacitor group by controlling the opening and closing of relays K1...Kn. That is, the absorption capacitance capacity required by the adjustable capacitor group for the device under test is controlled by controlling the switch combination of the relays.
[0024] Among them, the adjustable capacitor group includes several large-capacity capacitors and several small-capacity capacitors, each large-capacity capacitor is connected in series with the relay, and each small-capacity capacitor is connected in parallel with the relay. The capacitance of the large-capacity capacitor is not less than 10μF, and the capacitance value of the small-capacity capacitor is not greater than 1μF.
[0025] The capacity of the absorption capacitor can be determined according to the rated voltage, current, frequency characteristics, etc. of the device under test. Then, according to the capacitance and quantity of the adjustable capacitor group, the relay connected in series with the corresponding large-capacity capacitor is controlled to conduct, ensuring that the capacitance after parallel connection meets the actual application requirements. Finally, actual testing and debugging are performed to verify whether the capacity of the absorption capacitor meets the requirements of the device under test, and adjustments and optimizations are made according to the actual results.
[0026] Large-capacity capacitors have a high charge storage capacity, and connecting multiple large-capacity capacitors in parallel can further increase the capacitance of the absorption capacitor. When the absorption capacitance required by the device under test is greater than the first preset capacitance value (the first preset capacitance value is greater than 10μF), the relay connected in series with the large-capacity capacitor is controlled to be turned on, so that the capacitance value of multiple large-capacity capacitors connected in parallel is greater than the first preset capacitance value. Therefore, by increasing the capacity of the large-capacity capacitor and the number of parallel connections, the adjustable range of the absorption capacitor can be moved toward the large-capacity direction.
[0027] When the absorption capacitance required by the device under test is less than the second preset capacitance value, for example, 1 μF, the relay is controlled to conduct so that the large capacitance capacitor is connected in series with the small capacitance capacitor. The capacitance value of the large capacitance capacitor and the small capacitance capacitor after the series connection is less than the second preset capacitance value.
[0028] Therefore, by controlling the conduction of the relay connected in parallel with the small-capacity capacitor, the capacitance value provided by the capacitor branch connected in series with the relay can be reduced, thereby moving the adjustable range of the absorption capacitor toward the smaller capacity.
[0029] Furthermore, connecting a large-capacity capacitor and a small-capacity capacitor in series can reduce the influence of stray inductance. Since a small-capacity capacitor usually has a small volume, its internal stray inductance is relatively small. By connecting it in series with a large-capacity capacitor, the overall stray inductance level can be reduced.
[0030] When selecting large-capacity capacitors and small-capacity capacitors in series, it is necessary to consider their rated voltage, operating frequency, equivalent series resistance and other parameters to ensure that they can achieve a high degree of parameter matching during actual testing, including voltage rating matching, frequency characteristic matching, etc. Large-capacity capacitors usually have higher voltage ratings, while small-capacity capacitors have relatively lower voltage ratings, so it is necessary to ensure that the voltage rating of the series capacitors can meet the voltage requirements of the entire circuit.
[0031] In one embodiment of the present invention, the relay adopts a solid state relay (SSR) to reduce signal delay or error caused by a mechanical switch.
[0032] In order to further reduce the stray inductance, a shielding cover or a shielded surrounding coil can be set outside the adjustable capacitor group. This shielding structure can effectively isolate the interaction between the internal coil of the absorption capacitor and the external electromagnetic field, and reduce the stray inductance signal introduced by external interference.
[0033] According to the dynamic test circuit of power semiconductor devices with adjustable absorption capacitance provided by the present invention, capacitors of different capacitance sizes are connected in series and parallel by means of relay switches to obtain a wider range of capacitance values and meet different test requirements. Compared with using large-capacity capacitors or small-capacity capacitors alone, the series connection can reduce the equivalent series inductance and equivalent series resistance of the overall circuit, reduce stray parameters, and improve test accuracy.
[0034] In the description provided herein, a large number of specific details are described. However, it is understood that embodiments of the present invention can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.
[0035] Although the present invention has been described according to a limited number of embodiments, it will be apparent to those skilled in the art, with the benefit of the above description, that other embodiments may be envisioned within the scope of the invention thus described. In addition, it should be noted that the language used in this specification is selected primarily for readability and teaching purposes, rather than for explaining or defining the subject matter of the present invention. Therefore, many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the appended claims. The disclosure of the present invention is illustrative and not restrictive with respect to the scope of the present invention, and the scope of the present invention is defined by the appended claims.
Claims
1. A dynamic test circuit for a power semiconductor device with adjustable absorption capacitance, characterized in that: include: A direct current power supply, a busbar support capacitor, an adjustable capacitor group and a device under test, wherein the direct current power supply is connected in parallel with the busbar support capacitor, and the direct current power supply is used to provide a direct current voltage to the system to drive the device under test to work; the busbar support capacitor is used to filter and stabilize the direct current power supply; the adjustable capacitor group is respectively connected in parallel with the busbar support capacitor and the device under test, and is used to absorb the peak voltage generated during the switching process of the device under test, and the adjustable capacitor group includes a plurality of capacitors and relays in series-parallel combination, and the relay is externally connected to a control system, and the control system is used to adjust the capacitance value of the adjustable capacitor group by controlling the opening and closing of the relay.
2. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 1, characterized in that: The adjustable capacitor group includes a plurality of large-capacity capacitors and a plurality of small-capacity capacitors, each large-capacity capacitor is connected in series with a relay, and each small-capacity capacitor is connected in parallel with a relay. The capacitance of the large-capacity capacitor is not less than 10 μF, and the capacitance value of the small-capacity capacitor is not greater than 1 μF.
3. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 2 is characterized in that: The control system is used to control the absorption capacitance of the adjustable capacitor group required by the device under test by controlling the switch combination of the relay.
4. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 3 is characterized in that: The total capacity of the adjustable capacitor group is determined according to the rated voltage, current and frequency characteristics of the device under test.
5. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 4, characterized in that: When the absorption capacitance required by the device under test is greater than the first preset capacitance value, the relay connected in series with the large-capacity capacitor is controlled to be turned on, so that the capacitance value of the plurality of large-capacity capacitors connected in parallel is greater than the first preset capacitance value.
6. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 4, characterized in that: When the absorption capacitance required by the device under test is less than the second preset capacitance value, the relay connected in parallel with the small capacitance capacitor is controlled to be turned on, so that the capacitance value of the large capacitance capacitor and the small capacitance capacitor connected in series is less than the second preset capacitance value.
7. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 1, characterized in that: The relay is a solid state relay.
8. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 1, characterized in that: The dynamic test system further comprises an inductor, which is connected in parallel with the device under test and is used to simulate an actual load of a circuit.
9. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 1, characterized in that: The device under test is any one of IGBT, MOSFET, SiC MOSFET, and GaN MOSFET.
10. The power semiconductor device dynamic test circuit with adjustable absorption capacitance according to claim 1, characterized in that: A shielding cover or a shielding surrounding coil is arranged outside the adjustable capacitor group.