Super capacitor tester

Abstract

The utility model relates to the technical field of energy storage element testing, and discloses a super capacitor tester which comprises a test port used for being connected with a capacitor to be tested, the test port is connected with an adjustable electronic direct current source used for carrying out constant-current charging on the capacitor to be tested and an adjustable electronic load used for carrying out constant-current discharging on the capacitor to be tested, the adjustable electronic direct current source and the adjustable electronic load are both connected with a first communication module used for information interaction with an upper computer, the test port is connected with a voltage acquisition module and a current acquisition module, the voltage acquisition module is connected with a data processing module, the data processing module is electrically connected with the current acquisition module, and the current acquisition module is electrically connected with the adjustable electronic direct current source. The data processing module is connected with a second communication module used for information interaction with an upper computer. The super capacitor testing device is suitable for testing super capacitors of different models, impedance to signals is effectively increased, and measuring precision is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of energy storage element testing, in particular to a super capacitor tester. Background Art

[0002] Supercapacitors have super power storage capacity and can provide a physical secondary power source with powerful pulse power. They are characterized by high reliability, good ultra-low temperature characteristics, and environmental protection and no pollution. They are a new type of energy storage system and an effective way to solve the problem of insufficient charging power of existing supercapacitors. At the same time, they have also been widely used in various industries such as new energy vehicles, electricity, elevators, coal mines, and construction machinery.

[0003] The most important test item in the general safety test of supercapacitors is electrical testing, which collects the voltage and current parameters of the supercapacitor during the charge and discharge cycle test.

[0004] The testing of supercapacitors is different from that of batteries. Supercapacitors are generally used in groups of several capacitors of the same specifications, and their operating voltage span is also quite large.

[0005] Existing supercapacitor testing equipment is composed of a specific DC source, an electronic load and a timer. The DC source and the electronic load cannot adjust the input and output parameters such as voltage and current, so they can only test specified supercapacitors. They cannot adjust the parameters according to the different models of supercapacitors to be tested. They are not suitable for testing different models of supercapacitors, and the test accuracy is not high. Utility Model Content

[0006] The utility model aims to provide a supercapacitor tester which is suitable for testing supercapacitors of different models and effectively increases the impedance to the signal and improves the measurement accuracy.

[0007] The utility model is achieved in this way:

[0008] A supercapacitor tester, comprising a test port for connecting a capacitor to be tested, the test port being connected to an adjustable electronic DC source for constant current charging of the capacitor to be tested, and an adjustable electronic load for constant current discharge of the capacitor to be tested, the adjustable electronic DC source and the adjustable electronic load being connected to a first communication module for information interaction with a host computer, the test port being connected to a voltage acquisition module and a current acquisition module, the voltage acquisition module being connected to a data processing module, the data processing module being electrically connected to the current acquisition module, and the data processing module being connected to a second communication module for information interaction with a host computer;

[0009] The voltage acquisition module includes a voltage amplifying circuit connected to the test port, the voltage amplifying circuit is connected to a voltage instrument amplifying circuit, and the voltage instrument amplifying circuit is connected to the data processing module;

[0010] The current acquisition module comprises a current amplifying circuit connected to the test port, the current amplifying circuit is connected to a current instrument amplifying circuit, and the voltage instrument amplifying circuit is connected to the data processing module.

[0011] Furthermore, the voltage amplifier circuit includes an operational amplifier chip U25 whose inverting input terminal is connected to the test port, the inverting input terminal of the operational amplifier chip U25 is connected to the output terminal through a resistor R3 in parallel with a capacitor C3, and the non-inverting input terminal of the operational amplifier chip U25 is grounded.

[0012] Further, the voltage instrument amplifier circuit includes an instrument amplifier chip U26 whose input end is connected to the output end of the voltage amplifier circuit, the output end and REF end of the instrument amplifier chip U26 are both connected to one end of the resistor R29, the CAV end of the instrument amplifier chip U26 is connected to the output end of the instrument amplifier chip U26 through the capacitor CV3, the BIF end of the instrument amplifier chip U26 is connected to the other end of the resistor R29 through the resistor R23, one end of the resistor R23 connected to the resistor R29 is connected to the BFO end of the instrument amplifier chip U26 through the capacitor C15, the capacitor C15 is connected to the ground through the capacitor C16, and the BFO end of the instrument amplifier chip U26 is connected to the data processing module.

[0013] Furthermore, the current amplification circuit includes an operational amplifier chip U23 whose inverting input terminal is connected to the test port through a resistor R20, the inverting input terminal of the operational amplifier chip U23 is connected to the output terminal through a resistor R2 in parallel with a capacitor C2, and the non-inverting input terminal of the operational amplifier chip U23 is grounded.

[0014] Further, the current instrument amplifier circuit includes an instrument amplifier chip U24 whose input end is connected to the output end of the current amplifier circuit, the output end and REF end of the instrument amplifier chip U24 are both connected to one end of the resistor R21, the CAV end of the instrument amplifier chip U24 is connected to the output end of the instrument amplifier chip U24 through the capacitor CV2, the BIF end of the instrument amplifier chip U24 is connected to the other end of the resistor R21 through the resistor R22, one end of the resistor R22 connected to the resistor R21 is connected to the BFO end of the instrument amplifier chip U24 through the capacitor C13, the capacitor C13 is connected to the ground through the capacitor C14, and the BFO end of the instrument amplifier chip U24 is connected to the data processing module.

[0015] Compared with the prior art, the beneficial effects of the utility model are:

[0016] In practical applications, according to the basic information of the capacitor to be tested, the host computer adjusts the parameters of the adjustable electronic DC source and the adjustable electronic load through the first communication module to adapt to the test of supercapacitors of different models. During the test, the capacitor to be tested is charged with a constant current through the adjustable electronic DC source, and the capacitor to be tested is discharged with a constant current through the adjustable electronic load. The voltage and current data of the capacitor to be tested are respectively collected by the voltage acquisition module and the current acquisition module, and transmitted to the data processing module for processing to obtain the test result. The data processing module transmits the test result to the host computer through the second communication module. The data processing module is an STM23 series single-chip microcomputer, and the models of the first communication module and the second communication module are both MUX485; the voltage acquisition module and the current acquisition module respectively correspond to the voltage amplification circuit and the current amplification circuit to amplify and sample the collected low voltage and low current, and at the same time, the voltage instrument amplification circuit and the current instrument amplification circuit are respectively corresponding to increase the impedance to the signal to improve the measurement accuracy; the utility model is suitable for the test of supercapacitors of different models, and effectively increases the impedance to the signal, and improves the measurement accuracy. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solution of the implementation mode of the utility model, the drawings required for use in the implementation mode will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0018] Figure 1 It is a circuit principle block diagram of the utility model;

[0019] Figure 2 This is the circuit schematic diagram of the voltage acquisition module of the utility model;

[0020] Figure 3 This is the circuit schematic diagram of the current acquisition module of the utility model;

[0021] Figure 4 It is the circuit principle diagram of the data processing module of the utility model;

[0022] Figure 5 This is a circuit schematic diagram of the first communication module of the utility model. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the utility model. Therefore, the following detailed description of the embodiments of the utility model provided in the drawings is not intended to limit the scope of the utility model for which protection is sought, but merely represents the selected embodiments of the utility model. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without making creative work belong to the scope of protection of the utility model.

[0024] See also Figures 1 to 5 , a supercapacitor tester, comprising a test port for connecting a capacitor to be tested, the test port being connected to an adjustable electronic DC source for constant current charging of the capacitor to be tested, and an adjustable electronic load for constant current discharge of the capacitor to be tested, the adjustable electronic DC source and the adjustable electronic load being connected to a first communication module for information interaction with a host computer, the test port being connected to a voltage acquisition module and a current acquisition module, the voltage acquisition module being connected to a data processing module, the data processing module being electrically connected to the current acquisition module, and the data processing module being connected to a second communication module for information interaction with a host computer;

[0025] The voltage acquisition module includes a voltage amplifying circuit connected to the test port, the voltage amplifying circuit is connected to a voltage instrument amplifying circuit, and the voltage instrument amplifying circuit is connected to the data processing module;

[0026] The current acquisition module comprises a current amplifying circuit connected to the test port, the current amplifying circuit is connected to a current instrument amplifying circuit, and the voltage instrument amplifying circuit is connected to the data processing module.

[0027] In practical applications, according to the basic information of the capacitor to be tested, the host computer adjusts the parameters of the adjustable electronic DC source and the adjustable electronic load through the first communication module to adapt to the test of supercapacitors of different models. During the test, the capacitor to be tested is charged with a constant current through the adjustable electronic DC source, and the capacitor to be tested is discharged with a constant current through the adjustable electronic load. The voltage and current data of the capacitor to be tested are respectively collected by the voltage acquisition module and the current acquisition module, and transmitted to the data processing module for processing to obtain the test result. The data processing module transmits the test result to the host computer through the second communication module. The data processing module is an STM23 series single-chip microcomputer, and the models of the first communication module and the second communication module are both MUX485; the voltage acquisition module and the current acquisition module respectively correspond to the voltage amplification circuit and the current amplification circuit to amplify and sample the collected low voltage and low current, and at the same time, the voltage instrument amplification circuit and the current instrument amplification circuit are respectively corresponding to increase the impedance to the signal to improve the measurement accuracy; the utility model is suitable for the test of supercapacitors of different models, and effectively increases the impedance to the signal, and improves the measurement accuracy.

[0028] See also Figure 2 The voltage amplifier circuit includes an operational amplifier chip U25 whose inverting input terminal is connected to the test port, and the inverting input terminal of the operational amplifier chip U25 is connected to the output terminal through a resistor R3 in parallel with a capacitor C3, and the non-inverting input terminal of the operational amplifier chip U25 is grounded. In this embodiment, the sampled low voltage is amplified and output to the voltage instrument amplifier circuit through the operational amplifier chip U25, the resistor R3, and the capacitor C3. The model of the operational amplifier chip U25 is LA3472.

[0029] See also Figure 2 The voltage instrument amplifier circuit includes an instrument amplifier chip U26 whose input end is connected to the output end of the voltage amplifier circuit, the output end and REF end of the instrument amplifier chip U26 are both connected to one end of the resistor R29, the CAV end of the instrument amplifier chip U26 is connected to the output end of the instrument amplifier chip U26 through the capacitor CV3, the BIF end of the instrument amplifier chip U26 is connected to the other end of the resistor R29 through the resistor R23, the resistor R23 is connected to the resistor R29 through the capacitor C15 and the BFO end of the instrument amplifier chip U26, the capacitor C15 is connected to the ground through the capacitor C16, and the BFO end of the instrument amplifier chip U26 is connected to the data processing module. In this embodiment, the impedance to the signal is increased and the measurement accuracy is improved by the instrument amplifier chip U26, the resistor R29, the resistor R23, the capacitor CV3, the capacitor C15 and the capacitor C16. The model of the instrument amplifier chip U26 is AD8536.

[0030] See also Figure 3The current amplification circuit includes an operational amplifier chip U23 whose inverting input terminal is connected to the test port through a resistor R20, and the inverting input terminal of the operational amplifier chip U23 is connected to the output terminal after being connected in parallel with a capacitor C2 through a resistor R2, and the non-inverting input terminal of the operational amplifier chip U23 is grounded. In this embodiment, the sampled low current is amplified and output to the current instrument amplifier circuit through the operational amplifier chip U23, the resistor R20, the resistor R2, and the capacitor C2, and the model of the operational amplifier chip U23 is LA3472.

[0031] See also Figure 3 The current instrument amplifier circuit includes an instrument amplifier chip U24 whose input end is connected to the output end of the current amplifier circuit, the output end and REF end of the instrument amplifier chip U24 are both connected to one end of the resistor R21, the CAV end of the instrument amplifier chip U24 is connected to the output end of the instrument amplifier chip U24 through the capacitor CV2, the BIF end of the instrument amplifier chip U24 is connected to the other end of the resistor R21 through the resistor R22, the resistor R22 is connected to the resistor R21 through the capacitor C13 and the BFO end of the instrument amplifier chip U24, the capacitor C13 is connected to the ground through the capacitor C14, and the BFO end of the instrument amplifier chip U24 is connected to the data processing module. In this embodiment, the impedance to the signal is increased and the measurement accuracy is improved by the instrument amplifier chip U24, the resistor R21, the resistor R22, the capacitor CV2, the capacitor C13 and the capacitor C14. The model of the instrument amplifier chip U24 is AD8536.

[0032] The above description is only the preferred implementation of the utility model, and is not intended to limit the utility model. For those skilled in the art, the utility model can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. Supercapacitor tester, characterized by: The device comprises a test port for connecting a capacitor to be tested, the test port is connected to an adjustable electronic DC source for constant current charging of the capacitor to be tested, and an adjustable electronic load for constant current discharge of the capacitor to be tested, the adjustable electronic DC source and the adjustable electronic load are both connected to a first communication module for information interaction with a host computer, the test port is connected to a voltage acquisition module and a current acquisition module, the voltage acquisition module is connected to a data processing module, the data processing module is electrically connected to the current acquisition module, and the data processing module is connected to a second communication module for information interaction with a host computer; The voltage acquisition module includes a voltage amplifying circuit connected to the test port, the voltage amplifying circuit is connected to a voltage instrument amplifying circuit, and the voltage instrument amplifying circuit is connected to the data processing module; The current acquisition module comprises a current amplifying circuit connected to the test port, the current amplifying circuit is connected to a current instrument amplifying circuit, and the voltage instrument amplifying circuit is connected to the data processing module.

2. The supercapacitor tester according to claim 1, characterized in that: The voltage amplifier circuit includes an operational amplifier chip U25 whose inverting input terminal is connected to the test port. The inverting input terminal of the operational amplifier chip U25 is connected to the output terminal through a resistor R3 in parallel with a capacitor C3, and the non-inverting input terminal of the operational amplifier chip U25 is grounded.

3. The supercapacitor tester according to claim 1, characterized in that: The voltage instrument amplifier circuit includes an instrument amplifier chip U26 whose input end is connected to the output end of the voltage amplifier circuit, the output end and REF end of the instrument amplifier chip U26 are both connected to one end of the resistor R29, the CAV end of the instrument amplifier chip U26 is connected to the output end of the instrument amplifier chip U26 through the capacitor CV3, the BIF end of the instrument amplifier chip U26 is connected to the other end of the resistor R29 through the resistor R23, one end of the resistor R23 connected to the resistor R29 is connected to the BFO end of the instrument amplifier chip U26 through the capacitor C15, the capacitor C15 is connected to the ground through the capacitor C16, and the BFO end of the instrument amplifier chip U26 is connected to the data processing module.

4. The supercapacitor tester according to claim 1, characterized in that: The current amplification circuit includes an operational amplifier chip U23 whose inverting input terminal is connected to the test port through a resistor R20, the inverting input terminal of the operational amplifier chip U23 is connected to the output terminal through a resistor R2 in parallel with a capacitor C2, and the non-inverting input terminal of the operational amplifier chip U23 is grounded.

5. The supercapacitor tester according to claim 1, characterized in that: The current instrument amplifier circuit includes an instrument amplifier chip U24 whose input end is connected to the output end of the current amplifier circuit, the output end and REF end of the instrument amplifier chip U24 are both connected to one end of the resistor R21, the CAV end of the instrument amplifier chip U24 is connected to the output end of the instrument amplifier chip U24 through the capacitor CV2, the BIF end of the instrument amplifier chip U24 is connected to the other end of the resistor R21 through the resistor R22, one end of the resistor R22 connected to the resistor R21 is connected to the BFO end of the instrument amplifier chip U24 through the capacitor C13, the capacitor C13 is connected to the ground through the capacitor C14, and the BFO end of the instrument amplifier chip U24 is connected to the data processing module.

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