Burning control circuit and printed circuit board

Abstract

The utility model provides a burning control circuit and a printed circuit board, and relates to the technical field of circuits, the burning control circuit comprises a connector, a jumper cap and an analog switch chip; the burning control circuit controls to output a first level to a logic control port of the analog switch chip when the jumper cap is connected with the connector, and controls to output a second level to the logic control port of the analog switch chip when the jumper cap is disconnected with the connector, and the second level is greater than the first level; when the analog switch chip receives a target level through the logic control port, a target output port in the public port and the output port is switched on, and the target level is a first level or a second level, so that the CPLD to be burnt is burnt through a burning interface of the CPLD to be burnt connected with the target output port. According to the method and the device, firmware burning can be carried out on the CPLD more conveniently.

Description

Technical Field

[0001] The present application relates to the field of circuit technology, and in particular to a burning control circuit and a printed circuit board. Background Art

[0002] The Joint Test Action Group (JTAG) is an international standard test protocol that can be used for internal chip testing and firmware burning of chips, etc. It plays an important role in the testing, simulation and debugging of integrated circuits.

[0003] At present, for complex programmable logic devices (CPLD) of different server products, when burning firmware into CPLD, it is necessary to adapt different cables based on the definition of the JTAG burning interface of CPLD to complete the firmware burning. However, burning firmware to CPLD in the above way is not convenient enough. Utility Model Content

[0004] The present application provides a burning control circuit and a printed circuit board to solve the problem that the current method of burning firmware to a CPLD is not convenient enough.

[0005] In a first aspect, the present application provides a burning control circuit, comprising: a connector, a jumper cap and an analog switch chip;

[0006] The analog switch chip includes a logic control port, a common port and an output port, and the output port is used to connect to the burning interface of different complex programmable logic devices CPLD to be burned;

[0007] A jumper cap, used for controlling the output of a first level to the logic control port when establishing a connection with the connector, and controlling the output of a second level to the logic control port when disconnecting from the connector, wherein the second level is greater than the first level;

[0008] The analog switch chip is used to connect the common port and the target output port among the output ports when receiving the target level through the logic control port, and the target level is the first level or the second level, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port.

[0009] Optionally, the connector includes a first pin and a second pin, and when the jumper cap establishes a connection with the connector, the first pin and the second pin are short-circuited to control the output of a first level to the logic control port.

[0010] Optionally, the first pin is connected to the power supply via a first resistor, and the second pin is grounded via a second resistor; the logic control port includes a first logic control port and a second logic control port; when the jumper cap establishes a connection with the connector, the first pin and the second pin are short-circuited, and the control power supply outputs a first level to both the first logic control port and the second logic control port through a voltage divider circuit formed by the first resistor and the second resistor.

[0011] Optionally, when the jumper cap is used to control the output of the second level to the logic control port, it is specifically used to: control the power supply to output the second level to both the first logic control port and the second logic control port via the first resistor.

[0012] Optionally, the common port includes a first preset number of ports, the output port includes at least two groups, each group of output ports includes a first preset number of ports, and when the analog switch chip connects the common port with target output ports among the output ports, it is specifically used to: the analog switch chip connects each common port in the first preset number of common ports with each target output port in the first preset number of target output ports.

[0013] Optionally, the output port includes a first preset number of normally open output ports and a first preset number of normally closed output ports, and the analog switch chip connects the common port and the normally open output port when receiving a first level through the logic control port, and connects the common port and the normally closed output port when receiving a second level through the logic control port.

[0014] Optionally, the first level is less than or equal to a first level threshold, the second level is greater than or equal to a second level threshold, and the first level threshold is less than the second level threshold.

[0015] Optionally, the burning control circuit includes a second preset number of jump caps, a connector corresponding to each of the second preset number of jump caps, and an analog switch chip including output ports corresponding to the second preset number of jump caps.

[0016] Optionally, the analog switch chip further includes an enable port for enabling the analog switch chip.

[0017] In a second aspect, the present application provides a printed circuit board (PCB), comprising: the burning control circuit as described in the first aspect of the present application.

[0018] The application provides a burning control circuit and a printed circuit board, wherein the burning control circuit comprises a connector, a jumper cap and an analog switch chip; the burning control circuit controls the output of a first level to a logic control port of the analog switch chip when the jumper cap is connected to the connector, and controls the output of a second level to the logic control port of the analog switch chip when the jumper cap is disconnected from the connector, wherein the second level is greater than the first level; when the analog switch chip receives a target level through the logic control port, the common port and a target output port among the output ports are connected, wherein the target level is the first level or the second level, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port. The present application adds a connector, a jumper cap and an analog switch chip to a burning cable, and controls the output of different electrical levels to the logic control port of the analog switch chip based on whether the jumper cap is connected to the connector, so that the analog switch chip connects the common port of the analog switch chip and the target output port among the output ports according to the received electrical levels, and performs firmware burning on the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port, so that different JTAG burning interface definitions of the CPLD to be burned can be adapted through one burning cable, thereby reducing the number of tools and making firmware burning of the CPLD more convenient. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, a brief introduction will be given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0020] Figure 1 A schematic diagram of a programming control circuit provided in one embodiment of the present application;

[0021] Figure 2 A schematic diagram of a programming control circuit provided in another embodiment of the present application;

[0022] Figure 3 A schematic diagram of a PCB provided in one embodiment of the present application;

[0023] Figure 4 A schematic diagram of hardware wiring for programming a CPLD to be programmed is provided in one embodiment of the present application. DETAILED DESCRIPTION

[0024] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0025] At present, for CPLDs of different server products, when burning firmware into CPLD, it is necessary to adapt different cables based on the definition of the JTAG burning interface of the CPLD to complete the firmware burning. Specifically, for the CPLD of each server product, determine the burning cable corresponding to the burning interface of the CPLD, connect one end of the burning cable to the burning interface of the CPLD, connect the other end of the burning cable to the burning tool, and connect the burning tool to the host computer (such as a work computer), so as to burn the firmware in the host computer to the chip to be burned. Since the definition of the JTAG burning interface of the CPLD of different server products is different, it is necessary to burn through different cables. Therefore, when burning the firmware of the CPLD in the above method, there is a problem that the burning is not convenient enough.

[0026] Based on the above problems, the present application provides a burning control circuit and a printed circuit board. By adding a connector, a jumper cap and an analog switch chip in the burning cable, the analog switch chip is controlled to connect the common port of the analog switch chip and the target output port in the output port based on whether the jumper cap is connected to the connector, so that the firmware of the CPLD to be burned is burned through the burning interface of the CPLD to be burned connected to the target output port, thereby realizing the adaptation of different JTAG burning interface definitions of the CPLD to be burned through one burning cable, which can reduce the number of tools and more conveniently burn the firmware of the CPLD.

[0027] Figure 1 Schematic diagram of a programming control circuit provided in one embodiment of the present application. Figure 1 As shown, the programming control circuit 100 of the embodiment of the present application includes: a connector 101 , a jumper cap 102 and an analog switch chip 103 .

[0028] The analog switch chip 103 includes a logic control port, a common port and an output port, and the output port is used to connect to the programming interface of different CPLDs to be programmed;

[0029] The jumper cap 102 is used to control the output of a first level to the logic control port when establishing a connection with the connector 101, and to control the output of a second level to the logic control port when disconnecting from the connector 101, wherein the second level is greater than the first level;

[0030] The analog switch chip 103 is used to connect the common port and the target output port among the output ports when receiving the target level through the logic control port, and the target level is the first level or the second level, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port.

[0031] In the embodiment of the present application, the connector 101 includes, for example, two pins for connecting the jumper cap 102. For the CPLD of different server products, it can be determined whether the jumper cap 102 is connected to the connector 101 according to the definition of the JTAG programming interface of the CPLD to be programmed, so as to control the output of the corresponding level to the logic control port of the analog switch chip 103. Figure 1 The jumper 102 is connected to the connector 101 as an example. The common port of the analog switch chip 103 is, for example, a COM port, which can be used to connect to an external burning tool; the output port of the analog switch chip 103 is, for example, a normally open output port NO or a normally closed output port NC.

[0032] Exemplarily, it is assumed that there are two CPLDs to be burned, namely, a first CPLD to be burned and a second CPLD to be burned, and the definitions of the JTAG burning interfaces of the first CPLD to be burned and the second CPLD to be burned are different; it is assumed that the output port of the analog switch chip 103 includes a first output port and a second output port, wherein the first output port is connected to the burning interface of the first CPLD to be burned, and the second output port is connected to the burning interface of the second CPLD to be burned. When the jump cap 102 is connected to the connector 101, it is determined that the first CPLD to be burned is burned; when the jump cap 102 is not connected to the connector 101, it is determined that the second CPLD to be burned is burned. Specifically, when the jumper cap 102 is connected to the connector 101, the two pins of the connector 101 are short-circuited, and the burning control circuit 100 controls the output of the first level to the logic control port of the analog switch chip 103; accordingly, the logic control port receives the first level, and the analog switch chip 103 connects the common port and the first output port of the output port to burn the first CPLD to be burned through the burning interface of the first CPLD to be burned connected to the first output port. When the jumper cap 102 is not connected to the connector 101, the burning control circuit 100 controls the output of the second level to the logic control port of the analog switch chip 103; accordingly, the logic control port receives the second level, and the analog switch chip 103 connects the common port and the second output port of the output port to burn the second CPLD to be burned through the burning interface of the second CPLD to be burned connected to the second output port. Among them, the second level is greater than the first level, the first level can be understood as a low level, and the second level can be understood as a high level.

[0033] Optionally, the first level is less than or equal to a first level threshold, the second level is greater than or equal to a second level threshold, and the first level threshold is less than the second level threshold.

[0034] Exemplarily, the first level threshold and the second level threshold can be determined according to the product specification requirements of the analog switch chip 103, and the first level threshold is less than the second level threshold. For example, the first level threshold is the maximum value of the low level of the input signal of the analog switch chip 103, 0.65V, and the second level threshold is the minimum value of the high level of the input signal of the analog switch chip 103, 1.2V. Assuming that the first level is 0.58V, the first level is a low level, and accordingly, the logic control port receives a low level; assuming that the second level is 3.3V, accordingly, the logic control port receives a high level.

[0035] The burning control circuit provided by the embodiment of the present application includes a connector, a jumper cap and an analog switch chip; when the jumper cap is connected to the connector, the first level is controlled to be output to the logic control port of the analog switch chip, and when the jumper cap is disconnected from the connector, the second level is controlled to be output to the logic control port of the analog switch chip, and the second level is greater than the first level; when the analog switch chip receives a target level through the logic control port, the common port and the target output port of the output port are connected, and the target level is the first level or the second level, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port. The embodiment of the present application adds a connector, a jumper cap and an analog switch chip in the burning cable, and controls the output of different electrical levels to the logic control port of the analog switch chip based on whether the jumper cap is connected to the connector, so that the analog switch chip connects the common port of the analog switch chip and the target output port among the output ports according to the received electrical levels, and performs firmware burning on the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port, so that different JTAG burning interface definitions of the CPLD to be burned can be adapted through one burning cable, which can reduce the number of tools and make firmware burning of the CPLD more convenient.

[0036] On the basis of the above embodiment, optionally, the connector 101 includes a first pin and a second pin, and when the jumper cap 102 establishes a connection with the connector 101, the first pin and the second pin are short-circuited to control the output of the first level to the logic control port.

[0037] Exemplarily, when the jumper cap 102 establishes a connection with the connector 101 , the first pin and the second pin are short-circuited and connected, which is an on state, and current flows through, thereby controlling the output of a first level to the logic control port.

[0038] Further, optionally, the first pin is connected to the power supply via the first resistor, and the second pin is grounded via the second resistor; the logic control port includes a first logic control port and a second logic control port; when the jumper cap establishes a connection with the connector, the first pin and the second pin are short-circuited, and the control power supply outputs the first level to both the first logic control port and the second logic control port through a voltage divider circuit formed by the first resistor and the second resistor.

[0039] For example, the power level is 3.3V, the first resistor is 4.7kΩ, the second resistor is 1kΩ, and the first logic control port (indicated by IN1) and the second logic control port (indicated by IN2). When the jumper cap 102 is connected to the connector 101, the first pin and the second pin are short-circuited, so that the first resistor and the second resistor form a voltage divider circuit, so that the control power supply outputs the first level to both the first logic control port and the second logic control port through the voltage divider circuit.

[0040] On the basis of the above embodiment, optionally, when the jumper cap 102 is used to control the output of the second level to the logic control port, it is specifically used to: control the power supply to output the second level to both the first logic control port and the second logic control port via the first resistor.

[0041] Exemplarily, when the jumper cap 102 is disconnected from the connector 101, it is in a disconnected state, and the second pin and the second resistor of the connector 101 are no longer functional, so that the control power supply outputs the second level to both the first logic control port and the second logic control port through the first resistor. If the power supply level is 3.3V, for example, the second level is 3.3V.

[0042] On the basis of the above embodiment, optionally, the common port includes a first preset number of ports, the output port includes at least two groups, each group of output ports includes a first preset number of ports, and when the analog switch chip 103 connects the common port with the target output port in the output port, it is specifically used for: the analog switch chip 103 connects each common port in the first preset number of common ports with each target output port in the first preset number of target output ports.

[0043] Exemplarily, the first preset number is, for example, 6, and the analog switch chip 103 includes 6 common ports, each group of output ports in at least two groups of output ports includes 6 output ports, and each group of output ports is used to connect to the corresponding programming interface of the CPLD to be programmed. According to the JTAG programming interface definition of the CPLD to be programmed, the analog switch chip connects each of the 6 common ports to each of the 6 target output ports in a one-to-one correspondence to connect the programming interface of the CPLD to be programmed.

[0044] Based on the above embodiments, in a possible embodiment, the output port includes a first preset number of normally open output ports and a first preset number of normally closed output ports, and the analog switch chip 103 connects the common port and the normally open output port when receiving a first level through the logic control port, and connects the common port and the normally closed output port when receiving a second level through the logic control port.

[0045] Exemplarily, the first preset number is, for example, 6, and the output ports include 6 normally open output ports and 6 normally closed output ports. When the analog switch chip 103 receives the first level through the logic control port, the 6 common ports are connected to the 6 normally open output ports in a one-to-one correspondence. When the analog switch chip 103 receives the second level through the logic control port, the 6 common ports are connected to the 6 normally closed output ports in a one-to-one correspondence.

[0046] Based on the above embodiment, optionally, the burning control circuit 100 includes a second preset number of jump caps 102, a connector 101 corresponding to each of the second preset number of jump caps, and an analog switch chip 103 including output ports corresponding to the second preset number of jump caps 102.

[0047] Exemplarily, if the second preset number is 2, the burning control circuit 100 includes 2 jumpers 102, 2 connectors 101, and an analog switch chip 103 including 4 groups of output ports. Accordingly, the 4 groups of output ports can be used to connect the burning interfaces of 4 different CPLDs to be burned, respectively. It can be understood that based on the above method, the burning control circuit can include multiple connectors, multiple jumpers, and an analog switch chip including multiple groups of output ports according to the JTAG burning interface definition of different CPLDs to be burned. The analog switch chip determines a group of target output ports from the multiple groups of output ports included according to the connection conditions between different jumpers and corresponding connectors, thereby realizing the burning of different CPLDs to be burned through one burning cable.

[0048] Based on the above embodiment, optionally, the analog switch chip 103 may further include an enable port for enabling the analog switch chip 103 .

[0049] Exemplarily, the analog switch chip 103 may be enabled through an enable port.

[0050] Optionally, the analog switch chip 103 may be enabled by directly powering on.

[0051] Based on the above embodiments, Figure 2 This is a schematic diagram of a programming control circuit provided by another embodiment of the present application. Based on the above embodiment, the programming control circuit is further described in the embodiment of the present application. Figure 2As shown, in the burning control circuit of the embodiment of the present application, the analog switch chip U1 can be understood as a two-choice analog switch selector, and the analog switch chip U1 includes two logic control ports (IN1 and IN2 respectively), a common port (ie, COM1 to COM6) and two groups of output ports (ie, NO1 to NO6 and NC1 to NC6). Among them, COM1 to COM6 are connected to an external burning tool; NO1 to NO6 are connected to 6 pins of the burning interface of the first CPLD to be burned; NC1 to NC6 are connected to 6 pins of the burning interface of the second CPLD to be burned.

[0052] Specifically, according to the definition of the JTAG burning interface of the CPLD to be burned, VCC_JTAG and VCC_CONN are both used to provide power signals; TCK and TCK_CONN are both used to provide clock signals for JTAG operations; GND and GND_CONN are both used to provide ground signals; TMS and TMS_CONN are both used for test mode selection, that is, to control the operation of the state machine and determine the working mode of the JTAG interface; TDO and TDO_CONN are both used for test data output, that is, to move test data out of the CPLD; TDI and TDI_CONN are both used for test data input, that is, to move test data into the CPLD.

[0053] The connector J1 includes pin 1 and pin 2; the power level (ie, VCC) is, for example, 3.3V, the first resistor (ie, R1) is, for example, 4.7kΩ, and the second resistor (ie, R2) is, for example, 1kΩ. The programming control circuit also includes an enable port EN for enabling the analog switch chip U1. The programming control circuit also includes an EPAD device for enhancing heat dissipation performance and providing better electrical grounding.

[0054] For example, based on Figure 2 ,Table 1 shows how to control the switching of different channels by different connection situations of the jumper cap and the connector.

[0055] Table 1

[0056]

[0057] As shown in Table 1, the analog switch chip U1 is enabled through the enable port EN (corresponding to the low level), and when the jumper cap is connected to the connector J1, the pins 1 and 2 of the connector J1 are short-circuited, and the burning control circuit controls the power supply to output the first level to both the two logic control ports IN1 and IN2 through the voltage divider circuit composed of R1 and R2. Assuming that the level of VCC is 3.3V, R1 is 4.7kΩ, and R2 is 1kΩ, the first level is: VCC*(R2 / (R1+R2))=0.58V. According to the product specification of the analog switch chip U1, the first level threshold is the maximum value of the low level of the input signal of the analog switch chip U1, 0.65V, so it can be determined that the first level is a low level. Correspondingly, when the analog switch chip U1 receives the first level through the two logic control ports IN1 and IN2, it performs channel selection, that is, according to the JTAG burning interface definition, COM1 to COM6 are connected to NO1 to NO6 one by one, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to NO1 to NO6.

[0058] When the jumper cap is disconnected from the connector J1, the burning control circuit controls the power supply to output the second level to both logic control ports IN1 and IN2 through R1. Assuming that the level of VCC is 3.3V, the second level is 3.3V. According to the product specification of the analog switch chip U1, the second level threshold is the lowest value of the high level of the input signal of the analog switch chip, 1.2V. Therefore, it can be determined that the second level is a high level. Accordingly, when the analog switch chip U1 receives the second level through the two logic control ports IN1 and IN2, it performs channel selection, that is, according to the definition of the JTAG burning interface, COM1 to COM6 are connected to NC1 to NC6 one by one, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to NC1 to NC6.

[0059] Based on the above embodiments, Figure 3 A schematic diagram of a printed circuit board (PCB) provided in one embodiment of the present application. Figure 3 As shown, the PCB 300 includes: the burning control circuit 100 as in any of the above embodiments. Wherein:

[0060] The burning control circuit 100 includes a connector, a jumper cap and an analog switch chip; the analog switch chip includes a logic control port, a common port and an output port, and the output port is used to connect the burning interfaces of different CPLDs to be burned; the jumper cap is used to control the output of a first level to the logic control port when establishing a connection with the connector, and to control the output of a second level to the logic control port when disconnecting from the connector, and the second level is greater than the first level; the analog switch chip is used to connect the common port and a target output port in the output port when receiving a target level through the logic control port, and the target level is the first level or the second level, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port.

[0061] Optionally, the connector includes a first pin and a second pin, and when the jumper cap establishes a connection with the connector, the first pin and the second pin are short-circuited to control the output of a first level to the logic control port.

[0062] Optionally, the first pin is connected to the power supply via a first resistor, and the second pin is grounded via a second resistor; the logic control port includes a first logic control port and a second logic control port; when the jumper cap establishes a connection with the connector, the first pin and the second pin are short-circuited, and the control power supply outputs a first level to both the first logic control port and the second logic control port through a voltage divider circuit formed by the first resistor and the second resistor.

[0063] Optionally, when the jumper cap is used to control the output of the second level to the logic control port, it is specifically used to: control the power supply to output the second level to both the first logic control port and the second logic control port via the first resistor.

[0064] Optionally, the common port includes a first preset number of ports, the output port includes at least two groups, each group of output ports includes a first preset number of ports, and when the analog switch chip connects the common port with target output ports among the output ports, it is specifically used to: the analog switch chip connects each common port in the first preset number of common ports with each target output port in the first preset number of target output ports.

[0065] Optionally, the output port includes a first preset number of normally open output ports and a first preset number of normally closed output ports, and the analog switch chip connects the common port and the normally open output port when receiving a first level through the logic control port, and connects the common port and the normally closed output port when receiving a second level through the logic control port.

[0066] Optionally, the first level is less than or equal to a first level threshold, the second level is greater than or equal to a second level threshold, and the first level threshold is less than the second level threshold.

[0067] Optionally, the burning control circuit includes a second preset number of jump caps, a connector corresponding to each of the second preset number of jump caps, and an analog switch chip including output ports corresponding to the second preset number of jump caps.

[0068] Optionally, the analog switch chip further includes an enable port for enabling the analog switch chip.

[0069] The PCB provided in the embodiment of the present application includes a burning control circuit as in any of the above embodiments. By adding a PCB to the burning cable, it is possible to adapt different JTAG burning interface definitions of the CPLD to be burned through one burning cable, thereby reducing the number of tools and making it more convenient to burn the firmware of the CPLD.

[0070] Based on the above embodiments, Figure 4 The hardware wiring diagram for burning the CPLD to be burned is provided in an embodiment of the present application. Figure 4 As shown, taking firmware burning of two CPLDs to be burned as an example, one end of the PCB is connected to the CPLD burning tool, and the other end of the PCB is connected to the two CPLDs to be burned in sequence through the same burning cable 401, so as to burn firmware of the two CPLDs to be burned respectively, and the two CPLDs to be burned are, for example, the first CPLD to be burned and the second CPLD to be burned. The PCB includes a burning control circuit, and the burning control circuit includes a connector ( Figure 4 Not shown), jump cap ( Figure 4 Not shown) and analog switch chip ( Figure 4 402 and switch 403 are used as examples). When the jumper cap is connected to the connector, the CPLD to be burned is the first CPLD to be burned, switch 402 is turned on, and the burning cable channel is selected as channel 1. At this time, the JTAG interface definition is burned according to the JTAG interface definition sequence set for the first CPLD to be burned. When the jumper cap is disconnected from the connector, the CPLD to be burned is the second CPLD to be burned, switch 403 is turned on, and the burning cable channel is selected as channel 2. At this time, the JTAG interface definition is burned according to the JTAG interface definition sequence set for the second CPLD to be burned.

[0071] It is to be understood that the various numerical numbers involved in the embodiments of the present application are only for the convenience of description and are not intended to limit the scope of the embodiments of the present application. In the embodiments of the present application, the size of the sequence number of each process does not mean the order of execution, and the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0072] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A burning control circuit, characterized in that: include: Connectors, jumpers and analog switch chips; The analog switch chip includes a logic control port, a common port and an output port, and the output port is used to connect to the programming interface of different complex programmable logic devices CPLD to be programmed; The jumper cap is used to control the output of a first level to the logic control port when establishing a connection with the connector, and to control the output of a second level to the logic control port when disconnecting from the connector, wherein the second level is greater than the first level; The analog switch chip is used to connect the common port and a target output port among the output ports when a target level is received through the logic control port, and the target level is the first level or the second level, so as to burn the CPLD to be burned through the burning interface of the CPLD to be burned connected to the target output port.

2. The burning control circuit according to claim 1, characterized in that: The connector includes a first pin and a second pin. When the jumper cap is connected to the connector, the first pin and the second pin are short-circuited to control the output of the first level to the logic control port.

3. The burning control circuit according to claim 2, characterized in that: The first pin is connected to the power supply via a first resistor, and the second pin is grounded via a second resistor; the logic control port includes a first logic control port and a second logic control port; when the jumper cap establishes a connection with the connector, the first pin and the second pin are short-circuited, and the power supply is controlled to output the first level to both the first logic control port and the second logic control port through a voltage divider circuit formed by the first resistor and the second resistor.

4. The burning control circuit according to claim 3, characterized in that: When the jumper cap is used to control the output of the second level to the logic control port, it is specifically used to: The power supply is controlled to output the second electrical level to both the first logic control port and the second logic control port via the first resistor.

5. The burning control circuit according to any one of claims 1 to 4, characterized in that: The common port includes a first preset number of ports, the output ports include at least two groups, each group of output ports includes a first preset number of ports, and when the analog switch chip connects the common port and a target output port among the output ports, it is specifically used to: The analog switch chip connects each common port of the first preset number of common ports to each target output port of the first preset number of target output ports.

6. The burning control circuit according to claim 5, characterized in that: The output port includes a first preset number of normally open output ports and a first preset number of normally closed output ports. When the analog switch chip receives the first level through the logic control port, the common port and the normally open output port are connected, and when the analog switch chip receives the second level through the logic control port, the common port and the normally closed output port are connected.

7. The burning control circuit according to any one of claims 1 to 4, characterized in that: The first level is less than or equal to a first level threshold, the second level is greater than or equal to a second level threshold, and the first level threshold is less than the second level threshold.

8. The burning control circuit according to any one of claims 1 to 4, characterized in that: The programming control circuit includes a second preset number of jump caps, a connector corresponding to each of the second preset number of jump caps, and an analog switch chip including output ports corresponding to the second preset number of jump caps.

9. The burning control circuit according to any one of claims 1 to 4, characterized in that: The analog switch chip also includes an enable port for enabling the analog switch chip.

10. A printed circuit board PCB, characterized in that: include: The burning control circuit according to any one of claims 1 to 9.

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