Switch dual over-current protection circuit

By designing dual overcurrent protection measures for clamping circuits and switching circuits in the switch protection circuits, the problem of long fuse response time in the prior art is solved, efficient protection of the switch circuits is achieved, and safety and reliability are improved.

CN222563504UActive Publication Date: 2025-03-04HUIZHOU KING BROTHER CIRCUIT TECH +1
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
CN202323606329.6
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2023-12-28
Publication Date
2025-03-04
Estimated Expiration
2033-12-28

AI Technical Summary

Technical Problem

In the existing switch protection circuit, the response time of the fuse is long and the circuit cannot be protected in time, resulting in low safety and reliability.

Method used

A switch double overcurrent protection circuit is designed to form a first voltage-regulated overcurrent protection through a clamping circuit, and a second voltage-regulated overcurrent protection through a switching circuit, improving the safety and reliability of the circuit.

Benefits of technology

The dual overcurrent protection of the switching circuit is realized, which significantly improves the safety and reliability of the circuit, can deal with current changes in time, and prevent circuit damage.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN222563504U_ABST
    Figure CN222563504U_ABST
Patent Text Reader

Abstract

The utility model discloses a switch dual over-current protection circuit, comprising a load RL, a power supply VCC connected to the input end of the load RL, and a driving circuit connected to the input end of the load RL, two ends of the driving circuit are connected in parallel with a clamping circuit, and the clamping circuit is used for keeping the current of the driving circuit constant and clamping the level of the output end of the driving circuit at a stable potential; the output end of the driving circuit is connected with a switching circuit, and the switching circuit comprises switching circuit units which are cascaded with each other and are used for discharging overcurrent electric energy; according to the utility model, first voltage-stabilizing over-current protection can be formed through the clamping circuit, second over-current protection can be formed through the switching circuit, and the first voltage-stabilizing over-current protection circuit stabilizes the level of the output end of the driving circuit and protects the current input end of the switching module; and the second overcurrent protection circuit protects the current output end of the switch module, so that the safety and the reliability of the double-layer overcurrent protection circuit of the switch can be improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The utility model relates to a switch protection circuit, in particular to a switch double overcurrent protection circuit. Background Art

[0002] With the improvement of people's living standards and the continuous increase in household appliances, personal electric shock and fire accidents caused by people's negligence in the process of using electricity have continuously strengthened people's awareness of electricity safety; due to the fluctuation of voltage or current of electric energy, when the voltage or current of the load is too high, it will cause damage to the load, so it is necessary to set a protection circuit in the power switch; and the existing switch protection circuit is provided with a fuse, which protects the circuit by melting the fuse due to overcurrent. The fuse only plays a single circuit protection role in the switch circuit, and the response time of the fuse is relatively long, usually taking several seconds to melt, so that in some rapidly changing current conditions, the circuit may not be protected in time, and the safety and reliability are low. Utility Model Content

[0003] The utility model aims to provide a switch double overcurrent protection circuit, which can form double overcurrent protection, thereby improving the safety and reliability of the switch circuit.

[0004] The purpose of the utility model is achieved through the following technical solutions:

[0005] A switch double overcurrent protection circuit comprises a load RL, a power supply VCC connected to the input end of the load RL, and a drive circuit connected to the input end of the load RL, wherein two ends of the drive circuit are connected in parallel with a clamping circuit, the clamping circuit is used to keep the current of the drive circuit constant and clamp the voltage of the drive circuit at a stable potential, i.e., the clamping voltage; the input end of the drive circuit is connected with a switch circuit, the switch circuit comprises switch circuit units which are cascaded with each other and are used to discharge overvoltage and overcurrent electrical energy.

[0006] On the basis of the above technical solution, the present invention can be improved as follows:

[0007] Furthermore, the clamping circuit includes a voltage-limiting diode D1, a first current-limiting resistor R8 and a capacitor C1, the cathode of the voltage-limiting diode D1 and one end of the capacitor C1 are connected to the input end of the drive circuit, the anode of the voltage-limiting diode D1 is connected to one end of the first current-limiting resistor R8, and the other end of the first current-limiting resistor R8 and the other end of the capacitor C1 are connected to the output end of the drive circuit.

[0008] Furthermore, each level of the switch circuit unit includes an NMOS tube, a small resistance resistor, a triode, a second current limiting resistor and a sampling resistor;

[0009] The output end of the driving circuit is connected to the drain of the NMOS tube, the gate of the NMOS tube is connected to the node between the small resistance resistor and the collector of the transistor, the source of the NMOS tube is connected to the node between the sampling resistor and the second current limiting resistor, the base of the transistor is connected to the other end of the sampling resistor, the emitter is connected to the other end of the second current limiting resistor and the node between the emitter of the transistor in the secondary switch circuit unit and the second current limiting resistor; the other end of the small resistance resistor is connected to the other end of the small resistance resistor in the secondary switch circuit unit; the emitter of the transistor located in the final switch circuit unit is connected to the other end of the second current limiting resistor to GND.

[0010] Furthermore, the driving circuit includes at least two inductance groups, which are connected in parallel to form an input end of the driving circuit connected to an output end of the load RL, and an output end of the driving circuit connected to an input end of the switch circuit.

[0011] Furthermore, each of the inductor groups includes at least two inductors, and the inductors in the same inductor group are connected in series.

[0012] Compared with the prior art, the utility model technology has the following advantages:

[0013] The utility model forms a first level of voltage-stabilizing overcurrent protection through a clamping circuit, and forms a second level of voltage-stabilizing overcurrent protection through a switching circuit. The first level of voltage-stabilizing overcurrent protection circuit stabilizes the input terminal level of the driving circuit and protects the current input terminal of the switch module, and the second level of overcurrent protection circuit protects the current output terminal of the switch module, thereby improving the safety and reliability of the switch double overcurrent protection circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0015] Figure 1 This is a schematic diagram of the structure of a switch double overcurrent protection circuit according to Embodiment 1;

[0016] Figure 2 It is a structural schematic diagram of the switch double overcurrent protection circuit of embodiment 2. DETAILED DESCRIPTION

[0017] The following is a further description of the specific embodiments of the present invention in conjunction with the accompanying drawings. The description of these embodiments is used to help understand the present invention, but does not constitute a limitation of the present invention. In addition, the technical features involved in each embodiment of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0018] See also Figure 1The utility model relates to a switch double overcurrent protection circuit, which includes: a load RL, an input end of the load RL is connected to a power supply VCC, an output end of the load RL is connected to a drive circuit, the drive circuit is connected to a switch circuit and a clamping circuit, power is supplied to the switch circuit through the drive circuit, and at the same time, the voltage of the drive circuit is clamped at a clamping voltage through the clamping circuit, so that the circuit output end of the drive circuit is in a constant voltage state.

[0019] The driving circuit includes N inductor groups, where N represents the number of inductor groups, and the N inductor groups are connected in parallel. In this embodiment, four inductor groups are used for illustration, and each inductor group includes one inductor.

[0020] Specifically, it includes inductor L1, inductor L2, inductor L3 and inductor L4, one end of inductor L1, inductor L2, inductor L3 and inductor L4 are connected together and connected to the output end of load RL as the input end of the drive circuit; the other ends of inductor L1, inductor L2, inductor L3 and inductor L4 are connected together and connected to the input end of the switch circuit as the output end of the drive circuit.

[0021] When powered on, the currents of inductor L1, inductor L2, inductor L3, and inductor L4 are I 1 ,I 2 ,I 3 ,I 4 , the voltages are U 1 , U 2 , U 3 , U 4 Since the four inductors are connected in parallel, the total current of the drive circuit Itotal = I 1 +I 2 +I 3 +I 4 , the total voltage of the drive circuit U 总 =U 1 =U 2 =U 3 =U 4 , the total power of the driving circuit P 总 =I 总 ×U 总 , that is, the number of inductors increases, and the total current passing through the drive circuit increases accordingly, thereby meeting the needs of high-power switches. To this end, according to actual needs, the number of inductors can be adjusted accordingly in the drive circuit; it should be noted that the drive circuit should include at least two inductor groups, that is, N is greater than or equal to 2, and each inductor group includes at least one inductor.

[0022] The clamping circuit is connected in parallel at both ends of the driving circuit for clamping protection of the driving circuit; specifically, the clamping circuit includes a voltage-limiting diode D1, a current-limiting resistor R8 and a capacitor C1, the cathode of the voltage-limiting diode D1 and one end of the capacitor C1 are connected to the input end of the driving circuit, the anode of the voltage-limiting diode D1 is connected to one end of the current-limiting resistor R8, and the other end of the current-limiting resistor R8 and the other end of the capacitor C1 are connected to the output end of the driving circuit.

[0023] When powered on, due to the stable forward conduction voltage drop of the voltage zener diode D1, the voltage zener diode D1 and the current limiting resistor R8 are connected in series and then connected in parallel with the drive circuit. The positive electrode of the voltage zener diode D1 clamps the output terminal potential of the drive circuit, and can clamp the voltage of the drive circuit at the clamping voltage. At the same time, the instantaneous peak voltage when powered on can be absorbed through the parallel capacitor C1, delaying the energy discharge time, avoiding the switch circuit from being burned due to the instantaneous passage of large electric energy, and filtering out noise; when powered off, due to the current of the inductor in the drive circuit not disappearing instantly, but generating a back electromotive force at both ends of the inductor, the charge is stored in the capacitor C1, and the current can be limited by the current limiting resistor R8, and a backflow current discharge path is formed through the voltage zener diode D1, thereby preventing current backflow, forming the first level of voltage stabilization overcurrent protection, and ensuring the stability and reliability of the circuit.

[0024] In this embodiment, the current limiting resistor R8 is the first current limiting resistor, which is added to the positive electrode of the voltage zener diode D1 to divide the voltage and limit the current, so that the current discharge of the voltage zener diode D1 is more stable, preventing excessive current from flowing into the switch module and burning the NOMS tube and the transistor, thereby achieving overcurrent protection.

[0025] The switch circuit includes n-stage cascaded switch circuit units, where n represents the number of stages of switch circuit units; in this embodiment, four-stage switch circuit units are used for illustration.

[0026] Specifically, the first-stage switch circuit unit includes an NMOS tube Q1, a small resistance resistor R1, a transistor T1, a sampling resistor R2 and a second current limiting resistor R3; the output end of the drive circuit is connected to the drain of the NMOS tube Q1, the gate of the NMOS tube Q1 is connected to a node between one end of the small resistance resistor R1 and the collector of the transistor T1, and the source of the NMOS tube Q1 is connected to a node between one end of the second current limiting resistor R3 and one end of the sampling resistor R2; the other end of the second current limiting resistor R3 is connected to the other end of the second current limiting resistor R6 in the second-stage switch circuit unit and is connected to GND; the other end of the small resistance resistor R1 is connected to the other end of the small resistance resistor R4 in the second-stage switch circuit unit, the base of the transistor T1 is connected to the other end of the sampling resistor R2, and the emitter of the transistor T1 is connected to a node between the second current limiting resistor R3 and the second current limiting resistor R6 in the second-stage switch circuit unit.

[0027] The second-stage switch circuit unit includes an NMOS tube Q2, a small resistance resistor R4, a transistor T2, a sampling resistor R5 and a second current-limiting resistor R6; the output end of the drive circuit is connected to the drain of the NMOS tube Q2, the gate of the NMOS tube Q2 is connected to the node between one end of the small resistance resistor R4 and the collector of the transistor T2, and the source of the NMOS tube Q2 is connected to the node between one end of the second current-limiting resistor R6 and one end of the sampling resistor R5; the other end of the second current-limiting resistor R6 is connected to the other end of the second current-limiting resistor R10 in the third-stage switch circuit unit and is connected to GND; the other end of the small resistance resistor R4 is connected to the other end of the small resistance resistor R7 in the third-stage switch circuit unit, the base of the transistor T2 is connected to the other end of the sampling resistor R5, and the emitter of the transistor T2 is connected to the node between the second current-limiting resistor R6 and the second current-limiting resistor R10 in the third-stage switch circuit unit.

[0028] The third-stage switch circuit unit includes an NMOS tube Q3, a small resistance resistor R7, a transistor T3, a sampling resistor R9 and a second current-limiting resistor R10; the output end of the drive circuit is connected to the drain of the NMOS tube Q3, the gate of the NMOS tube Q3 is connected to the node between one end of the small resistance resistor R7 and the collector of the transistor T3, and the source of the NMOS tube Q3 is connected to the node between one end of the second current-limiting resistor R10 and one end of the sampling resistor R9; the other end of the small resistance resistor R7 is connected to the other end of the small resistance resistor R11 in the fourth-stage switch circuit unit, the base of the transistor T3 is connected to the other end of the sampling resistor R9, and the emitter of the transistor T3 is connected to the node between the second current-limiting resistor R10 and the second current-limiting resistor R13 in the fourth-stage switch circuit unit.

[0029] The fourth-stage switch circuit unit includes an NMOS tube Q4, a small-resistance resistor R11, a transistor T4, a sampling resistor R12 and a second current-limiting resistor R13; the output end of the drive circuit is connected to the drain of the NMOS tube Q4, the gate of the NMOS tube Q4 is connected to a node between one end of the small-resistance resistor R11 and the collector of the transistor T4, the source of the NMOS tube Q4 is connected to a node between one end of the second current-limiting resistor R11 and one end of the sampling resistor R12; the other end of the small-resistance resistor R11 is connected to CONTRL, the base of the transistor T4 is connected to the other end of the sampling resistor R12, and the emitter of the transistor T4 is connected to a node between the current-limiting resistor R13 and GND.

[0030] In this embodiment, the level voltage of CONTRL is V(con), the turn-on voltage (threshold voltage) of the NMOS tube is VGS(th), and the turn-on voltage of the transistor, that is, the threshold voltage is V(be).

[0031] When the external voltage is lower than the threshold of the NMOS tube, the external trigger device outputs a low level signal CONTRL to the gate of the NMOS tube, that is, V(con) is less than the VGS(th) of the NMOS tube, and the NMOS tube is cut off.

[0032] When the external voltage is higher than the threshold of the NMOS tube, the external trigger device outputs a high-level signal CONTRL to the gate of the NMOS tube, that is, V(con) is greater than the VGS(th) of the NMOS tube, the NMOS tube is turned on, and the output current from the source of the NMOS tube is sampled through the sampling resistor. The sampling current is I R , the sampling voltage is V(s)=R(ohm)×I R When the sampling voltage is greater than the threshold voltage of the transistor, that is, V(s) is greater than V(be), the collector and emitter of the transistor are turned on, and the current is output from the emitter of the transistor to GND to discharge the large current, thus forming a second level of overcurrent protection.

[0033] In this embodiment, the double overcurrent protection described above can improve the safety and reliability of the switch double overcurrent protection circuit.

[0034] Since the impedance of the external trigger device is low and does not match the impedance of the signal line, in this embodiment, a small resistance resistor is set in each switching circuit unit in series with the CONTRL input terminal, which can not only reduce the steepness of the signal edge, but also weaken overshoot and enhance ESD protection.

[0035] In this embodiment, the current limiting resistors R3, R6, R10 and R13 are all second current limiting resistors. In each stage of the switching circuit unit, one end of the second current limiting resistor is connected to the source of the NMOS tube, and the other end is connected to GND to achieve voltage division overcurrent protection.

[0036] According to actual needs, the number of switch units in the switch circuit can be adjusted accordingly; it should be noted that the switch circuit should include at least two inductor groups, that is, n is greater than or equal to 2.

[0037] Embodiment 2

[0038] See also Figure 2 Compared with the technical solution of the first embodiment, the second embodiment differs in that: the driving circuit in the present embodiment includes two inductance groups, namely the first inductance group and the second inductance group; the first inductance group includes inductances L connected in series with each other 1 and inductor L 2 The second inductor group includes an inductor L3 and an inductor L4 connected in series; one end of the inductor L1 and the inductor L3 are connected together and connected to the output end of the load RL as the input end of the drive circuit; one end of the inductor L2 and the inductor L4 are connected together and connected to the input end of the switch circuit as the output end of the drive circuit.

[0039] When powered on, the currents of inductor L1, inductor L2, inductor L3, and inductor L4 are I 1 ,I 2 ,I 3 ,I 4 , the voltages are U 1 , U 2 , U 3 , U 4 ; Since the inductor L1 and the inductor L2 are connected in series, the total current of the first inductor group is I 12 =I 1 =I 2 , the total voltage of the first inductor group U 12 =U 1 +U 2 Since the inductor L3 and the inductor L4 are connected in series, the total current of the second inductor group is I 34 =I 3 =I 4 , the total voltage of the second inductor group U 34 =U 3 +U 4 ; The total current of the driving circuit I 总 =I 12 +I 34 , the total voltage of the drive circuit U 总 =U 12 =U 34 , the total power of the driving circuit P 总 =I 总 ×U 总 It can be seen that the number of inductors in this embodiment is the same as that in the first embodiment, and the total power of the driving circuit is the same. However, since the inductors in this embodiment are first connected in series to form two inductor groups, and then the two inductor groups are connected in parallel, the current of each inductor in this embodiment is greater than the current of each inductor in the first embodiment, thereby further meeting the needs of high-power switches.

[0040] The above-mentioned embodiments of the utility model are not intended to limit the protection scope of the utility model, and the implementation methods of the utility model are not limited to these. All other various forms of modifications, replacements or changes made to the above-mentioned structure of the utility model based on the above-mentioned contents of the utility model, in accordance with the common technical knowledge and customary means in the field, without departing from the above-mentioned basic technical ideas of the utility model, should fall within the protection scope of the utility model.

Claims

1. A switch double overcurrent protection circuit, characterized in that: It includes a load RL, a power supply VCC connected to the input end of the load RL, and a driving circuit connected to the input end of the load RL. A clamping circuit is connected in parallel at both ends of the driving circuit. The clamping circuit is used to keep the current of the driving circuit constant and clamp the level of the output end of the driving circuit at a stable potential. The output end of the driving circuit is connected to a switching circuit. The switching circuit includes switching circuit units that are cascaded with each other and are used to discharge overcurrent electrical energy.

2. The switch double overcurrent protection circuit according to claim 1, characterized in that: The clamping circuit includes a voltage-limiting diode D1, a first current-limiting resistor R8 and a capacitor C1, the cathode of the voltage-limiting diode D1 and one end of the capacitor C1 are connected to the input end of the drive circuit, the anode of the voltage-limiting diode D1 is connected to one end of the first current-limiting resistor R8, and the other end of the first current-limiting resistor R8 and the other end of the capacitor C1 are connected to the output end of the drive circuit.

3. The switch double overcurrent protection circuit according to claim 1, characterized in that: Each level of the switch circuit unit includes an NMOS tube, a small resistance resistor, a triode, a second current limiting resistor and a sampling resistor; The output end of the driving circuit is connected to the drain of the NMOS tube, the gate of the NMOS tube is connected to the node between the small resistance resistor and the collector of the transistor, the source of the NMOS tube is connected to the node between the sampling resistor and the second current limiting resistor, the base of the transistor is connected to the other end of the sampling resistor, the emitter is connected to the other end of the second current limiting resistor and the node between the emitter of the transistor in the secondary switch circuit unit and the second current limiting resistor; the other end of the small resistance resistor is connected to the other end of the small resistance resistor in the secondary switch circuit unit; the emitter of the transistor located in the final switch circuit unit is connected to the other end of the second current limiting resistor to GND.

4. The switch double overcurrent protection circuit according to claim 1, characterized in that: The driving circuit includes at least two inductance groups, which are connected in parallel to form an input end of the driving circuit connected to an output end of a load RL, and an output end of the driving circuit connected to an input end of a switch circuit.

5. The switch double overcurrent protection circuit according to claim 4, characterized in that: Each of the inductor groups includes at least two inductors, and the inductors in the same inductor group are connected in series.