Array substrate, display panel and display equipment

Abstract

The utility model provides an array substrate, a display panel and display equipment. The array substrate comprises a substrate body, the substrate body is provided with a display area and a bonding pad area, and the bonding pad area is located on one side of the display area; the bonding pads are arranged on the surface of one side of the substrate and located in the bonding pad area; the insulating layer is located on the side, away from the substrate, of the bonding pad, the insulating layer is provided with an opening, the bonding pad is exposed in the opening, the side wall, closest to the display area, of the side walls of the opening is the first side wall, and the minimum distance between the bonding pad and the first side wall is larger than or equal to 40 micrometers and smaller than or equal to 80 micrometers. According to the array substrate, the signal lines are not prone to being broken, and the protection effect on the signal lines is better.

Description

Technical Field

[0001] The present disclosure relates to the field of display technology, and in particular to an array substrate, a display panel and a display device. Background Art

[0002] In existing touch display panels, in order to achieve circuit connection between integrated circuits and other structures, after the array substrate and the color filter substrate are aligned, part of the color filter substrate needs to be cut off to expose the corresponding array substrate. In order to protect the conductive wires on the array substrate from scratches during the cutting process, the passivation layer, organic film, etc. will be covered to protect the wires on the array substrate. However, the passivation layer, organic film and other film layers need to be dug in the pad area and a certain gap is reserved to facilitate binding with the pad, which makes it easy for the conductive wires on the array substrate to be damaged when the color filter is subsequently cut off. Utility Model Content

[0003] The present disclosure aims to solve at least one of the technical problems existing in the prior art, and proposes an array substrate, a display panel and a display device.

[0004] In order to achieve the above objective, according to one aspect of the present disclosure, an array substrate is provided, comprising:

[0005] A base substrate, the base substrate having a display area and a pad area, wherein the pad area is located on one side of the display area;

[0006] A plurality of pads, wherein the pads are arranged on a side surface of the substrate and are located in the pad area;

[0007] An insulating layer, wherein the insulating layer is located on a side of the pad away from the base substrate, the insulating layer has an opening, the pad is exposed in the opening, the side wall of the opening closest to the display area is a first side wall, and the minimum distance from the pad to the first side wall is greater than or equal to 40um and less than or equal to 80um.

[0008] In some optional embodiments, the base substrate further has a peripheral area and a fan-out area, the peripheral area is arranged around the display area, the pad area is located on a side of the peripheral area away from the display area, the fan-out area is located between the pad area and the peripheral area, the orthographic projection of the opening on the base substrate overlaps with the pad area and the fan-out area, and the orthographic projection of the first side wall on the base substrate is located in the fan-out area.

[0009] In some optional embodiments, the plurality of pads include a first pad, and the array substrate further includes a plurality of touch leads, and the touch leads are configured to connect the first pad to the touch electrodes in the display area.

[0010] In some optional embodiments, the array substrate further includes a plurality of protection lines, the protection lines are located on a side of the insulating layer away from the base substrate, and the orthographic projection of the protection lines on the base substrate overlaps with the orthographic projection of the touch leads on the base substrate.

[0011] In some optional embodiments, the width of the protection line is greater than the width of the touch lead.

[0012] In some optional embodiments, the orthographic projection of the protection line on the insulating layer is located between the opening and the display area, and the orthographic projection of the protection line on the insulating layer is spaced apart from the opening.

[0013] In some optional embodiments, a minimum distance between an orthographic projection of the protection line on the insulating layer and the first side wall is greater than or equal to 10 um and less than or equal to 50 um.

[0014] In some optional embodiments, the material of the protection line is a metal oxide material.

[0015] In some optional embodiments, the array substrate has an exposed area corresponding to the cutting area of ​​the color film substrate, the exposed area is spaced apart from the display area, and the exposed area overlaps with the fan-out area and the pad area, and the minimum distance between the edge of the exposed area facing the display area and the protective line is greater than or equal to 200um.

[0016] In some optional embodiments, the array substrate further includes a plurality of data lines, and the data lines are in the same layer as the touch leads.

[0017] In some optional embodiments, the array substrate further includes a common electrode, which is disposed on the base substrate, and the common electrode is located in the peripheral area and surrounds the display area.

[0018] In some optional embodiments, the plurality of pads include a second pad, the second pad is disposed on a side of the first pad away from the display area, and the second pad is used for binding a flexible circuit board.

[0019] In some optional embodiments, the insulating layer includes an organic film layer and a passivation layer, the organic film layer is disposed on the base substrate, and the passivation layer is disposed on a side of the organic film layer away from the base substrate.

[0020] According to another aspect of the present disclosure, a display panel is provided, comprising the above array substrate.

[0021] According to yet another aspect of the present disclosure, a display device is provided, comprising the above-mentioned display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the following specific embodiments, they are used to explain the present disclosure but do not constitute a limitation of the present disclosure. In the accompanying drawings:

[0023] Figure 1 A schematic structural diagram of an array substrate according to an optional embodiment of the present disclosure is shown;

[0024] Figure 2 A schematic diagram showing the positional relationship between an opening on an insulating layer and a pad in an optional embodiment of the present disclosure is shown;

[0025] Figure 3 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0026] Figure 4 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0027] Figure 5 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0028] Figure 6 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0029] Figure 7 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0030] Figure 8 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0031] Fig. 9 A circuit diagram showing a structure in which a touch lead and a source-drain metal layer are not short-circuited in the present disclosure;

[0032] Fig.10 A circuit diagram of a structure in which a touch lead and a source-drain metal layer are short-circuited is shown in the present disclosure.

[0033] 10. Base substrate; 11. Display area; 12. Pad area; 13. Peripheral area; 14. Fan-out area; 15. Exposure area; 20. Pad; 21. First pad; 22. Second pad; 30. Insulation layer; 31. Opening; 311. First side wall; 40. Touch lead; 41. First lead segment; 411. First sub-segment; 412. Second sub-segment; 413. Third sub-segment; 414. Fourth sub-segment; 42. Second lead segment; 50. Protection line; 51. First segment; 52. Second segment; 60. Common electrode; 80. Data line; 90. Gate control module; 100. Light emitting control module; 110. Scan signal line; 120. Light emitting control signal line; 130. Test line; 140. Detection terminal; 150. Ground line. DETAILED DESCRIPTION

[0034] The specific implementation of the present disclosure is described in detail below in conjunction with the accompanying drawings. It should be understood that the specific implementation described herein is only used to illustrate and explain the present disclosure, and is not used to limit the present disclosure.

[0035] In order to make the purpose, technical solution and advantages of the embodiments of the present disclosure clearer, the technical solution of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0036] Unless otherwise defined, the technical terms or scientific terms used in the embodiments of the present disclosure should be understood by people with ordinary skills in the field to which the present disclosure belongs. The "first", "second" and similar words used in the present disclosure do not represent any order, quantity or importance, but are only used to distinguish different components. Similarly, "including" or "comprising" and similar words mean that the elements or objects appearing in front of the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. "Connect" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect. "Up", "down", "left", "right" and the like are only used to indicate relative positional relationships. When the absolute position of the described object changes, the relative positional relationship may also change accordingly.

[0037] As used herein, "parallel" and "perpendicular" include the described situation and the situation similar to the described situation, and the range of the similar situation is within the acceptable deviation range, wherein the acceptable deviation range is determined by a person of ordinary skill in the art taking into account the measurement in question and the error associated with the measurement of a specific quantity (i.e., the limitations of the measurement system). For example, "parallel" includes absolute parallelism and approximate parallelism, wherein the acceptable deviation range of approximate parallelism can be, for example, a deviation within 5°; "perpendicular" includes absolute perpendicularity and approximate perpendicularity, wherein the acceptable deviation range of approximate perpendicularity can also be, for example, a deviation within 5°.

[0038] It will be understood that when a layer or an element is referred to as being on another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may be present between the layer or element and the other layer or substrate.

[0039] Exemplary embodiments are described herein with reference to cross-sectional views and / or plan views that are idealized exemplary drawings. In the drawings, the thickness of layers and regions are exaggerated for clarity. Therefore, variations in shape relative to the drawings due to, for example, manufacturing techniques and / or tolerances are conceivable. Therefore, the exemplary embodiments should not be interpreted as being limited to the shapes of the regions shown herein, but include deviations in shape due to, for example, manufacturing. Therefore, the regions shown in the drawings are schematic in nature, and their shapes are not intended to illustrate the actual shapes of regions of the device, and are not intended to limit the scope of the exemplary embodiments.

[0040] In some touch display panels, the capacitance control of each touch unit is achieved by connecting the touch electrodes to the touch leads, and connecting the touch leads to the integrated circuit. When the user's hand or stylus touches the display screen, the capacitance at the corresponding position changes, which is detected and recognized by the integrated circuit to achieve the positioning function.

[0041] In order to realize the circuit connection between the integrated circuit and the display panel, after the array substrate and the color filter substrate are aligned, part of the color filter substrate needs to be cut off to expose the corresponding array substrate. In order to protect the wires on the array substrate from scratches during cutting and module manufacturing or bombardment damage caused by plasma during cleaning. The passivation layer PVX, organic film ORG and metal protective layer are used for protection. The organic film is thicker, about 1000mm thick. The protective effect on wires is the most obvious. Considering process fluctuations, the above film layer needs to be dug in the pad area and a certain bonding gap is reserved.

[0042] Due to the reserved binding gap, the organic film ORG cannot 100% cover the touch leads in the fan-out area, and the metal protective layer is affected by the process and often has a certain amount of residue (the metal protective layer exceeds the designed position or the metal protective layer remains in the position where there is no metal protective layer designed). As a result, there is a metal protective layer on and outside the boundary of the organic film dug out in the fan-out area. The two are only isolated by the passivation layer, which is prone to single-point touch noise. It is analyzed that the metal protective layer is damaged by scratches or plasma cleaning process, resulting in a short circuit between the touch lead at the boundary of the organic film in the fan-out area and the metal protective layer, causing the touch lead in a single abnormal position to be easily coupled by the data line, abnormal capacitance, and abnormal noise.

[0043] exist Fig. 9 In the example, if there is no short circuit between the touch lead 40 and the source / drain metal layer SD, each touch lead 40 and the source / drain metal layer SD have coupling capacitors, and the capacitance is uniform, so the noise value difference is small. If there is a short circuit between the touch lead and the metal protection layer, please refer to Fig.10 , which causes the touch lead 40 at a single position to be easily coupled by the source-drain metal layer SD, resulting in abnormal capacitance and large differences in noise values.

[0044] Figure 1 A schematic structural diagram of an array substrate according to an optional embodiment of the present disclosure is shown; Figure 2 A schematic diagram showing the positional relationship between an opening on an insulating layer and a pad in an optional embodiment of the present disclosure is shown; Figure 3 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown; Figure 4 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown;

[0045] Figure 5 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown; Figure 6 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown; Figure 7 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown; Figure 8 A schematic diagram showing the positional relationship between the opening on the insulating layer and the pad in another optional embodiment of the present disclosure is shown.

[0046] exist Figure 1 and Figure 2In the specific embodiment shown, the array substrate includes a base substrate 10, a plurality of pads 20 and an insulating layer 30, the base substrate 10 having a display area 11 and a pad area 12, the pad area 12 being located on one side of the display area 11; the pads 20 are arranged on a surface of one side of the base substrate 10 and are located in the pad area 12, and each pad 20 is configured to electrically connect a signal line extending from the display area 11 or the peripheral area 13.

[0047] The insulating layer 30 is located on a side of the pad 20 away from the base substrate 10, and the insulating layer 30 has an opening 31, and the pad 20 is exposed in the opening 31. The side wall of the opening 31 closest to the display area 11 is the first side wall 311, and the minimum distance ① from the pad 20 to the first side wall 311 is greater than or equal to 40um and less than or equal to 80um. By providing the opening 31 on the insulating layer 30, the pad 20 is exposed in the opening 31 and is not covered by the insulating layer 30, so that the pad 20 is conveniently electrically connected to the flexible circuit board, and the flexible circuit board is electrically connected to the external controller and is configured to transmit signals or power from the external controller.

[0048] If the minimum distance between the first side wall 311 of the opening 31 and the pad 20 is less than 40um, the distance between the pad 20 and the first side wall 311 is small, which is not conducive to the connection between the signal line and the pad 20. If the minimum distance between the first side wall 311 of the opening 31 and the pad 20 is greater than 80um, the area of ​​the opening 31 is large, which may cause the signal line to be exposed too much in the opening 31, reduce the protection effect on the signal line, and easily cause the signal line to be damaged when the color filter substrate is cut later. The minimum distance between the first side wall 311 of the opening 31 and the pad 20 is limited to the range of 40um to 80um, while not affecting the connection between the signal line and the pad 20, the protection effect on the signal line is improved to reduce the damage to the signal line. For example, the minimum distance between the first side wall 311 and the pad 20 is 50um, 60um, or 70um.

[0049] It should be noted that the pad area 12 refers to the area occupied by the pad 20 .

[0050] In some optional embodiments, the shape of the opening 31 matches the shape of the pad area 12, for example, the shape of the opening 31 is the same as the shape of the pad area 12. For another example, if the pad area 12 is rectangular, then the shape of the opening 31 is rectangular, see Figures 2 to 6 For another example, if the shape of the pad area 12 is a chamfered rectangle, then the shape of the opening 31 is a chamfered rectangle. Figure 7 and Figure 8 .

[0051] Optionally, the opening 31 may be realized by a patterning process.

[0052] In some alternative embodiments, see Figure 2 The base substrate 10 also has a peripheral area 13 and a fan-out area 14. The peripheral area 13 is arranged around the display area 11. The pad area 12 is located on the side of the peripheral area 13 away from the display area 11. The fan-out area 14 is located between the pad area 12 and the peripheral area 13. The orthographic projection of the opening 31 on the base substrate 10 overlaps with the pad area 12 and the fan-out area 14. The orthographic projection of the first side wall 311 on the base substrate 10 is located in the fan-out area 14. A plurality of signal lines drawn from the display area 11 are gathered through the peripheral area 13 and the fan-out area 14 and extend to the pad area 12. For example, the touch lead is gathered through the peripheral area 13 and the fan-out area 14 and extends to the pad area 12, and is connected to the pad 20 on the pad area 12. The orthographic projection of the first side wall 311 on the base substrate 10 is located in the fan-out area 14, which is conducive to the connection between the signal line and the pad 20.

[0053] In some alternative embodiments, see Figure 2 , the plurality of pads 20 include a first pad 21, and the array substrate further includes a plurality of touch leads 40, which are configured to connect the first pad 21 with the touch electrodes in the display area 11. Not all pads 20 are connected to the touch leads 40, the first pad 21 in the plurality of pads 20 is connected to the touch leads 40, and some pads 20 are connected to other signal lines or other structures. For example, the plurality of pads 20 further include a second pad 22, and the second pad 22 is used to bind the flexible circuit board.

[0054] exist Figure 2 In the specific embodiment shown, the touch lead 40 includes a first lead segment 41 and multiple second lead segments 42, each second lead segment 42 is connected to at least one touch electrode in the display area, and multiple second lead segments 42 are connected to the first lead segment 41, and the first lead segment 41 is connected to the first pad 21.

[0055] If the present disclosure adopts self-capacitive touch, then one second lead segment 42 is connected to one touch electrode, and a plurality of touch electrodes are arranged in an array.

[0056] If the present disclosure adopts mutual capacitance touch, the touch electrode includes a first touch electrode and a second touch electrode, and the touch lead 40 is divided into a first touch lead and a second touch lead, the first touch lead is connected to the first touch electrode and the first pad, and the second touch lead is connected to the second electrode and the first pad. A plurality of first touch electrodes are arranged at intervals along a first direction, and the first touch electrode has a plurality of first electrode blocks arranged along a second direction, and the first touch lead is connected to all the first electrode blocks in the first touch electrode. A plurality of second touch electrodes are arranged at intervals along a second direction, and the second touch electrode has a plurality of second electrode blocks arranged along the first direction, and the second touch lead is connected to all the second electrode blocks in the second touch electrode. The first touch lead and the second touch lead can also be Figure 2For example, the first touch lead and the second touch lead both include a first lead segment 41 and a second lead segment 42, the second lead segment 42 of the first touch lead is connected to the first touch electrode, and the second lead segment 42 of the second touch lead is connected to the second touch electrode.

[0057] It should be noted that one of the first touch electrode and the second touch electrode is a touch electrode (TX), and the other is a sensing electrode (RX). The plurality of first pads 21 are connected to the plurality of touch leads 40 in a one-to-one correspondence.

[0058] exist Figure 2 In the specific embodiment shown, the first lead segment 41 includes a first sub-segment 411, a second sub-segment 412, a third sub-segment 413 and a fourth sub-segment 414 connected in sequence, the first sub-segment 411 is connected to a plurality of second lead segments 42, the second sub-segment 412 is connected to the first sub-segment 411 at an angle, for example, the second sub-segment 412 is perpendicular to the first sub-segment 411. The second sub-segment 412 is connected to the third sub-segment 413 at an angle, for example, the connection angle formed by the second sub-segment 412 and the third sub-segment 413 is an obtuse angle. The third sub-segment 413 is connected to the fourth sub-segment 414 at an angle, for example, the connection angle formed by the third sub-segment 413 and the fourth sub-segment 414 is an obtuse angle. The fourth sub-segment 414 is connected to the first pad 21.

[0059] In some alternative embodiments, see Figures 3 to 8 The array substrate further includes a plurality of protection lines 50, which are located on a side of the insulating layer 30 away from the base substrate 10, and the orthographic projection of the protection line 50 on the base substrate 10 overlaps with the orthographic projection of the touch lead 40 on the base substrate 10. By providing a plurality of protection lines 50 on the array substrate, the protection of the touch lead 40 can be further improved, and damage to the touch lead 40 in the process steps after the touch lead 40 is formed can be avoided, thereby improving the yield of the touch lead 40.

[0060] It should be noted that when a mutual capacitive touch structure is used in a display device, the protection line 50 can protect at least one of the first touch lead and the second touch lead. No specific limitation is made here. It is only necessary to add the protection line 50 to protect the touch lead 40.

[0061] It should be noted that the orthographic projection of the protection line 50 on the base substrate 10 is located in the fan-out area 14 to avoid damage to the touch lead 40 when the color filter substrate is subsequently removed.

[0062] In some other optional embodiments, the protection line 50 is a straight line, and the protection line 50 is parallel to the third sub-line segment 413. Figure 3 and Figure 4 .

[0063] In some optional embodiments, the protection line 50 includes a first line segment 51 and a second line segment 52, the first line segment 51 is parallel to the third sub-line segment 413, and the second line segment 52 is parallel to the fourth sub-line segment 414, see Figures 5 to 8 .

[0064] It should be noted that the shape formed by the edges of the plurality of protection lines 50 toward the pad area 12 may match or may not match the shape of the first side wall 311 of the opening 31, and no specific limitation is made here. In some optional embodiments, the width of the protection line 50 is greater than the width of the touch lead 40. Such a setting can improve the protection effect of the protection line 50 on the touch lead 40. It should be noted that the width of the protection line 50 refers to the length perpendicular to the extension direction of the protection line 50. The width of the touch lead 40 refers to the length perpendicular to the extension direction of the touch lead 40.

[0065] In some optional embodiments, the material of the protection line 50 is metal oxide. Since the hardness of the metal oxide is high, it is not easy to damage the protection line 50 when the color filter substrate is cut, thereby improving the protection effect of the protection line 50 on the touch lead 40. For example, the material of the protection line 50 is ITO. Since the hardness of the metal material is greater than that of the insulating layer 30, it is not easy to be etched away, so that the protection line 50 has a better protection effect on the touch lead 40.

[0066] In some alternative embodiments, see Figure 3 and Figure 4 , the orthographic projection of the protection line 50 on the insulating layer 30 is located between the opening 31 and the display area 11, and the orthographic projection of the protection line 50 on the insulating layer 30 is spaced from the opening 31. If the protection line 50 is exposed in the opening 31, under the influence of some metal residues, it is easy to conduct between the protection line 50 and the touch lead 40, causing a short circuit between the two, and then causing abnormal noise in the subsequent detection process, affecting the yield of the display device. The present disclosure separates the orthographic projection of the protection line 50 on the insulating layer 30 from the opening 31 to avoid the protection line 50 being exposed in the opening 31 and the risk of a short circuit between the touch lead 40 and the protection line 50.

[0067] In some alternative embodiments, see Figure 3 and Figure 4, the minimum distance ② between the orthographic projection of the protection line 50 on the insulating layer 30 and the first side wall 311 is greater than or equal to 10um and less than or equal to 50um. If the minimum distance ② between the orthographic projection of the protection line 50 on the insulating layer 30 and the first side wall 311 is less than 10um, it is easy to cause the protection line 50 to be exposed in the opening 31, and then it is easy to cause a short circuit between the protection line 50 and the touch lead 40. If the minimum distance between the orthographic projection of the protection line 50 on the insulating layer 30 and the first side wall 311 is greater than 50um, it will cause the protection line 50 to cover a smaller range of the touch lead 40, and the protection effect on the touch lead 40 is poor. The minimum distance between the orthographic projection of the protection line 50 on the insulating layer 30 and the first side wall 311 is limited to the range of 10um to 50um, while reducing the risk of short circuit between the protection line 50 and the touch lead 40, the protection effect of the protection line 50 on the touch lead 40 is guaranteed. For example, the minimum distance between the orthographic projection of the protection line 50 on the insulating layer 30 and the first side wall 311 is 20um, 30um, or 40um. Preferably, the distance between the orthographic projection of the protection line 50 on the insulating layer 30 and the first side wall 311 at all locations is equal.

[0068] In some alternative embodiments, see Figure 4 The array substrate has an exposed area 15 corresponding to the cutting area of ​​the color filter substrate. The exposed area 15 is spaced apart from the display area 11, and the exposed area 15 overlaps with the fan-out area 14 and the pad area 12. The minimum distance ③ between the edge of the exposed area 15 facing the display area 11 and the protection line 50 is greater than or equal to 200um, ensuring that there is no metal within 100μm on both sides of the cutting line of the color filter substrate. The edge of the exposed area 15 facing the display area 11 is located between the protection line 50 and the display area 11, and the minimum distance between the edge of the exposed area 15 facing the display area 11 and the protection line 50 is greater than or equal to 200um, so as to avoid cutting the protection line 50 when cutting the color filter substrate, thereby improving the protection effect of the protection line 50 on the touch lead 40.

[0069] In some optional embodiments, the protection line 50 is an independent layer, or in other words, the protection line 50 is a different layer from other structures.

[0070] In some other optional embodiments, when the array substrate is used in a liquid crystal display device, the array substrate also includes a first electrode layer and a second electrode layer, and the first electrode layer and the second electrode layer are configured to form a fringe field for driving liquid crystal molecules in the liquid crystal layer. The protection line 50 is located in the second electrode layer, and it is only necessary to ensure that the protection line 50 is not connected to other wirings and electrodes, and to ensure that the protection line 50 is an isolated floating structure, which only serves to cover and protect the touch lead 40.

[0071] It should be noted that the exposed area 15 refers to the area exposed after the color filter substrate is removed after the array substrate is aligned with the color filter substrate, and the exposed area 15 is not independent of the fan-out area 14 and the pad area 12. In other words, the fan-out area 14 and the pad area 12 exposed after the color filter substrate is removed after the array substrate is aligned with the color filter substrate are used as the exposed area 15.

[0072] In some optional embodiments, the array substrate further includes a plurality of data lines 80, and the data lines 80 are in the same layer as the touch leads 40. Such an arrangement can reasonably utilize the space on the base substrate 10, which is conducive to miniaturization of the array substrate.

[0073] In some optional embodiments, the data line 80 is parallel to the touch lead 40. This arrangement can avoid interference between the data line 80 and the touch lead 40, thereby preventing the display performance from being affected.

[0074] In some optional embodiments, the array substrate further includes a common electrode 60 . The common electrode 60 is disposed on the base substrate 10 , and the common electrode 60 is located in the peripheral area 13 and surrounds the display area 11 .

[0075] In some optional embodiments, the plurality of pads 20 include a second pad 22, and the second pad 22 is disposed on a side of the first pad 21 away from the display area 11, and the second pad 22 is used to bind the flexible circuit board so that the flexible circuit board is exposed in the opening 31. In the present disclosure, the signal line includes a touch lead 40, a drive signal line, a data line 80 and other signal lines, and the pad 20 is electrically connected to each signal line, so that the signal line and the flexible circuit board can communicate with each other, and the number and arrangement of the pads 20 are not specifically limited here. It should be noted that the pads connected to different signal lines are different pads. For example, the pad 20 connected to the touch lead 40 is the first pad, the pad connected to the data line 80 is the third pad, and the pad connected to the drive signal line is the fourth pad. There is no specific limitation here, and the signal line is connected to the pad 20 according to specific needs.

[0076] In some optional embodiments, the array substrate further includes at least one gate control module 90 and at least one light emitting control module 100, and the gate control module 90 and the light emitting control module 100 are located in the peripheral area 13. The gate control module 90 and the light emitting control module 100 can be located on the same side of the display area 11, or on two opposite sides of the display area 11, and no specific limitation is made here.

[0077] The gate control module 90 includes a plurality of cascaded gate shift registers for providing gate scanning signals to the pixel units row by row, and the light control module 100 includes a plurality of cascaded light control shift registers for providing light control signals to the pixel units row by row. The array substrate also includes a plurality of scanning signal lines 110 and a plurality of light control signal lines 120, one scanning signal line 110 is connected to a row of pixel units located in the display area 11 and is connected to a first-level gate shift register, and one light control signal line 120 is connected to a row of pixel units and is connected to a first-level light control shift register. In addition, the gate control module 90 is connected to the pad 20 through the relevant signal line in the gate shift register corresponding to the starting row, and the light control signal line 120 is connected to the corresponding pad 20 through the relevant signal line in the light control shift register corresponding to the starting row.

[0078] The plurality of signal lines include a data line 80 . One data line 80 is connected to a column of pixel units in the display area and is connected to the pad 20 through the peripheral area 13 and the fan-out area 14 .

[0079] The multiple signal lines include multiple test lines 130, which are located in the peripheral area 13 and are arranged around the display area 11. At the same time, the pad area 12 has multiple detection terminals 140 connected to the test lines 130. The test lines 130 are connected to the detection terminals 140 for lighting tests in the single panel status detection process.

[0080] The plurality of signal lines further include a ground line 150 , which is located on a side of the test line 130 away from the display area and surrounds the test line 130 . Both ends of the ground line 150 are connected to the flexible circuit board.

[0081] In some optional embodiments, the touch lead 40 is connected to the first pad, and the first pad is connected to the driving chip. The driving chip is used to send a control signal to the touch lead 40 so that the display panel can realize the touch function.

[0082] In some optional embodiments, the base substrate 10 and the driving chip are bonded and connected by anisotropic conductive film through a COG (Chipon glass) process.

[0083] In some other optional embodiments, the driving chip and the flexible circuit board are connected by FOG (Film on Glass) binding using anisotropic conductive film.

[0084] In some optional embodiments, the insulating layer 30 includes an organic film layer and a passivation layer, the organic film layer is disposed on the base substrate 10, the passivation layer is disposed on a side of the organic film layer away from the base substrate 10, and the thickness of the passivation layer is less than the thickness of the organic film layer, so that the organic film layer protects the signal line on the base substrate 10. In addition, the touch lead 40 is located between the organic film layer and the base substrate 10, and the protection line 50 is located on a side of the passivation layer away from the base substrate 10.

[0085] In another aspect, the present disclosure provides a display panel, including the above-mentioned array substrate. For example, the display panel is a liquid crystal display panel, and the liquid crystal display panel also includes a color filter substrate, and each sub-pixel on the color filter substrate is provided with a color filter (color filter, Color Filter) of a corresponding color, and the white light passing through the color filter will be converted into light of the corresponding color, and the display can be achieved by controlling the light transmission from each sub-pixel.

[0086] Polarizers with perpendicular transmission directions are arranged on the outside of the color filter substrate and the array substrate. There is a liquid crystal material layer between the color filter substrate and the array substrate. The liquid crystal material can flow like a liquid and has certain crystal characteristics. It is usually a long "rod-shaped" molecule. When the liquid crystal molecules are arranged in a specific orientation, the polarization direction of the linear polarized light passing through them can be changed. This change is related to the arrangement of the liquid crystal molecules. When the liquid crystal molecules are in an electric field, their arrangement direction will change according to the change of the electric field.

[0087] Polarizers with mutually perpendicular transmission directions are arranged on the outside of the two substrates (color film + array), and a liquid crystal material layer is arranged between the two substrates. The light from the backlight source becomes linearly polarized light after passing through the lower polarizer on the array substrate. At the same time, different electric fields are applied to the liquid crystal materials at different positions to make the liquid crystal materials at different positions produce different deflections, thereby making the polarization directions of the linear polarized light produce different deflections, so that the linear polarized light has different transmittance when passing through the upper polarizer on the color film substrate, thereby causing different brightness of the light emitted from different positions to achieve display.

[0088] In another aspect, the present disclosure provides a display device, the display device includes the above-mentioned display panel. For example, the display device is a liquid crystal display device, the liquid crystal display device includes a backlight source and the above-mentioned display panel, the backlight source is used to emit white light from the back of the display panel to the front, and the light can be seen by human eyes through the display panel.

[0089] The backlight source can be located directly below the display panel or on one side of the display panel, and there is no specific limitation here. The backlight source includes a light source, a light guide plate, and an optical film layer. The light guide plate is used to convert the light emitted by the light source into a surface light source, which is conducive to the uniform emission of light from the "light emitting surface". The light guide plate is usually made of polymethyl methacrylate (PMMA). The optical film layer is used to change the reflection and scattering of light, etc., and can be selected according to specific usage requirements. For example, light emitted from surfaces other than the light emitting surface is reflected back into the light guide plate to improve light utilization.

[0090] It is to be understood that the above embodiments are merely exemplary embodiments used to illustrate the principles of the present disclosure, but the present disclosure is not limited thereto. For those of ordinary skill in the art, various modifications and improvements can be made without departing from the spirit and substance of the present disclosure, and these modifications and improvements are also considered to be within the scope of protection of the present disclosure.

Claims

1. An array substrate, characterized in that: include: A base substrate, the base substrate having a display area and a pad area, wherein the pad area is located on one side of the display area; A plurality of pads, wherein the pads are arranged on a side surface of the substrate and are located in the pad area; An insulating layer, wherein the insulating layer is located on a side of the pad away from the base substrate, the insulating layer has an opening, the pad is exposed in the opening, the side wall of the opening closest to the display area is a first side wall, and the minimum distance from the pad to the first side wall is greater than or equal to 40um and less than or equal to 80um.

2. The array substrate according to claim 1, characterized in that: The base substrate also has a peripheral area and a fan-out area, the peripheral area is arranged around the display area, the pad area is located on a side of the peripheral area away from the display area, the fan-out area is located between the pad area and the peripheral area, the orthographic projection of the opening on the base substrate overlaps with the pad area and the fan-out area, and the orthographic projection of the first side wall on the base substrate is located in the fan-out area.

3. The array substrate according to claim 2, characterized in that: The plurality of pads include a first pad, and the array substrate further includes a plurality of touch leads, wherein the touch leads are configured to connect the first pad and the touch electrodes in the display area.

4. The array substrate according to claim 3, characterized in that: The array substrate further includes a plurality of protection lines, the protection lines are located on a side of the insulating layer away from the base substrate, and the orthographic projections of the protection lines on the base substrate overlap with the orthographic projections of the touch leads on the base substrate.

5. The array substrate according to claim 4, characterized in that: The width of the protection line is greater than the width of the touch lead line.

6. The array substrate according to claim 4, characterized in that: The orthographic projection of the protection line on the insulating layer is located between the opening and the display area, and the orthographic projection of the protection line on the insulating layer is spaced apart from the opening.

7. The array substrate according to claim 6, characterized in that: A minimum distance between an orthographic projection of the protection line on the insulating layer and the first side wall is greater than or equal to 10 um and less than or equal to 50 um.

8. The array substrate according to claim 4, characterized in that: The material of the protection line is a metal oxide material.

9. The array substrate according to claim 4, characterized in that: The array substrate has an exposed area corresponding to the cutting area of ​​the color film substrate, the exposed area is spaced apart from the display area, and the exposed area overlaps with the fan-out area and the pad area, and the minimum distance between the edge of the exposed area facing the display area and the protective line is greater than or equal to 200um.

10. The array substrate according to any one of claims 3 to 9, characterized in that: The array substrate further includes a plurality of data lines, and the data lines and the touch control leads are in the same layer.

11. The array substrate according to any one of claims 3 to 9, characterized in that: The array substrate further comprises a common electrode, which is arranged on the base substrate and is located in the peripheral area and surrounds the display area.

12. The array substrate according to any one of claims 3 to 9, characterized in that: The plurality of pads include a second pad, the second pad is arranged on a side of the first pad away from the display area, and the second pad is used for binding a flexible circuit board.

13. The array substrate according to any one of claims 1 to 9, characterized in that: The insulating layer includes an organic film layer and a passivation layer. The organic film layer is arranged on the base substrate. The passivation layer is arranged on a side of the organic film layer away from the base substrate.

14. A display panel, characterized in that: The invention comprises the array substrate according to any one of claims 1 to 13.

15. A display device, characterized in that: Comprising the display panel as claimed in claim 14.

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