Class-D power amplifier control circuit and class-D power amplifier
By using separate first and second amplifier units in Class D amplifiers to process high and low frequency audio data, the problem of large heat generation of Class D amplifier chips is solved, and the manufacturing of low-power and multi-channel products is realized.
Patent Information
- Application Number
- CN202422721077.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-08
- Publication Date
- 2025-07-04
- Estimated Expiration
- 2034-11-08
AI Technical Summary
When existing Class D amplifier chips integrate boost circuits and amplifier circuits, the heat generation is large and it is difficult to achieve the design power.
Using separate first and second amplifier units, the first amplifier unit integrates a boost module and an amplifier module to process high-frequency audio data, the second amplifier unit processes low-frequency audio data, and uses HT81698 and LTK52201E chips to process them respectively.
It reduces the power consumption of high-frequency audio data, reduces the heat generation of the first power amplifier unit, increases the heat dissipation surface and audio data processing channel, and is suitable for the manufacturing of multi-channel products.
Smart Images
Figure CN223067074U_ABST
Abstract
Description
Technical Field
[0001] The utility model belongs to the technical field of Class D power amplifiers, and particularly relates to a Class D power amplifier control circuit and a Class D power amplifier. Background Technique
[0002] A Class D amplifier, also known as a digital power amplifier or a switching power amplifier, is a power amplifier that uses switching modulation technology to amplify audio signals. A Class D power amplifier chip is an integrated circuit (IC) specifically designed for Class D power amplifiers, and the functions required for Class D amplification, such as switching control, signal modulation, and output drive, are integrated inside the chip.
[0003] Some Class D power amplifier chips integrate a boost circuit and a power amplifier circuit, resulting in a large amount of heat generation in the chip, and it is difficult to reach the design power of the chip during actual application. Content of the Utility Model
[0004] In view of the above problems, the utility model provides a Class D power amplifier control circuit and a Class D power amplifier to solve the problems raised in the above background technique.
[0005] To achieve the above purpose, the utility model provides the following technical solutions:
[0006] A Class D power amplifier control circuit includes an input unit, a first power amplifier unit, and a second power amplifier unit. The input unit is used to obtain audio data, transmit high-frequency audio data to the first power amplifier unit, and transmit low-frequency audio data to the second power amplifier unit. Among them, the first power amplifier unit integrates a boost module and a power amplifier module.
[0007] Further, the first power amplifier unit includes an HT81698 chip.
[0008] Further, the SW pin of the HT81698 chip is connected to one end of a resistor RN1, a resistor RN2, a diode DN1, a diode DN2, a diode DN3, and an inductor LN5. The other end of the resistor RN1 is connected to a capacitor CN4, a capacitor CN6, a capacitor CN7, a capacitor CN8, and a resistor RN3 respectively through a capacitor CN4. The other ends of the diodes DN1, DN2, and DN3 are all connected to the capacitor CN6, the capacitor CN7, the capacitor CN8, and the resistor RN3. The other end of the resistor RN2 is connected to the capacitor CN6, the capacitor CN7, and the capacitor CN8. The common end of the resistor RN3 and the resistor RN4 is connected to the FB pin of the HT81698 chip. The other end of the inductor LN5 is connected to one end of a capacitor CN1, a capacitor CN2, and a capacitor CN3 respectively. The other ends of the capacitor CN1, the capacitor CN2, and the capacitor CN3 are grounded.
[0009] Further, the second power amplifier unit includes an LTK52201E chip.
[0010] Further, the PVCC pin of the LTK52201E chip is grounded through a capacitor.
[0011] Further, the input unit includes a vertical patch interface, which is connected to the first power amplifier unit through DAC-L and DAC-R pins, and is connected to the second power amplifier unit through the DAC-X pin.
[0012] Further, the vertical patch interface is also connected to one end of a resistor RP4 through the PA_EN pin. The other end of the resistor RP4 is respectively connected to a resistor RP1 and the base of a triode QP1. The collector of the triode QP1 is connected to a power management chip.
[0013] The present utility model also provides a class D power amplifier, including the class D power amplifier control circuit described above.
[0014] The technical effects and advantages of the present utility model: The first power amplifier unit integrated with a boost module and a power amplifier module processes high-frequency audio data, and the second power amplifier unit processes low-frequency audio data. The actual power consumption of high-frequency audio data is lower than that of low-frequency audio data, reducing the power consumption and heat generation of the first power amplifier unit. The second power amplifier unit shares the power consumption for the first power amplifier unit, and also increases the heat dissipation surface and audio data processing channels, which is beneficial for manufacturing multi-channel products.
[0015] Other features and advantages of the present utility model will be described in the subsequent description, and some of them will become obvious from the description, or can be understood by implementing the present utility model. The objectives and other advantages of the present utility model can be achieved and obtained through the structures pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are some embodiments of the present utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0017] Figure 1 Shows the principle block diagram of the class D power amplifier control circuit provided by the embodiment of the present utility model;
[0018] Figure 2 Shows the circuit schematic diagram of the first power amplifier unit provided by the embodiment of the present utility model;
[0019] Figure 3The circuit schematic diagram of the second power amplifier unit and the input unit provided by the embodiment of the present utility model is shown.
[0020] In the figure:
[0021] 1 - Input unit, 2 - First power amplifier unit, 3 - Second power amplifier unit. Specific embodiments
[0022] To make the objectives, technical solutions and advantages of the embodiments of the present utility model clearer, the technical solutions in the embodiments of the present utility model will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present utility model. Apparently, the described embodiments are some but not all of the embodiments of the present utility model. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without creative efforts shall fall within the protection scope of the present utility model.
[0023] In the description of the present utility model, it should be understood that the orientation or positional relationship indicated by the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation of the present utility model. In addition, in the description of the present utility model, the meaning of "a plurality of" is two or more, unless otherwise specifically defined.
[0024] Figure 1 The principle block diagram of the class D power amplifier control circuit provided by the embodiment of the present utility model is shown. As Figure 1 shown, the present utility model provides a class D power amplifier control circuit, including an input unit 1, a first power amplifier unit 2 and a second power amplifier unit 3. The input unit 1 is used to obtain audio data, transmit high-frequency audio data to the first power amplifier unit 2, and transmit low-frequency audio data to the second power amplifier unit 3. Among them, the first power amplifier unit 2 is integrated with a boost module and a power amplifier module.
[0025] Figure 2 The circuit schematic diagram of the first power amplifier unit provided by the embodiment of the present utility model is shown. As Figure 2As shown, further, the first power amplifier unit 2 includes an HT81698 chip. Optionally, the SW pin of the HT81698 chip is connected to one end of a resistor RN1, a resistor RN2, a diode DN1, a diode DN2, a diode DN3, and an inductor LN5. The other end of the resistor RN1 is connected to a capacitor CN6, a capacitor CN7, a capacitor CN8, and a resistor RN3 via a capacitor CN4. The other ends of the diodes DN1, DN2, and DN3 are all connected to the capacitor CN6, the capacitor CN7, the capacitor CN8, and the resistor RN3. The other end of the resistor RN2 is connected to the capacitor CN6, the capacitor CN7, and the capacitor CN8. The common end of the resistor RN3 and the resistor RN4 is connected to the FB pin of the HT81698 chip. The other end of the inductor LN5 is connected to one end of a capacitor CN1, a capacitor CN2, and a capacitor CN3. The other ends of the capacitor CN1, the capacitor CN2, and the capacitor CN3 are grounded.
[0026] Figure 3 The circuit schematic diagram of the second power amplifier unit and the input unit provided by the embodiment of the present invention is shown, as Figure 3 As shown, further, the second power amplifier unit 3 includes an LTK52201E chip. Optionally, the PVCC pin of the LTK52201E chip is grounded through a capacitor.
[0027] Further, the input unit 1 includes a vertical patch interface. The vertical patch interface is connected to the first power amplifier unit 2 through DAC-L pins and DAC-R pins, and is connected to the second power amplifier unit 3 through DAC-X pins. Optionally, the vertical patch interface is also connected to one end of a resistor RP4 through a PA_EN pin. The other end of the resistor RP4 is respectively connected to a resistor RP1 and the base of a triode QP1. The collector of the triode QP1 is connected to a power management chip.
[0028] The present invention also provides a class D power amplifier, including the class D power amplifier control circuit described above.
[0029] In summary, the first power amplifier unit 2 of the present invention integrated with a boost module and a power amplifier module processes high-frequency audio data, and the second power amplifier unit 3 processes low-frequency audio data. The actual power consumption of the high-frequency audio data is lower than that of the low-frequency audio data, reducing the power consumption and heat generation of the first power amplifier unit 2. By sharing the power consumption by the second power amplifier unit 3, the heat dissipation surface and the audio data processing channel are also increased, which is beneficial to manufacturing multi-channel products, such as 2.0, 2.1, and 2.2 channel products.
[0030] Although the present utility model has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present utility model.
Claims
1. A class D power amplifier control circuit, characterized in that It includes an input unit, a first power amplifier unit, and a second power amplifier unit. The input unit is used to obtain audio data, transmit high-frequency audio data to the first power amplifier unit, and transmit low-frequency audio data to the second power amplifier unit. Among them, the first power amplifier unit integrates a boost module and a power amplifier module.
2. The class-D power amplifier control circuit according to claim 1, characterized in that The first power amplifier unit includes an HT81698 chip.
3. The class-D power amplifier control circuit according to claim 2, wherein One end of a resistor RN1, a resistor RN2, a diode DN1, a diode DN2, a diode DN3, and an inductor LN5 is connected to the SW pin of the HT81698 chip. The other end of the resistor RN1 is connected to a capacitor CN6, a capacitor CN7, a capacitor CN8, and a resistor RN3 via a capacitor CN4. The other ends of the diodes DN1, DN2, and DN3 are all connected to the capacitor CN6, the capacitor CN7, the capacitor CN8, and the resistor RN3. The other end of the resistor RN2 is connected to the capacitor CN6, the capacitor CN7, and the capacitor CN8. The common end of the resistor RN3 and the resistor RN4 is connected to the FB pin of the HT81698 chip. The other end of the inductor LN5 is respectively connected to one ends of a capacitor CN1, a capacitor CN2, and a capacitor CN3. The other ends of the capacitor CN1, the capacitor CN2, and the capacitor CN3 are grounded.
4. A class D power amplifier control circuit according to any one of claims 1-3, characterized in that, The second power amplifier unit includes an LTK52201E chip.
5. The Class-D power amplifier control circuit according to claim 4, wherein, The PVCC pin of the LTK52201E chip is grounded through a capacitor.
6. A class D power amplifier control circuit according to any one of claims 1-3, characterized in that, The input unit includes a vertical patch interface. The vertical patch interface is connected to the first power amplifier unit through the DAC-L pin and the DAC-R pin, and is connected to the second power amplifier unit through the DAC-X pin.
7. The D - class power amplifier control circuit according to claim 6, wherein The vertical patch interface is also connected to one end of a resistor RP4 through the PA_EN pin. The other end of the resistor RP4 is respectively connected to a resistor RP1 and the base of a triode QP1. The collector of the triode QP1 is connected to a power management chip.
8. A class D power amplifier, characterized in that, It includes the class-D power amplifier control circuit according to any one of claims 1-7.