Gallium nitride light emitting diode structure

By setting up multiple second current barrier structures in the gallium nitride light emitting diode and adjusting their spacing and density, the current congestion problem is solved, and the luminescence uniformity and chip reliability are improved.

CN223261876UActive Publication Date: 2025-08-22普瑞(无锡)研发有限公司
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Patent Information

Application Number
CN202422366615.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-09-27
Publication Date
2025-08-22
Estimated Expiration
2034-09-27

AI Technical Summary

Technical Problem

The existing gallium nitride light-emitting diodes have high luminous intensity near the metal expansion bar, which leads to current congestion and affects luminous efficiency and uniformity.

Method used

A plurality of second current barrier structures are provided in the gallium nitride light emitting diode structure to gradually increase or decrease the spacing and density to improve current diffusion, reduce congestion, and to provide protrusions on the surface of the conductive layer to improve adhesion.

Benefits of technology

A more uniform luminous effect is achieved, reducing the risk of grain erecting or rolling, and improving the reliability and adhesion of small-sized chips.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model belongs to the technical field of semiconductors, and particularly relates to a gallium nitride light-emitting diode structure, which comprises a substrate, a buffer layer arranged on the surface of the substrate, a first semiconductor layer arranged on the surface of the buffer layer, a step arranged on the first semiconductor layer, a first current blocking layer arranged on the plane of the step, and a second current blocking layer arranged on the plane of the first current blocking layer. The first electrode is electrically connected with the first semiconductor layer and is arranged on the surface of the first current blocking layer; the active layer is arranged on the surface of the first semiconductor layer, the second semiconductor layer is arranged on the surface of the active layer, the second current blocking layer is arranged on the surface of the second semiconductor layer, and the second current blocking layer comprises a first current blocking structure and a second current blocking structure. The second current blocking structures are arranged on the two sides of the first current blocking layer at intervals or on the side close to the first electrode, and the conductive layers are arranged on the surfaces of the second semiconductor layer and the second current blocking layer. According to the utility model, the light emitting uniformity of the light-emitting diode can be improved.
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Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductors, and in particular relates to a gallium nitride light emitting diode structure. Background Art

[0002] Improving LED chip efficiency is beneficial for further energy conservation and emission reduction, and has long been a key focus for researchers. Silicon oxide is typically used as a current blocking layer to improve current diffusion and enhance the chip's luminous efficiency. However, near the metal extension strips, luminous intensity remains relatively high, resulting in significant current congestion, which reduces both luminous efficiency and uniformity. Summary of the Invention

[0003] The utility model provides a gallium nitride light emitting diode structure to improve the uniformity of light emission of the light emitting diode, thereby solving the technical problem mentioned in the background technology.

[0004] The technical solution of the utility model is as follows: A gallium nitride light emitting diode structure, comprising:

[0005] substrate;

[0006] a buffer layer, disposed on the surface of the substrate;

[0007] a first semiconductor layer, disposed on a surface of the buffer layer, wherein the first semiconductor layer is provided with a step, and a first current blocking layer is provided on the step plane;

[0008] a first electrode electrically connected to the first semiconductor layer and disposed on a surface of the first current blocking layer;

[0009] an active layer, disposed on the surface of the first semiconductor layer;

[0010] A second semiconductor layer is provided on the surface of the active layer;

[0011] a second current blocking layer, disposed on a surface of the second semiconductor layer, the second current blocking layer comprising a first current blocking structure and a second current blocking structure, the second current blocking structure being spaced apart on both sides of the first current blocking structure or on a side close to the first electrode;

[0012] a conductive layer, disposed on surfaces of the second semiconductor layer and the second current blocking layer;

[0013] a second electrode electrically connected to the second semiconductor layer;

[0014] a reflector layer, disposed on a side of the substrate facing away from the buffer layer;

[0015] The insulating layer is arranged on the surfaces of the conductive layer, the step, the first electrode and the second electrode.

[0016] Furthermore, with the first current blocking structure as the center and in a direction away from the first current blocking structure, the intervals between the second current blocking structures gradually increase.

[0017] Furthermore, the second current blocking structures are arranged at equal intervals on both sides of the first current blocking structure.

[0018] Furthermore, the second current blocking structure has a shape of one or more combinations of a block, a flat cylinder, a triangular pyramid, and a strip.

[0019] Furthermore, when the second current blocking structure is located on both sides of the first current blocking structure, the second current blocking structures on both sides are asymmetrically arranged, and the arrangement density of the second current blocking structures on the side of the first current blocking structure close to the first electrode is greater than the arrangement density of the second current blocking structures on the other side.

[0020] Furthermore, with the first current blocking structure as the center and in a direction away from the first current blocking structure, the arrangement density of the second current blocking structures gradually decreases.

[0021] Furthermore, an upward protrusion is provided on the surface of the conductive layer at a position corresponding to the second current blocking layer.

[0022] The beneficial effects of this invention are: by providing multiple second current blocking structures, this invention reduces congestion during current diffusion, resulting in more uniform light emission. For small-sized chips, this invention can increase the adhesion between the blue film and the chip, reducing the chance of the die standing up or flipping over. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a schematic diagram of the cross-sectional structure of the present utility model.

[0024] Figure 2 It is a schematic diagram of the top structure of Example 1 of the present utility model.

[0025] Figure 3 It is a schematic top view of the structure of Example 2 of the present utility model.

[0026] Figure 4 It is a schematic top view of the structure of Example 3 of the present utility model.

[0027] Figure 5 It is a schematic top view of the structure of embodiment 4 of the present utility model.

[0028] Figure 6 It is a schematic top view of the structure of Example 5 of the present utility model. DETAILED DESCRIPTION

[0029] The present invention will be further described below with reference to the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it. However, the embodiments are not intended to limit the present invention.

[0030] In the present invention, if there is a description of directions (up, down, left, right, front and back), it is only for the convenience of describing the technical solution of the present invention, and does not indicate or imply that the technical features referred to must have a specific orientation, be constructed and operate in a specific orientation. Therefore, it cannot be understood as a limitation on the present invention.

[0031] In this utility model, "several" means one or more, "multiple" means more than two, "greater than," "less than," "exceeds," etc. are understood to exclude the number itself; "above," "below," "within," etc. are understood to include the number itself. In the description of this utility model, the use of "first" or "second" is solely for the purpose of distinguishing technical features and is not to be construed as indicating or implying relative importance, implicitly specifying the number of the indicated technical features, or implicitly specifying the order of the indicated technical features.

[0032] In this utility model, unless otherwise expressly defined, terms such as "disposed," "installed," and "connected" should be interpreted broadly. For example, they may refer to direct connection or indirect connection through an intermediate medium; fixed connection or detachable connection or integral molding; mechanical connection or electrical connection or mutual communication; and internal connection between two components or interaction between two components. Those skilled in the art can reasonably determine the specific meanings of these terms in this utility model based on the specific content of the technical solution.

[0033] In embodiment 1 of the present invention, Figure 1 This is a structural diagram provided according to the specific structure of a gallium nitride light emitting diode structure of the present invention, such as Figure 1 As shown, the utility model specifically includes:

[0034] Substrate 1.

[0035] The buffer layer 2 is disposed on the surface of the substrate 1 .

[0036] The first semiconductor layer 3 is provided on the surface of the buffer layer 2 and has a step 31. The first current blocking layer 4 is provided on the plane of the step 31. Specifically, it can be an N-type semiconductor layer.

[0037] The first electrode 5 is electrically connected to the first semiconductor layer 3 and is disposed on the surface of the first current blocking layer 4. Specifically, it can be an N-type electrode.

[0038] The active layer 6 is disposed on the surface of the first semiconductor layer 3 .

[0039] The second semiconductor layer 7 is disposed on the surface of the active layer 6 and may specifically be a P-type semiconductor layer.

[0040] The second current blocking layer 8 is provided on the surface of the second semiconductor layer 7. The second current blocking layer 8 includes a first current blocking structure 81 and a second current blocking structure 82. The second current blocking structure 82 is spaced apart on both sides of the first current blocking structure 81 and is generally made of SiO2, SiN x 、Al2O3、SiO x N y wait.

[0041] The conductive layer 10 is disposed on the surface of the second semiconductor layer 7 and the second current blocking layer 8 , and is generally made of ITO, ZnO, NiO, InSnZnO, etc.

[0042] The second electrode 9 is electrically connected to the second semiconductor layer 7 and may be a P-type electrode.

[0043] The reflector layer 11 is disposed on a side of the substrate 1 facing away from the buffer layer 2 .

[0044] The insulating layer 12 is disposed on the surfaces of the conductive layer 10 , the step 31 , the first electrode 5 , and the second electrode 9 .

[0045] Among them, such as Figure 2 As shown, the first electrode 5 includes a first electrode pad 51 and a first electrode extension strip 52. The first electrode pad 51 is connected to the first electrode extension strip 52. The first electrode extension strip 52 is located on the surface of the first current blocking layer 4. The second electrode 9 includes a second electrode pad 91 and a second electrode extension strip 92. The second electrode extension strip 92 is provided on the surface of the conductive layer 10 and is located above the first current blocking structure 81.

[0046] In this embodiment, the spacing between the second current blocking structures 82 gradually increases in the direction away from the first current blocking structure 81 with the first current blocking structure 81 as the center. The spacing between the first current blocking structure 81 and the adjacent second current blocking structure 82 is the smallest, and thereafter, the spacing between the adjacent second current blocking structures 82 gradually increases. Figure 2 In the vertical direction, the adjacent second current blocking structures 82 are equal.

[0047] In this embodiment, the second current blocking structures 82 may also be arranged at equal intervals on both sides of the first current blocking structure 81 .

[0048] The second current blocking structure 82 is in the shape of a block, a flat cylinder, a triangular pyramid, a strip, or a combination thereof. In this embodiment, the second current blocking structure 82 is a block structure.

[0049] In this embodiment, an upward protrusion 101 is provided on the surface of the conductive layer 10 corresponding to the position of the second current blocking layer 8. The undulating structure of the conductive layer is conducive to preventing water vapor from gathering at the electrode, while the water in the light-emitting area is relatively volatile, which can improve the reliability of the chip.

[0050] In embodiment 2 of the present invention, Figure 3 As shown, the difference from embodiment 1 is that the second current blocking structure 82 is a strip structure, and adjacent second current blocking structures 82 can be spaced equally or unequally.

[0051] In embodiment 3 of the present invention, Figure 4 As shown, the difference from Example 1 is that when the second current blocking structure 82 is located on both sides of the first current blocking structure 81, the second current blocking structures 82 on both sides are asymmetrically arranged, and the arrangement density of the second current blocking structure 82 located on the side of the first current blocking structure 81 close to the first electrode 5 is greater than the arrangement density of the second current blocking structure 82 on the other side.

[0052] In embodiment 4 of the present invention, Figure 5 As shown, the difference from Example 1 is that, with the first current blocking structure 81 as the center, the arrangement density of the second current blocking structures 82 gradually decreases in the direction away from the first current blocking structure 81 .

[0053] In embodiment 5 of the present invention, Figure 6 As shown, the difference from embodiment 1 is that the second current blocking structure 82 is spaced apart and arranged on a side of the first current blocking structure 81 close to the first electrode 5 .

[0054] In summary, the present invention reduces congestion during current diffusion by providing multiple second current blocking structures, resulting in more uniform light emission. For small-sized chips, the present invention can enhance the adhesion between the blue film and the chip, reducing the chance of the die standing up or tipping over.

[0055] Finally, it should be noted that the above specific implementation methods are only used to illustrate the technical solution of the utility model and are not limiting. Although the utility model is described in detail with reference to examples, ordinary technicians in this field should understand that the technical solution of the utility model can be modified or replaced by equivalents without departing from the spirit and scope of the technical solution of the utility model, which should be included in the scope of the claims of the utility model.

Claims

1. A gallium nitride light-emitting diode structure, characterized in that: include: substrate (1); A buffer layer (2) is provided on the surface of the substrate (1); A first semiconductor layer (3) is provided on the surface of the buffer layer (2), the first semiconductor layer (3) is provided with a step (31), and a first current blocking layer (4) is provided on the plane of the step (31); A first electrode (5) electrically connected to the first semiconductor layer (3) and arranged on the surface of the first current blocking layer (4); An active layer (6) is provided on the surface of the first semiconductor layer (3); A second semiconductor layer (7) is provided on the surface of the active layer (6); a second current blocking layer (8) disposed on a surface of the second semiconductor layer (7), the second current blocking layer (8) comprising a first current blocking structure (81) and a second current blocking structure (82), the second current blocking structure (82) being spaced apart on both sides of the first current blocking structure (81) or on a side close to the first electrode (5); A conductive layer (10) is provided on the surface of the second semiconductor layer (7) and the second current blocking layer (8); a second electrode (9) electrically connected to the second semiconductor layer (7); A reflector layer (11) is provided on a side of the substrate (1) facing away from the buffer layer (2); An insulating layer (12) is provided on the surfaces of the conductive layer (10), the step (31), the first electrode (5), and the second electrode (9).

2. The gallium nitride light-emitting diode structure according to claim 1, wherein: With the first current blocking structure (81) as the center, the spacing between the second current blocking structures (82) gradually increases in a direction away from the first current blocking structure (81).

3. The gallium nitride light emitting diode structure according to claim 1, wherein: The second current blocking structure (82) is arranged at equal intervals on both sides of the first current blocking structure (81).

4. The gallium nitride light-emitting diode structure according to claim 1, wherein: The shape of the second current blocking structure (82) is a block shape, a flat cylindrical shape, a triangular pyramid shape, a strip shape, or a combination thereof.

5. The gallium nitride light emitting diode structure according to claim 1, wherein: When the second current blocking structure (82) is located on both sides of the first current blocking structure (81), the second current blocking structures (82) on both sides are asymmetrically arranged, and the arrangement density of the second current blocking structures (82) on the side of the first current blocking structure (81) close to the first electrode (5) is greater than the arrangement density of the second current blocking structures (82) on the other side.

6. The gallium nitride light emitting diode structure according to claim 1, wherein: With the first current blocking structure (81) as the center, the arrangement density of the second current blocking structure (82) gradually decreases in a direction away from the first current blocking structure (81).

7. The gallium nitride light emitting diode structure according to claim 1, wherein: An upward protrusion (101) is provided on the surface of the conductive layer (10) at a position corresponding to the second current blocking layer (8).