Test port dynamic protection circuit

Abstract

The utility model discloses a test port dynamic protection circuit, comprising a positive end adjustable constant current source circuit, a negative end adjustable constant current source circuit and an ADC voltage test circuit, the ADC voltage test circuit is respectively connected with the positive end adjustable constant current source circuit and the negative end adjustable constant current source circuit; the positive end constant current source circuit is connected to the cathode of a detected material; and the reverse input end of the 44th operational amplifier is connected to the anode of the detected material. A positive-end adjustable constant-current source circuit and a negative-end adjustable constant-current source circuit are additionally arranged at the two ends of a test port respectively, so that a constant-current processing function is added, a positive-end constant-current source is connected to a cathode of a tested material to ensure stable supply of current, and the negative-end constant-current source ensures accurate control over an anode through specific component configuration of the negative-end constant-current source, so that the test precision is improved. Material damage caused by accidental short circuit or power supply fluctuation is effectively prevented, and the safety and reliability of the testing process are improved.

Description

Technical Field

[0001] The utility model relates to the technical field of protection circuits, in particular to a dynamic protection circuit for a test port. Background Art

[0002] Test charts play a vital role in industrial production for the LED testing and packaging industries. However, existing test chart designs suffer from several key issues, one of which is inaccurate material positioning. During automated production, the material being tested, such as an LED, may not be precisely placed on the test probes due to misalignment or inversion. This not only affects the accuracy of test results but can also lead to unintended contact between the material and the test equipment. If one end of the material being tested is connected to a power source while the other end accidentally shorts to the test equipment, the material can burn, damaging it and disrupting the testing process, reducing production efficiency.

[0003] Existing test card designs typically require extremely high mechanical stability and operational precision to avoid short circuits and other unexpected situations. This increases the difficulty and cost of equipment maintenance and requires high operator skills. Furthermore, short circuits and material damage during testing not only impact production but can also pose safety risks to operators. For example, short circuits can cause sparks or heat release, leading to safety issues in the workplace. Clearly, existing technology still needs improvement and advancement. Utility Model Content

[0004] In view of the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a test port dynamic protection circuit for solving the problem in the prior art that the test circuit is prone to cause material damage.

[0005] In order to achieve the above-mentioned purpose, the utility model adopts the following technical solutions: a test port dynamic protection circuit, including a positive end adjustable constant current source circuit, a negative end adjustable constant current source circuit and an ADC voltage test circuit, the ADC voltage test circuit is respectively connected to the positive end adjustable constant current source circuit and the negative end adjustable constant current source circuit, the positive end constant current source circuit is connected to the cathode of the material to be tested; the negative end adjustable constant current source circuit includes a 44th operational amplifier, a 54th field effect transistor, a 43rd resistor, a 10th capacitor, a 127th resistor and a 46th capacitor; the reverse input terminal of the 44th operational amplifier is connected to the anode of the material to be tested, and the reverse input terminal and the output terminal of the 44th operational amplifier are connected There is the 127th resistor, the 46th capacitor is connected in parallel at both ends of the 127th resistor, and the output end of the 44th operational amplifier is grounded in sequence through the 43rd resistor and the 54th field-effect transistor; the positive-end adjustable constant current source circuit includes the 17th operational amplifier, the 57th operational amplifier, the 59th operational amplifier, the 60th operational amplifier and the 25th TVS diode, the positive input end and the reverse input end of the 17th operational amplifier are respectively connected to the 59th operational amplifier and the 60th operational amplifier, the output end of the 17th operational amplifier is connected to the positive input end of the 57th operational amplifier, and the output end of the 57th operational amplifier is connected to the 25TVS diode.

[0006] In one embodiment of the present invention, a positive-end constant current source control circuit is further included, and the positive-end constant current source control circuit includes a 48th operational amplifier, a 42nd resistor, a 105th resistor, a 106th resistor and a 42nd capacitor; the positive input terminal of the 44th operational amplifier is connected to the positive input terminal of the 48th operational amplifier, the 105th resistor and the 106th resistor are connected in series between the reverse input terminal and the output terminal of the 48th operational amplifier, and the 42nd capacitor is also connected between the reverse input terminal and the output terminal of the 48th operational amplifier.

[0007] The beneficial effects of the above embodiment are: the positive-end constant current source control circuit enhances the ability to regulate the positive-end current through the cooperation of the 48th operational amplifier and other related resistors and capacitors, further enhancing the stability and responsiveness of the entire circuit, making the test process more accurate, while also better protecting the material being tested and avoiding damage caused by current fluctuations.

[0008] In one embodiment of the present invention, a negative current selection circuit connected to the 54th field-effect transistor is further included, wherein the negative current selection circuit includes a 4th transistor, a 5th transistor, and a 41st optocoupler relay, a 38th optocoupler relay, a 62nd optocoupler relay, a 64th optocoupler relay, and a 66th optocoupler relay connected in series in sequence, the 64th optocoupler relay is connected to the 4th transistor, and the 66th optocoupler relay is connected to the 5th transistor.

[0009] The beneficial effect of the above embodiment is that the negative end current selection circuit enables the test port dynamic protection circuit to select different current paths as needed. Through the 4th transistor and the 5th transistor and a series of optocoupler relays, the direction and size of the current can be adjusted according to specific test requirements.

[0010] In one embodiment of the present invention, it also includes a negative-end signal buffer circuit, a positive-end signal buffer circuit and a 53rd digital-to-analog converter, the negative-end signal buffer circuit includes a 67th operational amplifier and a 68th operational amplifier, the positive input end of the 67th operational amplifier is connected to the 68th operational amplifier, and the output end of the 67th operational amplifier is connected to the IN1 pin of the 53rd digital-to-analog converter; the positive-end signal buffer circuit includes a 61st operational amplifier and an 18th operational amplifier, the positive input end of the 18th operational amplifier is connected to the 61st operational amplifier, and the output end of the 18th operational amplifier is connected to the IN2 pin of the 53rd digital-to-analog converter.

[0011] The beneficial effects of the above embodiment are: the negative end signal buffer circuit and the positive end signal buffer circuit, combined with the 53rd digital-to-analog converter, enhance the signal processing capability and can stabilize the input signal, while the digital-to-analog converter ensures the accurate conversion between digital signals and analog signals, thereby improving the accuracy and reliability of the overall test.

[0012] In one embodiment of the present invention, a test signal buffer circuit is further included, which includes a 55th operational amplifier and a 56th operational amplifier. The positive input end of the 55th operational amplifier is connected to the 56th operational amplifier, and the output end of the 55th operational amplifier is connected to the IN0 pin of the 53rd digital-to-analog converter.

[0013] The beneficial effect of the above embodiment is that the test signal buffer circuit provides additional stability for the test signal by configuring the 55th operational amplifier and the 56th operational amplifier. This buffering mechanism helps to smooth signal fluctuations, reduce noise interference, and ensure the clarity and accuracy of the test signal.

[0014] In an embodiment of the utility model, still including 19 controller and BCD interface circuit, BCDIN and BCDOUT pin of main control ware all be connected with BCD interface circuit.

[0015] The embodiment has the advantages that: the 19 controller and the BCD interface circuit are used to realize efficient circuit control and management, facilitate user monitoring and adjustment of test parameters, simplify the operation process, improve test efficiency, and enhance the interactivity and controllability of the system.

[0016] As described above, the test port dynamic protection circuit has the following advantages: by adding positive and negative adjustable constant current source circuits at both ends of the test port, the constant current processing function is increased, the positive constant current source is connected to the cathode of the measured material to ensure stable current supply, and the negative constant current source ensures accurate control of the anode through specific component configuration, effectively prevents material damage caused by accidental short circuit or power fluctuation, improves the safety and reliability of the test process, improves the safety and reliability of the test card, and reduces material loss caused by mechanical or operational errors, thereby improving overall production efficiency and product quality. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical scheme in the embodiments of the utility model or the prior art, the drawings needed in the embodiment or the prior art description will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the utility model, and those skilled in the art can obtain other drawings according to these drawings without creative labor.

[0018] Figure 1 Part of the circuit diagram of the test port dynamic protection circuit provided by the utility model is shown in the following figure:

[0019] Figure 2 Part of the circuit diagram of the test port dynamic protection circuit provided by the utility model is shown in the following figure:

[0020] Figure 3 Part of the circuit diagram of the test port dynamic protection circuit provided by the utility model is shown in the following figure:

[0021] Figure 4 Part of the circuit diagram of the test port dynamic protection circuit provided by the utility model is shown in the following figure:

[0022] Figure 5 Part of the circuit diagram of the test port dynamic protection circuit provided by the utility model is shown in the following figure:

[0023] Figure 6A partial circuit diagram of the test port dynamic protection circuit provided by the utility model;

[0024] Figure 7 A partial circuit diagram of the test port dynamic protection circuit provided by the utility model;

[0025] Figure 8 A partial circuit diagram of the test port dynamic protection circuit provided by the utility model;

[0026] Figure 9 A partial circuit diagram of the test port dynamic protection circuit provided by the utility model;

[0027] Figure 10 This is a partial circuit diagram of the test port dynamic protection circuit provided by the utility model.

[0028] Component number description

[0029] U44: 44th operational amplifier Q4: 4th transistor

[0030] U54 54th field effect transistor Q5 5th transistor

[0031] R43 43rd resistor U41 41st optocoupler relay

[0032] C10 10th capacitor U38 38th optocoupler relay

[0033] R127 No. 127 resistor U62 No. 62 optocoupler relay

[0034] C46 46th capacitor U64 64th optocoupler relay

[0035] U17 Operational amplifier No. 17 U66 Optocoupler relay No. 66

[0036] U57 No. 57 Operational Amplifier U53 No. 53 Digital to Analog Converter

[0037] U59: 59th operational amplifier U67: 67th operational amplifier

[0038] U60 60th operational amplifier U68 68th operational amplifier

[0039] D25 No. 25 TVS diode U61 No. 61 operational amplifier

[0040] U48 48th operational amplifier U18 18th operational amplifier

[0041] R42 42nd resistor U55 55th operational amplifier

[0042] R105 105th resistor U56 56th operational amplifier

[0043] R106 No. 106 resistor U19 No. 19 controller

[0044] C42 No. 42 capacitor DETAILED DESCRIPTION

[0045] The present invention provides a test port dynamic protection circuit. To make the purpose, technical solution and effect of the present invention clearer and more specific, the present invention will be further described in detail below with reference to the accompanying drawings and examples.

[0046] In the description of this utility model, it should be understood that the terms "upper, lower, left, and right" and the like indicating directions or positions are based on the directions or positions shown in the accompanying drawings and are intended solely to facilitate and simplify the description of this utility model and are not to be construed as limiting the scope of this utility model. Furthermore, the terms "installation" and "connection" are to be understood broadly, and those skilled in the art will be able to understand the specific meanings of these terms in this utility model based on the specific circumstances.

[0047] See also Figures 1 to 10 The utility model provides a circuit comprising a positive-end adjustable constant current source circuit, a negative-end adjustable constant current source circuit and an ADC voltage test circuit, wherein the ADC voltage test circuit is connected to the positive-end adjustable constant current source circuit and the negative-end adjustable constant current source circuit respectively, and the positive-end constant current source circuit is connected to the cathode of the material to be measured; the negative-end adjustable constant current source circuit comprises a 44th operational amplifier U44, a 54th field-effect transistor U54, a 43rd resistor R43, a 10th capacitor C10, a 127th resistor R127 and a 46th capacitor C46; the inverting input terminal of the 44th operational amplifier U44 is connected to the anode of the material to be measured, the 127th resistor R127 is connected between the inverting input terminal and the output terminal of the 44th operational amplifier U44, and the 127th resistor R127 is connected to the cathode of the material to be measured. 7 is connected in parallel with the 46th capacitor C46, ​​the output end of the 44th operational amplifier U44 is grounded through the 43rd resistor R43 and the 54th field effect transistor U54 in sequence; the positive end adjustable constant current source circuit includes the 17th operational amplifier U17, the 57th operational amplifier U57, the 59th operational amplifier U59, the 60th operational amplifier U60 and the 25th TVS diode D25, the positive input end and the reverse input end of the 17th operational amplifier U17 are respectively connected to the 59th operational amplifier U59 and the 60th operational amplifier U60, the output end of the 17th operational amplifier is connected to the positive input end of the 57th operational amplifier U57, and the output end of the 57th operational amplifier U57 is connected to the 25TVS diode.

[0048] See also Figure 3 , further comprising a positive-end constant-current source control circuit, the positive-end constant-current source control circuit comprising a 48th operational amplifier U48, a 42nd resistor R42, a 105th resistor R105, a 106th resistor, and a 42nd capacitor C42; the positive input terminal of the 44th operational amplifier U44 is connected to the positive input terminal of the 48th operational amplifier U48, the 105th resistor R105 and the 106th resistor are connected in series between the reverse input terminal and the output terminal of the 48th operational amplifier U48, and the 42nd capacitor C42 is further connected between the reverse input terminal and the output terminal of the 48th operational amplifier U48. It can be understood that the positive-end constant-current source control circuit, through the cooperation of the 48th operational amplifier U48 and other related resistors and capacitors, enhances the ability to regulate the positive-end current, further enhances the stability and responsiveness of the entire circuit, makes the testing process more accurate, and also better protects the tested material and avoids damage caused by current fluctuations.

[0049] See also Figure 4 , further comprising a negative-end current selection circuit connected to the 54th field-effect transistor U54. The negative-end selection circuit includes a fourth transistor Q4, a fifth transistor Q5, and a series connection of the 41st optocoupler relay U41, the 38th optocoupler relay U38, the 62nd optocoupler relay U62, the 64th optocoupler relay U64, and the 66th optocoupler relay U66. The 64th optocoupler relay U64 is connected to the fourth transistor Q4, and the 66th optocoupler relay U66 is connected to the fifth transistor Q5. The negative-end current selection circuit enables the test port dynamic protection circuit to select different current paths as needed. Through the fourth transistor Q4 and the fifth transistor Q5, as well as the 41st optocoupler relay U41, the 38th optocoupler relay U38, the 62nd optocoupler relay U62, the 64th optocoupler relay U64, and the 66th optocoupler relay U66, the direction and magnitude of the current can be adjusted according to specific testing requirements.

[0050] See also Figures 5 to 7, also includes a negative end signal buffer circuit, a positive end signal buffer circuit and a 53rd digital-to-analog converter U53, the negative end signal buffer circuit includes a 67th operational amplifier U67 and a 68th operational amplifier U68, the positive input end of the 67th operational amplifier U67 is connected to the 68th operational amplifier U68, and the output end of the 67th operational amplifier U67 is connected to the IN1 pin of the 53rd digital-to-analog converter U53; the positive end signal buffer circuit includes a 61st operational amplifier U61 and an 18th operational amplifier U18, the positive input end of the 18th operational amplifier U18 is connected to the 61st operational amplifier U61, and the output end of the 18th operational amplifier U18 is connected to the IN2 pin of the 53rd digital-to-analog converter U53. The negative and positive signal buffer circuits, combined with the 53rd digital-to-analog converter U53, enhance signal processing capabilities and stabilize input signals. The 53rd digital-to-analog converter ensures accurate conversion between digital and analog signals, thereby improving overall test accuracy and reliability. In this embodiment, the ADC voltage test circuit includes the 53rd digital-to-analog converter U53.

[0051] See also Figure 8 , further comprising a test signal buffer circuit comprising a 55th operational amplifier U55 and a 56th operational amplifier U56. The non-inverting input of the 55th operational amplifier U55 is connected to the 56th operational amplifier U56, and the output of the 55th operational amplifier U55 is connected to the IN0 pin of the 53rd digital-to-analog converter U53. The test signal buffer circuit, through the configuration of the 55th operational amplifier U55 and the 56th operational amplifier U56, provides additional stability for the test signal. This buffering mechanism helps smooth signal fluctuations, reduce noise interference, and ensure the clarity and accuracy of the test signal.

[0052] See also Figure 9 and Figure 10 , further comprising a nineteenth controller U19 and a BCD interface circuit, with the BCD interface circuit being connected to both the BCDIN and BCDOUT pins of the main controller. In this embodiment, the BCDIN pins of the main controller include BCDIN0, BCDIN01, and BCDIN2, and the BCDOUT pins include BCDOUT0-BCDOUT9, each of which is connected to a corresponding BCD interface circuit. The inclusion of the nineteenth controller U19 and the BCD interface circuit enables more efficient circuit control and management, facilitating user monitoring and adjustment of test parameters, while simplifying the operation process, improving test efficiency, and enhancing the interactivity and controllability of the system.

[0053] In summary, the test port dynamic protection circuit of the present invention increases the constant current processing function by adding a positive end adjustable constant current source circuit and a negative end adjustable constant current source circuit at both ends of the test port. The positive end constant current source is connected to the cathode of the material being tested to ensure a stable current supply, while the negative end constant current source ensures precise control of the anode through its specific component configuration, effectively preventing material damage caused by accidental short circuits or power supply fluctuations, and improving the safety and reliability of the test process; improving the safety and reliability of the test card, while also reducing material loss caused by mechanical or operational errors, thereby improving overall production efficiency and product quality. Therefore, the present invention effectively overcomes the various shortcomings of the existing technology and has a high industrial utilization value.

[0054] It is understandable that those skilled in the art can make equivalent substitutions or changes based on the technical solution and the utility model concept of the present invention, and all these changes or substitutions should fall within the scope of protection of the present invention.

Claims

1. A test port dynamic protection circuit, characterized in that: The invention comprises a positive end adjustable constant current source circuit, a negative end adjustable constant current source circuit and an ADC voltage test circuit, wherein the ADC voltage test circuit is connected to the positive end adjustable constant current source circuit and the negative end adjustable constant current source circuit respectively, and the positive end constant current source circuit is connected to the cathode of the material to be tested; the negative end adjustable constant current source circuit comprises a 44th operational amplifier, a 54th field effect transistor, a 43rd resistor, a 10th capacitor, a 127th resistor and a 46th capacitor; the reverse input terminal of the 44th operational amplifier is connected to the anode of the material to be tested, the 127th resistor is connected between the reverse input terminal and the output terminal of the 44th operational amplifier, and the 127th resistor is connected between the reverse input terminal and the output terminal of the 44th operational amplifier. The positive-end adjustable constant current source circuit includes a 17th operational amplifier, a 57th operational amplifier, a 59th operational amplifier, a 60th operational amplifier and a 25th TVS diode, the positive input terminal and the reverse input terminal of the 17th operational amplifier are respectively connected to the 59th operational amplifier and the 60th operational amplifier, the output terminal of the 17th operational amplifier is connected to the positive input terminal of the 57th operational amplifier, and the output terminal of the 57th operational amplifier is connected to the 25 TVS diode.

2. The test port dynamic protection circuit according to claim 1, characterized in that: It also includes a positive-end constant current source control circuit, which includes a 48th operational amplifier, a 42nd resistor, a 105th resistor, a 106th resistor and a 42nd capacitor; the positive input terminal of the 44th operational amplifier is connected to the positive input terminal of the 48th operational amplifier, the 105th resistor and the 106th resistor are connected in series between the reverse input terminal and the output terminal of the 48th operational amplifier, and the 42nd capacitor is also connected between the reverse input terminal and the output terminal of the 48th operational amplifier.

3. The test port dynamic protection circuit according to claim 2, characterized in that: It also includes a negative end current selection circuit connected to the 54th field effect transistor, the negative end selection circuit includes a 4th transistor, a 5th transistor, and the 41st optocoupler relay, the 38th optocoupler relay, the 62nd optocoupler relay, the 64th optocoupler relay and the 66th optocoupler relay connected in series in sequence, the 64th optocoupler relay is connected to the 4th transistor, and the 66th optocoupler relay is connected to the 5th transistor.

4. The test port dynamic protection circuit according to claim 3, characterized in that: It also includes a negative-end signal buffer circuit, a positive-end signal buffer circuit and a 53rd digital-to-analog converter, wherein the negative-end signal buffer circuit includes a 67th operational amplifier and a 68th operational amplifier, the positive input end of the 67th operational amplifier is connected to the 68th operational amplifier, and the output end of the 67th operational amplifier is connected to the IN1 pin of the 53rd digital-to-analog converter; the positive-end signal buffer circuit includes a 61st operational amplifier and an 18th operational amplifier, the positive input end of the 18th operational amplifier is connected to the 61st operational amplifier, and the output end of the 18th operational amplifier is connected to the IN2 pin of the 53rd digital-to-analog converter.

5. The test port dynamic protection circuit according to claim 4, characterized in that: It also includes a test signal buffer circuit, which includes a 55th operational amplifier and a 56th operational amplifier. The positive input end of the 55th operational amplifier is connected to the 56th operational amplifier, and the output end of the 55th operational amplifier is connected to the IN0 pin of the 53rd digital-to-analog converter.

6. The test port dynamic protection circuit according to claim 1, characterized in that: It also includes a 19th controller and a BCD interface circuit, and the BCDIN and BCDOUT pins of the main controller are both connected to the BCD interface circuit.

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