Electronic package
By providing an opening on the supporting structure and incorporating a heat conducting member and a heat dissipation structure therein, the problem of poor heat dissipation in the stacked semiconductor packaging structure is solved, and effective heat dissipation is achieved without increasing costs.
Patent Information
- Application Number
- CN202422908123.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-11-20
- Filing Date
- 2024-11-27
- Publication Date
- 2025-10-21
- Estimated Expiration
- 2034-11-27
AI Technical Summary
In the prior art, the heat generated by electronic components in stacked semiconductor packaging structures during operation cannot be effectively dissipated, resulting in overheating or damage.
An opening is provided on the supporting structure to expose the electronic component, a heat conducting member is built into the opening, and a heat dissipation structure is provided on the heat conducting member, comprising a metal layer and metal bumps, to form multiple heat dissipation paths.
The heat dissipation effect of electronic components is improved, overheating damage is avoided, and no new manufacturing process or materials are required, thereby reducing costs.
Smart Images
Figure CN223462217U_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to a semiconductor packaging technology, in particular to an electronic package with a heat dissipation structure. BACKGROUND
[0002] With the evolution of semiconductor packaging technology, different packaging types of semiconductor devices have been developed. In order to improve electrical performance and save packaging space, the industry has developed a packaging type of stacking multiple packaging structures to form a package-on-package (POP) structure. This packaging type can achieve system-on-package (SiP) heterogeneous integration characteristics, and can integrate electronic components with different functions, such as memory, central processing unit, graphics processing unit, image application processing unit, etc., through stacking design to achieve system integration, and is suitable for various thin and small electronic products.
[0003] Figure 1 FIG. 1 is a cross-sectional view of a conventional package-on-package structure. The package-on-package structure 1 includes a first semiconductor chip 10, a first packaging substrate 11, a second packaging substrate 12, a plurality of solder balls 13, a second semiconductor chip 14, and a packaging adhesive 15. The first packaging substrate 11 has a core layer 110 and a plurality of circuit layers 111, and the second packaging substrate 12 has a core layer 120 and a plurality of circuit layers 121. The first semiconductor chip 10 is disposed on the first packaging substrate 11 in a flip-chip manner, and the second semiconductor chip 14 is also disposed on the second packaging substrate 12 in a flip-chip manner. The solder balls 13 are used to connect and electrically couple the first packaging substrate 11 and the second packaging substrate 12. The packaging adhesive 15 covers the solder balls 13 and the first semiconductor chip 10. Optionally, an underfill 16 can be formed between the first semiconductor chip 10 and the first packaging substrate 11.
[0004] However, if the heat generated by the first semiconductor chip 10 during operation cannot be effectively dissipated, overheating or damage will occur.
[0005] Therefore, how to overcome the various problems of the prior art has become an urgent issue to be solved. CONTENT OF THE INVENTION
[0006] In view of the foregoing deficiencies of the prior art, the present application provides an electronic package, comprising: a carrier structure having opposite first and second sides; an electronic component disposed on the first side of the carrier structure and electrically connected to the carrier structure; a circuit structure disposed on the first side of the carrier structure and electrically connected to the carrier structure, such that the electronic component is covered by the circuit structure, wherein the circuit structure is formed with an opening to expose at least a portion of the electronic component; a heat conducting member disposed on the electronic component and accommodated in the opening; and a heat dissipating structure disposed on the heat conducting member.
[0007] In the foregoing electronic package, the electronic component is disposed on the carrier structure by a plurality of conductive bumps, and a underfill adhesive is formed between the electronic component and the carrier structure to cover the plurality of conductive bumps.
[0008] In the foregoing electronic package, the circuit structure is disposed on the carrier structure by a plurality of conductive members. The plurality of conductive members are copper core balls, metal pillars, solder balls or wires.
[0009] In the foregoing electronic package, the heat conducting member is a dummy Silicon.
[0010] In the foregoing electronic package, the electronic package further comprises a package body to cover the electronic component, the circuit structure and the heat conducting member.
[0011] In the foregoing electronic package, the heat dissipating structure comprises a metal layer formed on the heat conducting member, an insulating layer covering a portion of the metal layer, and a plurality of metal bumps formed on the metal layer.
[0012] In the foregoing electronic package, the heat dissipating structure comprises a metal layer formed on the heat conducting member, an insulating layer covering a portion of the metal layer, and a plurality of bump base metal layers formed on the metal layer and the insulating layer.
[0013] In the foregoing electronic package, the heat dissipating structure comprises a metal layer formed on the heat conducting member, an insulating layer covering a portion of the metal layer, a plurality of bump base metal layers formed on the metal layer and the insulating layer, and a plurality of metal bumps formed on the plurality of bump base metal layers.
[0014] In the foregoing electronic package, the heat dissipating structure is in the form of fins and is integrally formed with the heat conducting member.
[0015] In the foregoing electronic package, the electronic package further comprises a package module disposed on the circuit structure.
[0016] In the foregoing electronic package, the electronic component is provided with a plurality of heat conducting members, and each of the heat conducting members is provided with the heat dissipating structure.
[0017] In the aforementioned electronic package, the carrier structure is provided with a plurality of electronic elements, and the heat conductive member is disposed on each of the electronic elements, and the heat dissipating structure is disposed on each of the heat conductive members.
[0018] In the aforementioned electronic package, the circuit structure is of a middle plate type, and a plurality of conductive through holes are formed therein.
[0019] As can be seen from the above, the electronic package of the present application mainly provides a circuit structure formed with openings on a carrier structure, so that the electronic elements disposed on the carrier structure are exposed outside the openings of the circuit structure, and a heat conductive member contacting the electronic elements is disposed in the openings, and a heat dissipating structure is disposed on the heat conductive member, so as to improve the heat dissipating effect of the electronic elements. BRIEF DESCRIPTION OF DRAWINGS
[0020] Figure 1 FIG. 1 is a cross-sectional view of a conventional package stacking structure.
[0021] Figure 2A FIG. 2 is a cross-sectional view of a first embodiment of the electronic package of the present application. Figure 2B
[0022] FIG. 3 is a cross-sectional view of a second embodiment of the electronic package of the present application. Figure 3A Figure 3B FIG. 4 is a cross-sectional view of a third embodiment of the electronic package of the present application.
[0023] Figure 4 FIG. 5 is a cross-sectional view of a fourth embodiment of the electronic package of the present application.
[0024] Figure 5 FIG. 6 is a cross-sectional view of a fifth embodiment of the electronic package of the present application.
[0025] Figure 6 FIG. 7 is a cross-sectional view of a sixth embodiment of the electronic package of the present application.
[0026] Figure 7A FIG. 8 is a cross-sectional view of a seventh embodiment of the electronic package of the present application. Figure 7B
[0027] FIG. 9 is a cross-sectional view of an eighth embodiment of the electronic package of the present application. Figure 8 REFERENCE NUMERALS
[0028] Figure 9 1 package stacking structure
[0029] 10 first semiconductor chip
[0030] 1 package stacking structure
[0031] 10 first semiconductor chip
[0032] 110, 120 core layer
[0033] 111, 121 wire layer
[0034] 11 first package substrate
[0035] 12 second package substrate
[0036] 13 solder ball
[0037] 14 second semiconductor chip
[0038] 15 encapsulation gel
[0039] 16 underfill
[0040] 2, 3, 4, 5, 6, 7, 8, 9 electronic package
[0041] 20 carrier structure
[0042] 20a first side
[0043] 20b second side
[0044] 21 electronic element
[0045] 210 conductive bump
[0046] 211 active side
[0047] 212 non-active side
[0048] 213 underfill
[0049] 22, 92 wire structure
[0050] 22a first surface
[0051] 22b second surface
[0052] 220 opening
[0053] 221 first conductive contact
[0054] 222 second conductive contact
[0055] 223 conductive member
[0056] 23, 43, 53 thermally conductive member
[0057] 230 thermally conductive gel
[0058] 24 package
[0059] 25, 35, 45, 55 heat spreading structure
[0060] 251, 351, 451 metal layer
[0061] 252, 352, 452 insulating layer
[0062] 253, 454 metal bump
[0063] 26 conductive element
[0064] 27 passive module
[0065] 353, 453 bump bottom metal layer
[0066] 60 packaging module
[0067] 920 conductive via DETAILED DESCRIPTION
[0068] The present application will be described in detail with specific embodiments, and other advantages and effects of the present application can be easily understood by those skilled in the art from the contents disclosed in the present specification.
[0069] It should be noted that the structures, proportions, sizes, etc. shown in the accompanying drawings of the present specification are only used to understand and read the contents disclosed in the present specification by those skilled in the art, and are not used to limit the conditions that can be implemented by the present application, and therefore do not have technical significance. Any modification of the structure, change of the proportional relationship, or adjustment of the size, without affecting the effects and purposes that can be achieved by the present application, should still fall within the scope of the technical content disclosed by the present application. At the same time, the terms such as "upper", "first", "second", and "one" used in the present specification are only for the convenience of clear description, and are not used to limit the scope of the present application that can be implemented, and the change or adjustment of the relative relationship without substantially changing the technical content is also considered as the scope of the present application that can be implemented.
[0070] Figure 2A and Figure 2B is a cross-sectional and top view schematic diagram of a first embodiment of an electronic package 2 of the present application.
[0071] As shown, the electronic package 2 includes a carrier structure 20 having opposite first and second sides 20a and 20b, an electronic element 21 disposed on the first side 20a of the carrier structure 20 and electrically connected to the carrier structure 20, a circuit structure 22 disposed on the first side 20a of the carrier structure 20 and electrically connected to the carrier structure 20, and covering the electronic element 21, a heat conduction member 23 disposed on the electronic element 21, and a heat dissipation structure 25 disposed on the heat conduction member 23.
[0072] The carrier structure 20 is, for example, a core layer encapsulation substrate or a coreless encapsulation substrate, which has an insulating base and a wiring layer combined with the insulating base, and has opposite first and second sides 20a and 20b.
[0073] The electronic element 21 can be an active element, such as a semiconductor chip, a passive element, such as a resistor, a capacitor, and an inductor, or a combination thereof. In the present embodiment, the electronic element 21 is a semiconductor chip, which has opposite active and non-active surfaces 211 and 212, and is disposed on the first side 20a of the carrier structure 20 in a flip-chip manner through a plurality of conductive bumps 210, such as solder material, to electrically connect the wiring layer, and forms an underfill 213 between the electronic element 21 and the carrier structure 20 to cover the plurality of conductive bumps 210. However, the manner of electrically connecting the electronic element 21 to the carrier structure 20 is various and is not limited to the above.
[0074] In the present embodiment, the circuit structure 22 has opposite first and second surfaces 22a and 22b, and is provided with at least one opening 220 extending through the first and second surfaces 22a and 22b, and is formed with a plurality of first conductive contacts 221 and a plurality of second conductive contacts 222 on the first and second surfaces 22a and 22b, respectively, and is formed with a wiring layer connecting the first and second surfaces 22a and 22b, so that the first and second conductive contacts 221 and 222 on the first and second surfaces 22a and 22b can be electrically connected to each other through the wiring layer. The first and second conductive contacts 221 and 222 are, for example, solder pads. In addition, the circuit structure 22 can be a core layer encapsulation substrate or a coreless encapsulation substrate, or can be a silicon interposer.
[0075] The circuit structure 22 can be disposed on and electrically connected to the first side 20a of the carrier structure 20 through a plurality of conductive members 223, one end of which is connected to the second conductive contacts 222 of the circuit structure 22, and the other end of which is connected to the carrier structure 20, and the position of the electronic element 21 corresponds to the position of the opening 220, so that at least part of the non-active surface 212 of the electronic element 21 is exposed outside the opening 220. In the present embodiment, the conductive members 223 can be copper core balls to effectively maintain the distance between the circuit structure 22 and the carrier structure 20. In other embodiments, the conductive members 223 can be metal pillars (copper pillars), solder balls, or wires, etc.
[0076] The heat conductive member 23 can be disposed on the non-active surface 212 of the electronic element exposed outside the opening 220 through a heat conductive adhesive 230. In the present embodiment, the heat conductive member 23 is, for example, a dummy Silicon.
[0077] In addition, an encapsulation 24 is formed on the carrier structure 20 to cover the electronic component 21, the circuit structure 22, the heat-conducting member 23, and the electrically-conducting member 223. Part of the encapsulation 24 (or even part of the heat-conducting member 23) can be removed by thinning, for example, by grinding, so that the heat-conducting member 23 is exposed outside the encapsulation 24.
[0078] The heat-dissipating structure 25 is disposed on the heat-conducting member 23 and is exposed outside the encapsulation 24. In this embodiment, the heat-dissipating structure 25 includes a metal layer 251 formed on the heat-conducting member 23, an insulating layer 252 covering part of the metal layer 251, and a plurality of metal bumps 253 formed on the metal layer 251. The metal layer 251 and the metal bumps 253 are made of, for example, copper, and the insulating layer 252 is made of, for example, polyimide (PI).
[0079] In addition, a plurality of electrically-conducting elements 26 such as solder balls and a passive module 27 can be disposed on the second side 20b of the carrier structure 20, thereby obtaining the electronic package 2 of the present application.
[0080] Therefore, the electronic package 2 of the present application mainly includes a carrier structure 20 provided with an electronic component 21, a circuit structure 22 formed with an opening 220, so that the electronic component 21 is exposed outside the opening 220, a heat-conducting member 23 disposed in the opening 220 and contacting the electronic component 21, and a heat-dissipating structure 25 formed on the heat-conducting member 23 and including a plurality of metal bumps 253, so that the electronic component 21 embedded in the encapsulation 24 can effectively dissipate heat generated during operation through the heat-dissipating path provided by the heat-conducting member 23 and the heat-dissipating structure 25.
[0081] Please refer to Figure 3A and Figure 3B are cross-sectional and top views of a second embodiment of the electronic package of the present application. The difference between this embodiment and the foregoing embodiments is the form of the heat-dissipating structure, and other structures are substantially the same, so the same parts will not be described again.
[0082] In the electronic package 3 of this embodiment, the heat-dissipating structure 35 includes a metal layer 351 formed on the heat-conducting member 23, an insulating layer 352 covering part of the metal layer 351, and a plurality of under bump metallization (UBM) layers 353 formed on the metal layer 251 and the insulating layer 352.
[0083] Please refer to Figure 4 are cross-sectional and top views of a third embodiment of the electronic package of the present application. The difference between this embodiment and the foregoing embodiments is the form of the heat-dissipating structure, and other structures are substantially the same, so the same parts will not be described again.
[0084] In the electronic package 4 of this embodiment, the heat dissipation structure 45 includes a metal layer 451 formed on the thermal conductor 43, an insulating layer 452 covering a portion of the metal layer 451, a plurality of bottom bump metal layers (UBMs) 453 formed on the metal layer 451 and the insulating layer 452, and a plurality of metal bumps 454 formed on the plurality of bottom bump metal layers 453.
[0085] See also Figure 5 , is a cross-sectional view of a fourth embodiment of the electronic package of the present application. The difference between this embodiment and the previous embodiments lies in the form and range of the heat dissipation structure. The other structures are substantially the same, so the similarities will not be repeated here.
[0086] In the electronic package 5 of this embodiment, the heat dissipation structure 55 is in the shape of a fin and is integrally formed with the heat conducting member 53 .
[0087] See also Figure 6 , is a cross-sectional view of a fifth embodiment of the electronic package of the present application. The electronic package 6 of this embodiment is substantially the same as the previous embodiment, with the main difference being that a packaging module 60 (e.g., a memory module) can be disposed on the circuit structure 22 to form a package stacking structure.
[0088] See also Figure 7A and Figure 7B , which are schematic cross-sectional and top views of a sixth embodiment of the electronic package of the present application. The electronic package 7 of this embodiment is substantially the same as the previous embodiments, with the primary difference being that multiple heat conducting members 23 can be disposed on a single electronic component 21, and at least one heat dissipation structure 25 is disposed on each heat conducting member 23, thereby providing multiple heat dissipation paths for the electronic component 21.
[0089] See also Figure 8 , is a schematic cross-sectional view of a seventh embodiment of the electronic package of the present application. The electronic package 8 of this embodiment is substantially the same as the previous embodiments, with the primary difference being that a plurality of electronic components 21 are mounted on a supporting structure 20, each of which is provided with at least one thermally conductive member 23, and each of which is provided with at least one heat dissipation structure 25, to provide a good heat dissipation path for each electronic component 21.
[0090] See also Figure 9 , is a schematic cross-sectional view of an eighth embodiment of the electronic package of the present application. The electronic package 9 of this embodiment is substantially the same as the previous embodiments, with the primary difference being that the circuit structure 92 can be an interposer-type circuit board, with a plurality of conductive through-holes 920 formed therein. Furthermore, the planar dimensions of the circuit structure 92 are smaller than the planar dimensions of the support structure 20, allowing the package body 24 to cover the sides of the circuit structure 92.
[0091] In summary, the electronic package of the present application mainly sets a circuit structure with an opening on a bearing structure, so that an electronic component set on the bearing structure is exposed outside the opening of the circuit structure, and a heat-conducting member contacting the electronic component is set in the opening, and a heat-dissipating structure is set on the heat-conducting member, so as to improve the heat-dissipating effect of the electronic component. Meanwhile, the electronic package of the present application can solve the problems of the prior art without increasing new development processes and materials or purchasing machines, so there is no large additional cost.
[0092] The above embodiments are used to illustrate the principles and effects of the present application, but not for limiting the present application. Those skilled in the art can modify the above embodiments without departing from the spirit and scope of the present application. Therefore, the protection scope of the present application should be subject to the claims.
Claims
1. An electronic package, characterized by The electronic package comprises: a carrier structure having opposite first and second sides; an electronic element disposed on the first side of the carrier structure and electrically connected to the carrier structure; a circuit structure disposed on the first side of the carrier structure and electrically connected to the carrier structure, such that the electronic element is covered by the circuit structure, wherein the circuit structure is formed with an opening to expose at least a portion of the electronic element; a heat-conductive member disposed on the electronic element and accommodated in the opening; and a heat-dissipating structure disposed on the heat-conductive member.
2. The electronic package of claim 1, wherein, The electronic element is disposed on the carrier structure by a plurality of conductive bumps, and a bottom adhesive covering the conductive bumps is formed between the electronic element and the carrier structure.
3. The electronic package of claim 1, wherein, The circuit structure is disposed on the carrier structure by a plurality of conductive members.
4. The electronic package of claim 3, wherein, The conductive members are copper core balls, metal pillars, solder balls or wires.
5. The electronic package of claim 1, wherein, The heat-conductive member is a dummy silicon wafer.
6. The electronic package of claim 1, wherein, The electronic package further comprises a package body covering the electronic element, the circuit structure and the heat-conductive member.
7. The electronic package of claim 1, wherein, The heat-dissipating structure comprises a metal layer formed on the heat-conductive member, an insulating layer covering a portion of the metal layer, and a plurality of metal bumps formed on the metal layer.
8. The electronic package of claim 1, wherein, The heat-dissipating structure comprises a metal layer formed on the heat-conductive member, an insulating layer covering a portion of the metal layer, and a plurality of bump bottom metal layers formed on the metal layer and the insulating layer.
9. The electronic package of claim 1, wherein, The heat-dissipating structure comprises a metal layer formed on the heat-conductive member, an insulating layer covering a portion of the metal layer, a plurality of bump bottom metal layers formed on the metal layer and the insulating layer, and a plurality of metal bumps formed on the plurality of bump bottom metal layers.
10. The electronic package of claim 1, wherein, The heat-dissipating structure is in the form of fins and is integrally formed with the heat-conductive member.
11. The electronic package of claim 1, wherein, The electronic package further comprises a package module disposed on the circuit structure.
12. The electronic package of claim 1, wherein, The electronic element is provided with a plurality of heat-conductive members, and each of the heat-conductive members is provided with the heat-dissipating structure.
13. The electronic package of claim 1, wherein, The carrier structure is provided with a plurality of electronic elements, each of the electronic elements is provided with the heat-conductive member, and each of the heat-conductive members is provided with the heat-dissipating structure.
14. The electronic package of claim 1, wherein, The circuit structure is in the form of a middle plate and is formed with a plurality of conductive through holes.