USB signal switching circuit

Abstract

The utility model relates to a USB signal switching circuit. The USB signal switching circuit comprises a first USB input and output interface, more than two second USB input and output interfaces, a main control chip, a multiplexer chip, a serial port level conversion circuit, a voltage conversion circuit, a first dial switch and a second dial switch, the first input end of the main control chip is electrically connected with the output end of the serial port level conversion circuit and is suitable for accessing a control signal sent by a computer, and the output end of the main control chip is electrically connected with the input end of the multiplexer chip through the second dial switch; the first dial switch is electrically connected with the multiplexer chip; the first USB input / output interface and the more than two second USB input / output interfaces are electrically connected with the multiplexer chip; according to the invention, a manual switching mode and an automatic switching mode are integrated on the same circuit, the dual advantages of flexibility of manual switching and convenience of automatic switching are achieved, the two switching modes can be changed according to different application scenes, and the applicability is wider.

Description

TECHNICAL FIELD

[0001] The application relates to the technical field of USB interfaces, in particular to a USB signal switching circuit. BACKGROUND

[0002] Traditional USB connection switches the connection between a master USB interface and multiple slave USB interfaces, realizes the communication connection between the master USB interface and a selected slave USB interface, and thus makes the USB connection have the modes of multiple-in single-out and single-in multiple-out in the process of continuous switching. The switching of USB signals mainly has two methods: one is manual switching, which switches the USB signals through a manual button or a DIP switch provided by a USB switcher; and the other is automatic switching, which switches the USB signals according to instruction information after a computer outputs a control instruction to the switcher. The manual switching mode has flexibility and can be applied to various complex scenes, while the automatic switching mode is more convenient and simple to operate. The existing USB signal switcher can only provide one of the two switching modes, and thus it is urgent to integrate the manual switching mode and the automatic switching mode into one. SUMMARY

[0003] In view of this, the application provides a USB signal switching circuit.

[0004] According to an aspect of the application, a USB signal switching circuit is provided, characterized in that it comprises a first USB input-output interface, two or more second USB input-output interfaces, a master control chip, a multiplexer chip, a serial port level conversion circuit, a voltage conversion circuit, a first DIP switch and a second DIP switch.

[0005] The first input end of the master control chip is electrically connected with the output end of the serial port level conversion circuit and is adapted to input a control signal from a computer, and the output end of the master control chip is electrically connected with the input end of the multiplexer chip through the second DIP switch; the first DIP switch is electrically connected with the multiplexer chip.

[0006] The first USB input-output interface and the two or more second USB input-output interfaces are electrically connected with the multiplexer chip.

[0007] The input end of the voltage conversion circuit is adapted to input a working voltage, the first output end of the voltage conversion circuit is electrically connected with the second input end of the master control chip and is adapted to supply power to the master control chip, the second output end of the voltage conversion circuit is electrically connected with the input end of the serial port level conversion circuit, the third output end of the voltage conversion circuit is electrically connected with the multiplexer chip and is adapted to supply power to the multiplexer chip, and the fourth output end of the voltage conversion circuit is electrically connected with the input end of the first DIP switch and is adapted to supply power to the first DIP switch.

[0008] In a possible implementation, the serial port level conversion circuit comprises: a level conversion chip; an input end of the level conversion chip is electrically connected with the voltage conversion circuit, and an output end of the level conversion chip is electrically connected with the master control chip.

[0009] In a possible implementation, the model of the level conversion chip is MAX3232.

[0010] In a possible implementation, the voltage conversion circuit comprises: an inductor and a voltage conversion chip; an input end of the inductor is connected with a USB_5V voltage; an output end of the inductor is electrically connected with an input end of the voltage conversion chip, and an output end of the voltage conversion chip is adapted to output a converted voltage.

[0011] In a possible implementation, the model of the voltage conversion chip is LM1117.

[0012] In a possible implementation, the model of the multiplexer chip is MAX4999.

[0013] In a possible implementation, the circuit further comprises: two or more USB interface indicator lights.

[0014] The two or more USB interface indicator lights are electrically connected with the master control chip.

[0015] In a possible implementation, eight second USB input and output interfaces are provided, and eight USB interface indicator lights are also provided.

[0016] In a possible implementation, the model of the master control chip is EPM240T100C5N.

[0017] In a possible implementation, the first DIP switch and the second DIP switch are both four-bit DIP switches.

[0018] Beneficial effects: The first input end of the master control chip U1 receives instructions from a computer through an RS232 serial port to switch the connection between the first USB input and output interface USB8 and the two or more second USB input and output interfaces. The first DIP switch SW1 and the second DIP switch SW2 are used for manually setting the connection between the first USB input and output interface USB8 and the second USB input and output interface. The application integrates the manual switching mode and the automatic switching mode on the same circuit, which not only can switch the connection relationship between the first USB input and output interface USB8 and the two or more second USB input and output interfaces through the manual mode, but also can switch the connection relationship between the first USB input and output interface USB8 and the two or more second USB input and output interfaces through the automatic mode. The application has the dual advantages of flexibility of manual switching and convenience of automatic switching, can replace the two switching modes according to different application scenarios, and makes the application more widely.

[0019] Other features and aspects of the present application will become apparent from the following detailed description of exemplary embodiments, taken in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0020] The accompanying drawings incorporated in and forming a part of the specification, illustrate exemplary embodiments, features and aspects of the present application and, together with the description, serve to explain the principles of the present application.

[0021] Figure 1 Structure schematic diagram of USB signal switching circuit of the embodiment of the present application;

[0022] Figure 2 Circuit diagram of voltage conversion circuit of the embodiment of the present application;

[0023] Figure 3 Partial circuit diagram of USB signal switching circuit of the embodiment of the present application;

[0024] Figure 4 Circuit diagram of serial port level conversion circuit of the embodiment of the present application;

[0025] Figure 5 Partial circuit diagram of USB signal switching circuit of the embodiment of the present application;

[0026] Figure 6 Circuit diagram of clock chip of the embodiment of the present application;

[0027] Figure 7 Circuit diagram of reset button S1 of the embodiment of the present application;

[0028] Figure 8 Partial circuit diagram of master control chip U1 of the embodiment of the present application;

[0029] Figure 9 Circuit diagram of multiplexer chip U3 of the embodiment of the present application;

[0030] Figure 10 Circuit diagram of eight second USB input and output interfaces of the embodiment of the present application;

[0031] Figure 11 Circuit diagram of first dial switch SW1 and second dial switch SW2 of the embodiment of the present application;

[0032] Figure 12 Circuit diagram of auxiliary power supply interface of the embodiment of the present application;

[0033] Figure 13 Circuit diagram of eight USB interface indicator lights of the embodiment of the present application;

[0034] Figure 14 A structure diagram of a USB signal switching circuit of an embodiment of the present application is shown;

[0035] Figure 15 A PCB partial view of a USB signal switching circuit of an embodiment of the present application is shown;

[0036] Figure 16 A PCB partial view of a USB signal switching circuit of an embodiment of the present application is shown;

[0037] Figure 17 A PCB partial view of a USB signal switching circuit of an embodiment of the present application is shown;

[0038] Figure 18 A PCB partial view of a USB signal switching circuit of an embodiment of the present application is shown;

[0039] Figure 19 A PCB view of a USB signal switching circuit of an embodiment of the present application is shown. DETAILED DESCRIPTION

[0040] Various exemplary embodiments, features, and aspects of the present application will be described in detail below with reference to the accompanying drawings. The same reference numbers in the drawings indicate functionally similar or the same elements. Although various aspects of the embodiments are illustrated in the drawings, the drawings are not necessarily drawn to scale unless specifically indicated.

[0041] It should be understood that the terms "center", "longitudinal", "transverse", "length", "width", "upper", "lower", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application or simplifying the description, and do not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, and therefore cannot be understood as limiting the present application.

[0042] In addition, the terms "first", "second", are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined with "first", "second" can explicitly or implicitly include one or more of the features. In the description of the present application, the meaning of "multiple" is two or more, unless otherwise specifically limited.

[0043] The word "exemplary" is used herein to mean "serving as an example, instance, or illustration." Any implementation described herein as "exemplary" is not necessarily to be construed as preferred or advantageous over other implementations.

[0044] In addition, for a better understanding of the present application, numerous specific details are given in the following detailed description. It will be understood by those skilled in the art that the present application can be practiced without certain specific details. In some instances, well-known methods, procedures, components and circuits have not been described in detail so as not to obscure the pertinent aspects of the present application.

[0045] A USB signal switching circuit comprises a first USB input-output interface USB8, two or more second USB input-output interfaces, a master chip U1, a multiplexer chip U3, a serial port level conversion circuit, a voltage conversion circuit, a first DIP switch SW1 and a second DIP switch SW2. The first input end of the master chip U1 is electrically connected with the output end of the serial port level conversion circuit, and is adapted to input a control signal from a computer. The output end of the master chip U1 is electrically connected with the input end of the multiplexer chip U3 through the second DIP switch SW2. The first DIP switch SW1 is electrically connected with the multiplexer chip U3. The first USB input-output interface USB8 and the two or more second USB input-output interfaces are electrically connected with the multiplexer chip U3. The input end of the voltage conversion circuit is adapted to input a working voltage. The first output end of the voltage conversion circuit is electrically connected with the second input end of the master chip U1, and is adapted to supply power to the master chip U1. The second output end of the voltage conversion circuit is electrically connected with the input end of the serial port level conversion circuit. The third output end of the voltage conversion circuit is electrically connected with the multiplexer chip U3, and is adapted to supply power to the multiplexer chip U3. The fourth output end of the voltage conversion circuit is electrically connected with the input end of the first DIP switch SW1, and is adapted to supply power to the DIP switch.

[0046] It should be noted that the first USB input and output interface USB8 is a master device interface, and the second USB input and output interface is a slave interface. The first USB input and output interface USB8 can be used as a USB input interface, and two or more second USB input and output interfaces can be used as USB output interfaces. Alternatively, two or more second USB input and output interfaces can be used as USB input interfaces, and the first USB input and output interface USB8 can be used as a USB output interface. However, the first USB input and output interface USB8 is connected to only one of the two or more second USB input and output interfaces at the same time. The first input end of the master control chip U1 receives instructions from a computer through an RS232 serial port to switch the connection between the first USB input and output interface USB8 and the two or more second USB input and output interfaces. The first DIP switch SW1 and the second DIP switch SW2 are used to manually set the connection between the first USB input and output interface USB8 and the second USB input and output interface. The functions are the same as the control effect of the RS232 serial port receiving instructions. When the EN bit of the second DIP switch SW2 is dialled to the upper ON, it is in manual setting mode. When the EN bit of the second DIP switch SW2 is dialled to the lower OFF, it is in RS232 serial port receiving control mode. The master control chip U1 is suitable for implementing the entire control logic. The control logic switches the connection between the first USB input and output interface USB8 and the two or more second USB input and output interfaces by receiving RS232 serial port instructions or reading the address bit of the multiplexer chip U3 set by the first DIP switch SW1 and the second DIP switch SW2.

[0047] The application integrates the manual switching mode and the automatic switching mode on the same circuit. The connection between the first USB input and output interface USB8 and the two or more second USB input and output interfaces can be switched not only by the manual mode but also by the automatic mode. The application has the dual advantages of flexibility of manual switching and convenience of automatic switching. The two switching modes can be replaced according to different application scenarios, so that the application is more widely used.

[0048] In a possible implementation manner, as Figure 2As shown, the voltage conversion circuit comprises: an inductor L1 and a voltage conversion chip U2; the model of the voltage conversion chip U2 is LM1117. The input end of the inductor L1 is connected to the USB_5V voltage; the output end of the inductor L1 is electrically connected to the third pin (VIN end) of the voltage conversion chip U2, and the fourth pin and the second pin (VOUT end) of the voltage conversion chip U2 are adapted to output the converted VCC3.3V voltage. The voltage conversion circuit further comprises: capacitors C7, C5, C2 and C3; one end of the capacitors C7 and C5 is electrically connected to the third pin (VIN end) of the voltage conversion chip U2, and the other end of the capacitors C7 and C5 is grounded, which is adapted to filter the input voltage conversion chip U2 USB_5V voltage; one end of the capacitors C2 and C3 is electrically connected to the fourth pin (VOUT end) of the voltage conversion chip U2, and the other end of the capacitors C2 and C3 is grounded, which is adapted to filter the VCC3.3V voltage output by the voltage conversion chip U2.

[0049] In a possible implementation, as shown in Figure 3 one end of the capacitors C8, C9, C10, C11, C12, C13, C14 and C15 is electrically connected to the fourth pin (VOUT end) of the voltage conversion chip U2, and the other end is grounded, which is adapted to filter the converted voltage.

[0050] In a possible implementation, the serial port level conversion circuit comprises: a level conversion chip U4; the input end of the level conversion chip U4 is electrically connected to the voltage conversion circuit, and the output end of the level conversion chip U4 is electrically connected to the main control chip U1. Further, the model of the level conversion chip U4 is MAX3232. As shown in Figure 4As shown, the 16th pin (VCC end) of the level conversion chip U4 is electrically connected with the voltage conversion chip U2, which is applicable to access VCC_3.3V voltage; the 2nd pin (V+ end) of the level conversion chip U4 is electrically connected with the voltage conversion chip U2 through the capacitor C28; the 2nd pin (V- end) of the level conversion chip U4 is grounded through the capacitor C27; the 14th pin and the 13th pin of the level conversion chip U4 are electrically connected with the serial communication interface COM0 (the COM0 serial communication interface is connected to the serial port of the computer through a serial port line so as to receive the control instruction signal sent by the computer); the 11th pin of the level conversion chip U4 is electrically connected with the 2nd pin (IO end) of the main control chip U1 through the resistor R37; the 12th pin of the level conversion chip U4 is electrically connected with the 1st pin (IO end) of the main control chip U1 through the resistor R38; the 4th pin of the level conversion chip U4 is electrically connected with the 5th pin of the level conversion chip U4 through the capacitor C26; and the 1st pin of the level conversion chip U4 is electrically connected with the 3rd pin of the level conversion chip U4 through the capacitor C25. It should be noted that the function of the level conversion chip U4 is to convert the 3.3V TTL level into the RS232 level and transmit to the main control chip U1. Among them, the resistor R37 and the resistor R38 are current limiting protection resistors; and the capacitor C25 and the capacitor C26 are boost capacitors.

[0051] In a possible implementation manner, as shown in Figure 5 As shown, the J1-1 end of the program download interface is electrically connected with the 24th pin (TCK end) of the main control chip U1, and the J1-1 end of the program download interface is electrically connected with one end of the resistor R6, and the other end of the resistor R6 is grounded; the J1-3 end of the program download interface is electrically connected with the 25th pin (TDO end) of the main control chip U1, and the J1-3 end of the program download interface is electrically connected with one end of the resistor R7, and the other end of the resistor R7 is connected to 3.3V voltage; the J1-5 end of the program download interface is electrically connected with the 22nd pin (TMS end) of the main control chip U1, and the J1-5 end of the program download interface is electrically connected with one end of the resistor R8, and the other end of the resistor R8 is connected to 3.3V voltage; the J1-9 end of the program download interface is electrically connected with the 23rd pin (TDI end) of the main control chip U1, and the J1-9 end of the program download interface is electrically connected with one end of the resistor R9, and the other end of the resistor R9 is connected to 3.3V voltage; the J1-2 end of the program download interface is grounded with the J1-10 end of the program download interface; and the J1-4 end of the program download interface is electrically connected with the voltage conversion chip U2 to access 3.3V voltage. It should be noted that the program download interface is used for programming the main control chip U1 and can also be used for function upgrade.

[0052] In a possible implementation manner, further comprising: a reset button S1; as Figure 7As shown in the figure, the first pin and the second pin of the reset button S1 are grounded; the third pin of the reset button S1 is connected to the voltage conversion chip U2 through a resistor R47 and is connected to a 3.3V voltage; the fourth pin of the reset button S1 is connected to the 50th pin of the main control chip U1. Further comprising: a capacitor C29, one end of the capacitor C29 is connected to the third pin of the reset button S1, and the other end of the capacitor C29 is connected to the second pin of the reset button S1; the capacitor C29 is a key anti-shake filter capacitor.

[0053] In a possible implementation, further comprising: a clock chip Y1; as Figure 6 shown in the figure, the fourth pin (VCC end) of the clock chip Y1 is connected to the output end of the voltage conversion chip U2 to access a VCC 3.3V voltage; the first pin (NC end) of the clock chip Y1 is grounded through a capacitor C4; the second pin (GND end) of the clock chip Y1 is grounded; and the third pin (XO end) of the clock chip Y1 is connected to the 62nd pin (GCLK2 end) of the main control chip U1 through a resistor R10.

[0054] In a possible implementation, the model of the multiplexer chip U3 is MAX4999. As Figure 9 shown in the figure, the 20th pin (VCC_2 end) and the second pin (VCC_1 end) of the multiplexer chip are connected to the output end of the voltage conversion chip U2 through the parallel filter capacitors C23 and C24 to access a 3.3V voltage. It should be noted that the main control chip U1 is connected to the multiplexer chip U3 through a second DIP switch SW2, and further, the second DIP switch SW2 is a four-bit DIP switch; as Figure 9 and Figure 11 shown in the figure, the sixth pin (C0 end) of the multiplexer chip U3 is connected to the second pin of the second DIP switch SW2, the seventh pin of the second DIP switch SW2 is connected to the 82nd pin of the main control chip U1; the seventh pin (C1 end) of the multiplexer chip U3 is connected to the third pin of the second DIP switch SW2, the sixth pin of the second DIP switch SW2 is connected to the 83rd pin of the main control chip U1; the eighth pin (C2 end) of the multiplexer chip U3 is connected to the fourth pin of the second DIP switch SW2, the fifth pin of the second DIP switch SW2 is connected to the 84th pin of the main control chip U1; the third pin (EN end) of the multiplexer chip U3 is connected to the first pin of the second DIP switch SW2, the eighth pin of the second DIP switch SW2 is connected to the 81st pin of the main control chip U1; the 24th pin, the 21st pin, the 17th pin, the 14th pin, the 11th pin, the 30th pin, and the 27th pin of the multiplexer chip U3 are grounded.

[0055] In a possible implementation, as Figure 10As shown, the circuit diagram of all the second USB input / output interfaces; the first pin of each second USB input / output interface is connected to USB_5V voltage; the second pin and the third pin of each second USB input / output interface are electrically connected with the multiplexer chip U3; the fourth pin of each second USB input / output interface is grounded; the sixth pin of each second USB input / output interface is grounded through a capacitor (anti-interference and anti-static effect), and the fifth pin of each second USB input / output interface is grounded through a resistor (anti-interference and anti-static effect).

[0056] In a possible implementation, as shown in Figure 10 Eight second USB input / output interfaces are provided, and the structures of the eight second USB input / output interfaces are the same and the eight second USB input / output interfaces are electrically connected with the multiplexer chip U3. The first USB input / output interface USB8 of the application can be connected with one of the eight second USB input / output interfaces (USB0-USB7) at any time, so that a maximum of eight devices can be connected, and a maximum of eight computer devices (including embedded systems) can share one USB interface device.

[0057] Further, the 9th pin (DO_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB0 through the resistor R1, the 10th pin (DO_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB0 through the resistor R2; the 12th pin (D1_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB1 through the resistor R4; the 13th pin (D1_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB1 through the resistor R3; the 15th pin (D2_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB2 through the resistor R12; the 16th pin (D2_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB2 through the resistor R11; the 18th pin (D3_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB3 through the resistor R16; the 19th pin (D3_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB3 through the resistor R15; the 22nd pin (D4_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB4 through the resistor R18; the 23rd pin (D4_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB4 through the resistor R19; the 25th pin (D5_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB5 through the resistor R21; the 26th pin (D5_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB5 through the resistor R22; the 28th pin (D6_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB6 through the resistor R24; the 29th pin (D6_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB6 through the resistor R25; the 31st pin (D7_1 end) of the multiplexer chip U3 is electrically connected with the 3rd pin of the second USB input / output interface USB7 through the resistor R27; the 32nd pin (D7_0 end) of the multiplexer chip U3 is electrically connected with the 2nd pin of the second USB input / output interface USB7 through the resistor R28.

[0058] It should be noted that the resistor R1, the resistor R2, etc. are current-limiting protection resistors; the resistor R13 is a grounding resistor of the second USB input / output interface shell.

[0059] In a possible implementation, as Figure 9As shown, the second pin of the first USB input / output interface USB8 is electrically connected with the fourth pin (COM0 end) of the multiplexer chip U3 through the resistor R31; the third pin of the first USB input / output interface USB8 is electrically connected with the fifth pin (COM1 end) of the multiplexer chip U3 through the resistor R30; the sixth pin of the first USB input / output interface USB8 is grounded through the capacitor C22; the fifth pin of the first USB input / output interface USB8 is grounded through the resistor R32; the fourth pin of the first USB input / output interface USB8 is grounded; and the first pin of the first USB input / output interface USB8 is connected with the USB_5V voltage.

[0060] It should be noted that the first USB input / output interface USB8 has no direct connection relationship with the other eight second USB input / output interfaces (USB0-USB7), and is connected through the multiplexer chip U3. The multiplexer chip U3 is equivalent to an electronic switch, and the address switching internal logic controls the automatic connection of the USB interface.

[0061] In a possible implementation, the USB interface indicator light also has eight, and the eight USB interface indicator lights all adopt light emitting diodes. As shown in Figure 12 As shown, the second pin of the light emitting diode D1 is electrically connected with the forty-second pin of the main control chip U1 through the resistor R39; the second pin of the light emitting diode D2 is electrically connected with the forty-first pin of the main control chip U1 through the resistor R40; the second pin of the light emitting diode D3 is electrically connected with the fortieth pin of the main control chip U1 through the resistor R41; the second pin of the light emitting diode D4 is electrically connected with the thirty-ninth pin of the main control chip U1 through the resistor R42; the second pin of the light emitting diode D5 is electrically connected with the thirty-eighth pin of the main control chip U1 through the resistor R43; the second pin of the light emitting diode D6 is electrically connected with the thirty-seventh pin of the main control chip U1 through the resistor R44; the second pin of the light emitting diode D7 is electrically connected with the thirty-sixth pin of the main control chip U1 through the resistor R45; and the second pin of the light emitting diode D8 is electrically connected with the thirty-fifth pin of the main control chip U1 through the resistor R46. The first pins of all the light emitting diodes are grounded. It should be noted that the eight light emitting diodes (D1-D8) are suitable for indicating the working states of the eight second USB input / output interfaces (USB0-USB7) respectively; the light emitting diode beside the second USB input / output interface to which the first USB input / output interface USB8 is connected will be lit up.

[0062] In a possible implementation, as shown in Figure 8 As shown, the model of the main control chip U1 (CPLD main control chip) is EPM240T100C5N. As shown in Figure 8 As shown, the tenth pin, the eleventh pin, the thirty-second pin, the forty-sixth pin, the sixtieth pin, the sixty-fifth pin, the seventy-ninth pin and the ninety-third pin of the main control chip U1 are grounded.Figure 2 As shown, the 9th pin, the 45th pin, the 31st pin, the 80th pin, the 94th pin, the 59th pin, the 63rd pin and the 13th pin of the master chip U1 are electrically connected with the voltage conversion chip U2 to access 3.3V voltage.

[0063] In a possible implementation, the application further comprises a first DIP switch SW1, and the first DIP switch SW1 is electrically connected with the multiplexer chip U3. Figure 11 As shown, the 1st pin, the 2nd pin, the 3rd pin and the 4th pin of the first DIP switch SW1 are grounded; the 8th pin of the first DIP switch SW1 is electrically connected with the 3rd pin of the reset chip U3 and is electrically connected with the voltage conversion chip U2 through the resistor R33 to access VCC 3.3V voltage; the 7th pin of the first DIP switch SW1 is electrically connected with the 6th pin of the reset chip U3 and is electrically connected with the voltage conversion chip U2 through the resistor R34 to access VCC 3.3V voltage; the 6th pin of the first DIP switch SW1 is electrically connected with the 7th pin of the reset chip U3 and is electrically connected with the voltage conversion chip U2 through the resistor R35 to access VCC 3.3V voltage; and the 5th pin of the first DIP switch SW1 is electrically connected with the 8th pin of the reset chip U3 and is electrically connected with the voltage conversion chip U2 through the resistor R36 to access VCC 3.3V voltage.

[0064] In a possible implementation, as shown in the figure, Figure 12 As shown, the application further comprises an auxiliary power interface J6 which is a DC 5V power adapter interface, and a self-locking switch SW3 which is a power switch of the interface. By default, the USB interface of a computer can be used for power supply, but when the power consumption of the device connected to the application is large or the load capacity of the USB interface is limited, a DC 5V / 2A power adapter can be used to supply power to the circuit. When the power is supplied through the interface, the self-locking switch SW3 needs to be pressed down.

[0065] Compared with the existing USB expander, the application has the advantages of not needing to install a driver, no limitation on the multiplexing direction of the USB interface, and being able to be used for both USB interface expansion and USB interface multi-selection function, the USB interface can be switched by sending a command through a serial port, and the USB interface does not need to be plugged in or unplugged when manually selecting and switching, and has the function of online switching of the USB interface device.

[0066] The use of the application is as follows

[0067] The USB signal is switched in an automatic switching mode:

[0068] 1. Turn all the 4-bit first DIP switch SW1 to the off state.

[0069] 2. Turn all the 4-bit second DIP switch SW2 to the on state.

[0070] 3, COM0 serial port communication interface and the serial port of the computer are connected by male-female straight-through serial port line, or the serial port of the USB selector is directly connected with the serial port of the USB converter.

[0071] 4, 1 byte of 16 hexadecimal data (the data range is 0X00-0X07, if the data exceeds the range, the USB selection port is switched to the second USB input / output interface USB0 by default) is sent to the master control chip U1 by the serial port debugging assistant, the serial port communication baud rate is 9600bps, after the master control chip U1 receives the data, the data is sent to the reset chip U3, the reset chip U3 switches the USB interface to the set port (0X00 to 0X07 correspond to switching the USB port to the second USB input / output interface USB0 to the second USB input / output interface USB7), after the setting is successful, the status indicator light of the selected second USB input / output interface is lit, the first USB input / output interface USB8 is the USB public port (switching to any one of the eight second USB input / output interfaces, the first USB input / output interface USB8 is connected with the second USB input / output interface).

[0072] 5, when the reset button S1 is pressed, the application is in the reset state (the first USB input / output interface USB8 is not connected with any second USB input / output interface).

[0073] When the USB signal is switched by manual switching mode:

[0074] 1, first set all 4-bit second DIP switch SW2 to off state;

[0075] 2, manually switch the USB interface by turning the 4-bit first DIP switch SW1. The first bit of the first DIP switch SW1 is the USB interface enable end, which is turned to off state to enable the USB selector. The second bit of the DIP switch SW1 is the lowest bit of the USB interface selection address, which is turned to off state to be "1" and turned to on state to be "0". The third bit of the DIP switch SW1 is the second bit of the USB interface selection address, which is turned to off state to be "1" and turned to on state to be "0". The fourth bit of the DIP switch SW1 is the highest bit of the USB interface selection address, which is turned to off state to be "1" and turned to on state to be "0". When the 4-bit first DIP switch SW1 is turned to "off-on-on-on" from left to right, the second USB input / output interface USB0 is selected, and in turn, when the 4-bit DIP switch SW1 is turned to "off-off-off-off" from left to right, the second USB input / output interface USB7 is selected.

[0076] Having described various embodiments of the application, it is to be understood that the above description is meant not to limit and not to encompass all of the possible embodiments. Many modifications and variations of this application can be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. It is intended that the scope of the application be defined by the scope of the patent and by the claims as allowed by the patent office, which can include adaptations based on the description, equivalents, and / or substitutions of elements individually or collectively to the entire disclosure.

Claims

1. A USB signal switching circuit, characterized by, The application relates to a USB interface expansion device. The first input end of the main control chip is electrically connected with the output end of the serial port level conversion circuit, and is adapted to input a control signal sent by a computer; the output end of the main control chip is electrically connected with the input end of the multiplexer chip through the second DIP switch; and the first DIP switch is electrically connected with the multiplexer chip. The first USB input and output interface and the two or more second USB input and output interfaces are electrically connected with the multiplexer chip. The input end of the voltage conversion circuit is adapted to input a working voltage; the first output end of the voltage conversion circuit is electrically connected with the second input end of the main control chip, and is adapted to supply power for the main control chip; the second output end of the voltage conversion circuit is electrically connected with the input end of the serial port level conversion circuit; the third output end of the voltage conversion circuit is electrically connected with the multiplexer chip, and is adapted to supply power for the multiplexer chip; and the fourth output end of the voltage conversion circuit is electrically connected with the input end of the first DIP switch, and is adapted to supply power for the first DIP switch. The serial port level conversion circuit comprises a level conversion chip; the input end of the level conversion chip is electrically connected with the voltage conversion circuit; and the output end of the level conversion chip is electrically connected with the main control chip.

2. The USB signal switching circuit of claim 1, wherein, The model of the level conversion chip is MAX3232.

3. The USB signal switching circuit of claim 2, wherein, The voltage conversion circuit comprises an inductor and a voltage conversion chip; the input end of the inductor is connected with a USB_5V voltage; the output end of the inductor is electrically connected with the input end of the voltage conversion chip; and the output end of the voltage conversion chip is adapted to output a converted voltage.

4. The USB signal switching circuit of claim 1, wherein, The model of the voltage conversion chip is LM1117.

5. The USB signal switching circuit of claim 4, wherein, The model of the multiplexer chip is MAX4999.

6. The USB signal switching circuit of claim 1, wherein, The application further comprises:

7. The USB signal switching circuit of claim 1, wherein, Two or more USB interface indicator lamps; The two or more USB interface indicator lamps are electrically connected with the main control chip. There are eight second USB input and output interfaces, and there are also eight USB interface indicator lamps.

8. The USB signal switching circuit of claim 7, wherein, The model of the main control chip is EPM240T100C5N.

9. The USB signal switching circuit of claim 1, wherein, The first DIP switch and the second DIP switch are both four-bit DIP switches.

10. The USB signal switching circuit of claim 1, wherein, ​

Images