Thin film transistor

Abstract

The utility model relates to a thin film transistor. The thin film transistor comprises a substrate; a gate electrode formed on the substrate; an insulating layer covering the gate electrode; source / drain electrodes formed horizontally spaced apart on the insulating layer and including a conductive metal pattern and a conductive oxide layer covering the conductive metal pattern; a semiconductor layer bonded to the spaced spaces of the source / drain electrode; and a passivation layer covering the source / drain electrode and the semiconductor layer.

Description

Technical Field

[0001] This invention relates to a thin-film transistor. More specifically, it relates to a thin-film transistor capable of maintaining or increasing the conductivity of the source / drain electrodes by preventing the pattern of the conductive metal constituting the source / drain electrodes from being etched away during the semiconductor layer formation process. Background Technology

[0002] An image display device (such as a liquid crystal display) is a device that injects liquid crystal between two substrates on which transparent electrodes are formed to obtain an image effect by utilizing the difference in the refractive index of light caused by the anisotropy of the liquid crystal.

[0003] A liquid crystal display (LCD) includes a display panel and a panel driving unit. The display panel includes multiple gate lines and data lines. The panel driving unit includes a gate driving unit that provides gate signals to the multiple gate lines and a data driving unit that provides data voltages to the data lines.

[0004] The display panel includes thin-film transistors (TFTs) arranged in each pixel to turn the pixels on and off. The TFTs act as switches. Active-matrix liquid crystal displays (AM-LCDs) are widely used, offering superior resolution and video display capabilities. In such AM-LCDs, a first electrode is turned on and off on a pixel-by-pixel basis, and a second electrode is used as a common electrode.

[0005] Liquid crystal displays (LCDs) use wiring to relay signals. The wiring is typically made of conductive metals with low resistivity and strong corrosion resistance, such as aluminum, aluminum alloys, and copper.

[0006] However, when manufacturing thin-film transistors, the etchants used in the process of forming the semiconductor layer (e.g., IGZO) (e.g., acetic acid, organic acids, hydrochloric acid, perchloric acid, etc.) have the characteristic of etching conductive metals such as aluminum and copper. As a result, when the semiconductor layer such as IGZO is formed after the source / drain electrodes are formed with conductive metals, the conductive metal of the source / drain electrodes is etched away, leading to a problem of reduced conductivity of the source / drain electrodes. Utility Model Content

[0007] Technical issues

[0008] The purpose of this invention is to maintain or increase the conductivity of the source / drain electrodes by preventing the conductive metal constituting the source / drain electrodes from being etched away during the semiconductor layer formation process when manufacturing thin-film transistors.

[0009] Technical solution

[0010] To achieve this objective, the thin-film transistor of this invention includes a substrate, a gate electrode, an insulating layer, a source / drain electrode, a semiconductor layer, a passivation layer, etc.

[0011] The substrate supports the gate electrode and the like formed thereon, and can be a rigid substrate such as glass or a flexible substrate such as a polymer organic material.

[0012] The gate electrode is formed on the substrate.

[0013] An insulating layer is formed while covering the gate electrode.

[0014] The source / drain electrodes are formed horizontally spaced on the insulating layer. The source / drain electrodes consist of a conductive metal pattern and a conductive oxide layer covering the conductive metal pattern.

[0015] The semiconductor layer is formed in the space between the source and drain electrodes.

[0016] The passivation layer is formed simultaneously covering the source / drain electrodes and the semiconductor layer.

[0017] In the thin-film transistor of this invention, the source / drain electrodes are formed as an exposed surface in which a conductive oxide layer covers a conductive metal pattern.

[0018] In the thin-film transistor of this invention, the width of the conductive oxide layer from the exposed surface (boundary surface) of the conductive metal pattern is 0.5 μm or greater.

[0019] In the source / drain electrodes of the thin-film transistor of this invention, the conductive metal pattern is formed with a width of 3 μm to 15 μm, and the conductive oxide layer is formed with a width of 4 μm to 24 μm.

[0020] In the thin-film transistor of this invention, the gate electrode and conductive metal pattern are composed of molybdenum-niobium (MoNb), and the semiconductor layer is composed of IGZO (indium gallium zinc oxide).

[0021] The image display device according to this utility model includes the thin-film transistor described above.

[0022] The imaging device according to this invention includes the aforementioned thin-film transistor.

[0023] The photodiode device according to this invention includes the aforementioned thin-film transistor.

[0024] Beneficial effects

[0025] The transistor of this invention, with this structure, prevents the conductive metal pattern of the source / drain electrodes from being etched away during the semiconductor layer formation process by forming a conductive oxide layer, such as ITO, that is resistant to semiconductor layer (e.g., IGZO) etchants, surrounding and protecting the conductive metal pattern of the source / drain electrodes. Therefore, the conductivity of the source / drain electrodes can be maintained or increased.

[0026] In addition, the transistor of this invention can prevent the conductive metal pattern of the source / drain electrode from being etched away by the semiconductor layer (e.g., IGZO) etchant by forming a conductive oxide layer that is 0.5 μm wider than the conductive metal pattern forming the source / drain electrode to cover the source / drain electrode. Attached Figure Description

[0027] Figure 1 This is a cross-sectional view of the thin-film transistor according to the present invention.

[0028] Figure 2 This is a plan view of the thin-film transistor according to the present invention.

[0029] List of reference numerals

[0030] 110: Substrate; 120: Gate electrode; 130: Insulating layer; 140: Source electrode; 141: Source conductive metal pattern; 142: Source conductive oxide layer; 150: Drain electrode; 151: Drain conductive metal pattern; 152: Drain conductive oxide layer; 160: Semiconductor layer; 170: Passivation layer. Detailed Implementation

[0031] The present invention will be described in more detail below.

[0032] Figure 1 This is a cross-sectional view of the thin-film transistor according to the present invention. Figure 2 This is a plan view of the thin-film transistor according to the present invention.

[0033] like Figure 1 and Figure 2 As shown, the thin-film transistor of this invention may include a substrate 110, a gate electrode 120, an insulating layer 130, a source electrode 140, a drain electrode 150, a semiconductor layer 160, a passivation layer 170, etc.

[0034] The substrate 110 supports the gate electrode 120 and the like formed thereon, and can be a rigid or flexible substrate. The rigid substrate can be made of glass, quartz, etc. The flexible substrate can be made of polymer organic materials, etc.

[0035] The gate electrode 120 that applies a control (drive) signal to the thin-film transistor can be formed on the substrate 110.

[0036] The gate electrode 120 may be made of a conductive metal. The conductive metal may be a single metal or an alloy thereof (e.g., MoNb, etc.) such as silver (Ag), copper (Cu), gold (Au), aluminum (Al), platinum (Pt), palladium (Pd), chromium (Cr), tungsten (W), titanium (Ti), tantalum (Ta), iron (Fe), cobalt (Co), nickel (Ni), zinc (Zn), tellurium (Te), vanadium (V), niobium (Nb), molybdenum (Mo).

[0037] The gate electrode 120 can be formed by: forming a conductive metal layer on the substrate 110 by sputtering or the like; forming a pattern by applying / patterning / developing a resist layer on the conductive metal layer; wet or dry etching the conductive metal layer corresponding to the pattern of the resist layer; stripping the resist layer; and cleaning. For example, an etchant composition containing hydrogen peroxide, fluorine compounds, pyrrole-based compounds, sulfonic acids, organic (per)acids, and / or organic salts can be used for wet etching of the conductive metal layer. More specifically, the etchant composition may contain 15 to 25 wt% hydrogen peroxide, 0.1 to 2 wt% fluorine compounds, 0.1 to 1 wt% pyrrole-based compounds, 0.3 to 1 wt% sulfonic acids, 0.01 to 3 wt% one or more compounds selected from organic (per)acids and organic salts, and the balance being water.

[0038] The insulating layer 130 serves as a gate insulator to insulate the gate electrode 120 from the source electrode 140 / drain electrode 150 / semiconductor layer 160, and can be formed to cover the top of the gate electrode 120.

[0039] The insulating layer 130 can be formed of inorganic or organic insulators. Inorganic insulators can be, for example, silicon oxide (SiOx), silicon nitride (SiNx), etc. Organic insulators can be, for example, polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, benzocyclobutene, etc.

[0040] The insulating layer 130 can be formed by applying an insulator to the top of the gate electrode 120 and performing a film formation step. Any known coating method can be used to apply the insulator, such as spin coating, die coating, spray coating, roll coating, screen coating, slot coating, dip coating, gravure coating, etc. Depending on the material properties of the insulator, film formation can be performed by thermosetting, UV curing, thermal drying, vacuum drying, etc.

[0041] The source electrode 140 may be composed of a source conductive metal pattern 141 and a source conductive oxide layer 142 surrounding the top and sides of the source conductive metal pattern 141.

[0042] Similar to the gate electrode 120, the source conductive metal pattern 141 can be made of a conductive metal. For example, the conductive metal can be a single metal or an alloy thereof such as silver (Ag), copper (Cu), gold (Au), aluminum (Al), platinum (Pt), palladium (Pd), chromium (Cr), tungsten (W), titanium (Ti), or MoNb.

[0043] Similar to the formation of the gate electrode 120, the source conductive metal pattern 141 can be formed by: forming a conductive metal layer on the insulating layer 130 by sputtering or the like; forming a pattern by applying / patterning / developing a resist layer on the conductive metal layer; wet or dry etching the conductive metal layer corresponding to the pattern of the resist layer; stripping the resist layer; and cleaning.

[0044] The source conductive metal pattern 141 can be formed with a width of 15 μm or less to correspond to a pixel size of 119 μm × 119 μm in a high-resolution image display device. The source conductive metal pattern 141 needs to have a width of 3 μm or greater to ensure the minimum conductivity required for signal processing. Therefore, the source conductive metal pattern 141 can preferably be formed with a width of 3 μm to 15 μm.

[0045] The source conductive oxide layer 142 can be formed to surround the source conductive metal pattern 141, i.e., to cover the top and sides.

[0046] The source conductive oxide layer 142 can be made of a transparent conductive oxide alone or in mixtures, such as tin oxide, zinc oxide, gallium oxide, indium oxide, etc. Specifically, at least one selected from the group consisting of ITO (indium tin oxide), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide), In2O3 (indium oxide), IGO (indium gallium oxide), AZO (aluminum zinc oxide), ITZO (indium tin zinc oxide), GZO (gallium zinc oxide), ZnO (zinc oxide), Sn2O3 (tin oxide), and TiO2 (titanium dioxide) can be used.

[0047] The source conductive oxide layer 142 can be formed by: forming a conductive oxide on the source conductive metal layer 141 by sputtering or the like; forming a pattern by applying / patterning / developing a resist layer on the conductive oxide layer; wet or dry etching the conductive oxide layer corresponding to the pattern on the resist layer; stripping the resist layer; and cleaning. For example, the conductive oxide layer can be etched using a wet etchant containing hydrogen peroxide; an acid with a pKa less than 1; a fluorine compound containing an alkali metal; or a metal salt selected from ferric chloride (III), cobalt nitrate (III), copper nitrate (II), and ferric nitrate (II).

[0048] The source conductive oxide layer 142 can be formed with a width of 24 μm or less, preferably 21 μm or less, to correspond to a pixel size of 119 μm × 119 μm in a high-resolution image display device. The source conductive oxide layer 142 needs to be wider than 3 μm to cover the source conductive metal pattern 141 formed underneath with a width of 3 μm to 15 μm. Therefore, the width of the source conductive oxide layer 142 can be greater than 3 μm up to 24 μm, preferably greater than 3 μm up to 21 μm.

[0049] Similar to the source electrode 140, the drain electrode 150 may be composed of a drain conductive metal pattern 151 and a drain conductive oxide layer 152 surrounding the drain conductive metal pattern 151.

[0050] Similar to the source conductive metal pattern 141, the drain conductive metal pattern 151 can be made of a single metal such as silver (Ag), copper (Cu), gold (Au), aluminum (Al), platinum (Pt), palladium (Pd), chromium (Cr), tungsten (W), titanium (Ti) or alloys thereof (e.g., MoNb, etc.).

[0051] The drain conductive metal pattern 151 can be formed in the same or similar form in the process of forming the source conductive metal pattern 141.

[0052] Similar to the source conductive metal pattern 141, the drain conductive metal pattern 151 can preferably be formed with a width of 3 μm to 15 μm.

[0053] Similar to the source conductive oxide layer 142, the drain conductive oxide layer 152 is formed around the drain conductive metal pattern 151. The drain conductive oxide layer 152 can be made alone or in mixtures of, for example, tin oxide, zinc oxide, gallium oxide, indium oxide, etc. Specifically, at least one selected from the group consisting of ITO (indium tin oxide), IZO (indium zinc oxide), IGZO (indium gallium zinc oxide), In2O3 (indium oxide), IGO (indium gallium oxide), AZO (aluminum zinc oxide), ITZO (indium tin zinc oxide), GZO (gallium zinc oxide), ZnO (zinc oxide), Sn2O3 (tin oxide), and TiO2 (titanium dioxide) can be used.

[0054] The drain conductive oxide layer 152 can be formed in the same or similar form in the process used to form the source conductive oxide layer 142.

[0055] Similar to the source conductive oxide layer 142, the drain conductive oxide layer 152 can be formed to have a width greater than 3 μm up to 24 μm, preferably greater than 3 μm up to 21 μm.

[0056] The semiconductor layer 160 forms a channel layer between the source electrode 140 and the drain electrode 150 in response to the drive signal of the gate electrode 120, and can be formed by filling the gap space between the source electrode 140 and the drain electrode 150 on the insulating layer 130.

[0057] The semiconductor layer 160 can be formed of an amorphous semiconductor, such as indium gallium zinc oxide (IGZO). Alternatively, the semiconductor layer 160 can be formed of at least one material selected from the group consisting of ITO (indium tin oxide), ZnO (zinc oxide), Sn2O3 (tin oxide), TiO2 (titanium dioxide), ZnSnO (zinc tin oxide), CdSnO (cadmium tin oxide), GaSnO (gallium tin oxide), TiSnO (titanium tin oxide), InGaZnO (indium gallium zinc oxide), CuAlO (copper aluminum oxide), SrCuO (strontium copper oxide), LaCuOS (lanthanum copper oxysulfide), GaN (gallium nitride), InGaN (indium gallium nitride), AlGaN (aluminum gallium nitride), CNT (carbon nanotubes), and InGaAlN (indium gallium aluminum nitride).

[0058] The semiconductor layer 160 can be formed by: forming an IGZO layer between and on part or all of the source electrode 140 and drain electrode 150 by methods such as sputtering, chemical vapor deposition, plasma-assisted chemical vapor deposition, vacuum deposition, electron beam deposition, ion plating, pulsed laser deposition, etc.; forming a pattern by applying / patterning / developing a resist layer on the IGZO layer; wet or dry etching the IGZO layer corresponding to the pattern of the resist layer; stripping the resist layer; and cleaning.

[0059] In the process of etching the IGZO layer during the formation of semiconductor layer 160, an etchant containing, for example, acetic acid, citric acid, hydrochloric acid, or perchloric acid is used in the case of wet etching, while a processing gas containing bromine (Br) or iodine (I) is used in the case of dry etching. Both wet etchants and dry etching gases have the property of etching conductive metals such as silver (Ag), copper (Cu), gold (Au), and aluminum (Al), or conductive alloys such as molybdenum-niobium (MoNb).

[0060] However, unlike existing technologies, according to this invention, a conductive oxide layer of wet etching solution or dry etching gas resisting the IGZO layer covers the conductive metal pattern of the source electrode 140 and the drain electrode 150. As a result, during the formation process of the semiconductor layer 160, damage (i.e., etching) to the conductive metal pattern that determines the conductivity (or electrical conductance) of the source electrode 140 and the drain electrode 150 can be effectively prevented. Therefore, this invention can maintain or increase the conductivity (or electrical conductance) of the source electrode 140 and the drain electrode 150.

[0061] Table 1 below shows the results of measuring whether the conductive metal pattern (MoNb) was etched based on the coverage width of the conductive oxide layer (ITO) when the IGZO layer was wet-etched with acetic acid. Here, if the etching of the conductive metal pattern occurred, it is marked with '○', and if no etching occurred, it is marked with 'x'.

[0062] [Table 1]

[0063]

[0064]

[0065] As shown in Table 1 above, it was confirmed that no etching occurs on the MoNb pattern if the coverage width of the ITO layer is greater than 0.5 μm. Here, the coverage width of the ITO layer is measured perpendicular to the exposed surface (boundary surface) of the conductive metal pattern.

[0066] As described above, it is preferable that the width of the conductive metal pattern is formed to be 3 μm to 15 μm, and the width of the conductive oxide layer is formed to be greater than 3 μm up to 24 μm (preferably greater than 3 μm up to 21 μm). Therefore, considering that the etching of the conductive metal pattern (MoNb) varies with the coverage width of the conductive oxide layer (ITO), the width of the conductive metal pattern can be formed to be 3 μm to 15 μm, and the width of the conductive oxide layer can be formed to be 4 μm to 24 μm.

[0067] The passivation layer 170 covers and protects the source electrode 140, the drain electrode 150, and the semiconductor layer 160, and can be formed of an insulator, such as a curable prepolymer, a curable polymer, a plastic polymer, etc.

[0068] The passivation layer 170 can also use a film-forming varnish-type material. Examples of varnish-type materials include polysiloxanes such as polydimethylsiloxane (PDMS), polyorganosiloxanes (POS), or polyimides, or polyurethanes such as elastic fibers. As a flexible insulator, these varnish-type materials can increase the elongation and dynamic folding capability of the product.

[0069] The aforementioned thin-film transistors can be applied to image display devices. Image display devices may include organic EL displays (OLEDs), quantum dot nanorod displays (QNEDs), micro LEDs, reflective, transmissive, or semi-transparent LCDs, inorganic EL displays (IELs), plasma displays, field emission displays, electronic paper, etc.

[0070] In addition, the aforementioned thin-film transistors can also be used in imaging devices, photodiode devices, etc.

[0071] Although specific embodiments of the present invention have been shown and described, those skilled in the art will understand that the present invention is not intended to be limited to the preferred embodiments, and it will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the present invention.

[0072] Therefore, the scope of this utility model is defined by the appended claims and their equivalents.

Claims

1. A thin-film transistor, characterized in that, include: Substrate; A gate electrode is formed on the substrate; An insulating layer covering the gate electrode; Source / drain electrodes are formed horizontally spaced on the insulating layer, the source / drain electrodes comprising a conductive metal pattern and a conductive oxide layer covering the conductive metal pattern; Semiconductor layers bonded to the spaced spaces of the source / drain electrodes; as well as A passivation layer covering the source / drain electrodes and the semiconductor layer.

2. The thin-film transistor according to claim 1, characterized in that, The conductive oxide layer covers the exposed surface of the conductive metal pattern in the source / drain electrodes.

3. The thin-film transistor according to claim 2, characterized in that, The distance between the conductive oxide layer and the exposed surface of the conductive metal pattern is 0.5 μm or greater.

4. The thin-film transistor according to claim 3, characterized in that, In the source / drain electrodes, the conductive metal pattern is formed with a width of 3 μm to 15 μm, and the conductive oxide layer is formed with a width of 4 μm to 24 μm.

5. The thin-film transistor according to claim 1, characterized in that, The gate electrode and the conductive metal pattern are made of molybdenum and niobium.

6. The thin-film transistor according to claim 1, characterized in that, The semiconductor layer is composed of indium gallium zinc oxide.

7. An image display device, characterized in that, Includes a thin-film transistor according to any one of claims 1 to 6.

8. An imaging device, characterized in that, Includes a thin-film transistor according to any one of claims 1 to 6.

9. A photodiode device, characterized in that, Includes a thin-film transistor according to any one of claims 1 to 6.

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