Code-scanning pickup control system

By designing a barcode scanning and retrieving control system, and utilizing the specific pin connections and circuit optimizations of the STM32F103C8T6 control chip and the HT7333-A and PM200-2-07-S-4.3 chips, the problem of limited application of unmanned receiving equipment in specific environments and locations was solved, and the system was miniaturized and highly reliable.

CN224152885UActive Publication Date: 2026-04-21FOR WEIYIXIAO (SHANDONG) NETWORK TECHNOLOGY CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
FOR WEIYIXIAO (SHANDONG) NETWORK TECHNOLOGY CO LTD
Filing Date
2025-06-27
Publication Date
2026-04-21

AI Technical Summary

Technical Problem

Existing unmanned delivery devices are limited by environmental and location constraints in their application to certain items, preventing their widespread adoption.

Method used

A barcode scanning and item collection control system was designed, using an STM32F103C8T6 control chip as the processor, combined with HT7333-A and PM200-2-07-S-4.3 control chips. Through specific pin connections and circuit optimization, including capacitor banks and optocouplers, voltage and current regulation is achieved to ensure system reliability.

Benefits of technology

The system achieves miniaturization, simple structure, ease of use, high reliability during long-term operation, and avoids malfunctions.

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Abstract

The utility model provides a code-scanning article-picking control system, and belongs to the field of intelligent control systems. Comprising a control chip U3 of which the model number is STM32F103C8T6, the control chip U3 comprises 1-48 wiring pins, a control chip U2 of which the model number is HT7333-A, and a control chip U1 of which the model number is PM200-2-07-S-4. 3; a fifth wiring pin of the control chip U3 is connected with a PD0-OSCIN end, and the PD0-OSCIN end is grounded through an electrodeless capacitor C9; a sixth wiring pin of the control chip U3 is a PD1-OSCOUT end, the PD1-OSCOUT end is grounded through an electrodeless capacitor C11, and the PD0-OSCIN end and the PD1-OSCOUT end are connected through a quartz crystal oscillator X1. The system takes a single chip microcomputer as a processor, has the advantages of small volume, simple structure, convenience in use and higher reliability, and does not have a fault problem after long-time work.
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Description

Technical Field

[0001] This utility model relates to the field of intelligent control systems, and in particular to a barcode scanning and item collection control system. Background Technology

[0002] As we all know, with the support of the Internet of Things, intelligentization, unmanned operation, and automation have developed rapidly in recent years. Automatic ticket vending machines, automatic beverage vending machines, automatic fitness equipment dispensing machines, and so on are ubiquitous in people's lives.

[0003] Although unmanned delivery devices have been systematically implemented in various aspects of people's lives, some items are still limited by environment and location and have not been widely adopted. Summary of the Invention

[0004] The technical problem to be solved by this utility model is to address the shortcomings of the existing technology by providing a barcode scanning and item collection control system. This system uses a microcontroller as the processor, is small in size, has a simple structure, is very convenient to use, has high reliability, and will not have any malfunctions even after long-term operation.

[0005] The technical solution of this utility model is to provide a barcode scanning and collection control system, including a control chip U3 with model number STM32F103C8T6, the control chip U3 having 1-48 pins, a control chip U2 with model number HT7333-A, and a control chip U1 with model number PM200-2-07-S-4.3.

[0006] Pin 5 of the control chip U3 is connected to the PD0-OSC_IN terminal, which is grounded through a non-polar capacitor C9; pin 6 of the control chip U3 is connected to the PD1-OSC_OUT terminal, which is grounded through a non-polar capacitor C11; the PD0-OSC_IN terminal and the PD1-OSC_OUT terminal are connected through a quartz crystal oscillator X1.

[0007] Pin 7 of control chip U3 is the NRST terminal, pin 8 of control chip U3 is the VSSA terminal, and pin 9 of control chip U3 is the VDDA terminal. The NRST terminal is connected to the VDDA terminal of pin 9 of control chip U3 through resistor R16. The NRST terminal is also grounded through non-polar capacitor C10, and switch SW1 is connected in parallel with capacitor C10. The VSSA terminal is grounded.

[0008] Pin 12 of control chip U3 is PA2, and pin 13 of control chip U3 is PA3. PA2 is connected to the data receiving port VIN of chip U2, and PA3 is connected to the data transmitting port VOUT of control chip U2. VIN of control chip U2 is connected to a 12V power supply, and the positive terminal of polarized capacitor C5 is connected to VIN of control chip U2. The negative terminal of polarized capacitor C5 is grounded. VOUT of control chip U2 is connected to a 3.3V power supply, and VOUT of control chip U2 is connected to GND of control chip U2 through non-polarized capacitors C6, C7, and C13. GND of control chip U2 is grounded.

[0009] Pin 14 of the control chip U3 is PA4. PA4 is connected to the negative terminal of LED3. The positive terminal of LED3 is connected to a 3.3V power supply through resistor R23.

[0010] Pin 16 of the control chip U3 is PA6. PA6 is connected to the XW terminal on the limit module. The XW terminal is connected to a 3.3V power supply through resistor 19. The XW terminal is also connected to a four-terminal optocoupler U5. Pin 4 of the four-terminal optocoupler U5 is connected to the XW terminal. Pins 2 and 3 of the four-terminal optocoupler U5 are grounded. Pin 1 of the four-terminal optocoupler U5 is connected to the limit switch CN3 through resistor R20. Pin 1 of the four-terminal optocoupler U5 is connected to pin 2 of the limit switch CN3 through resistor R20. Pin 1 of the limit switch CN3 is connected to a 12V power supply.

[0011] Pin 17 of the control chip U3 is PA7. PA7 is connected to ZM on the limit module. ZM is connected to NPN transistor Q5 through resistor R21. ZM is connected to the base (B) of NPN transistor Q5. The emitter (E) of NPN transistor Q5 is grounded. The base (B) of NPN transistor Q5 is grounded through resistor R22. The collector (C) of NPN transistor Q5 is connected to photosensitive switch CN4 and to terminal 2 of photosensitive switch CN4. Terminal 1 of photosensitive switch CN4 is connected to a 12V power supply.

[0012] Pin 20 of control chip U3 is PB2, which is connected to resistor R18 in the BOOT1 circuit, with the other end of resistor R18 grounded. Pin 44 of control chip U3 is BOOT0, which is connected to resistor R17 in the BOOT0 circuit, with the other end of resistor R17 grounded. Pin 23 of control chip U3 is VSS_1, which is grounded. Pin 24 of control chip U3 is VDD_1, which is connected to... 3.3V power supply; pin 30 of control chip U3 is PA9, which is connected to U1_TX on terminal H1. U1_TX is located at terminal 3 of terminal H1. Pin 31 of control chip U3 is PA10, which is connected to U1_RX on terminal H1. U1_RX is located at terminal 2 of terminal H1. Terminal 1 of terminal H1 is connected to 3.3V power supply, and terminal 4 of terminal H1 is grounded.

[0013] Pin 34 of control chip U3 is PA13, which is connected to PA13_SWDIO on terminal H2. PA13_SWDIO is located at terminal 3 of terminal H2. Pin 37 of control chip U3 is PA14, which is connected to PA14_SWCLK on terminal H2. PA14_SWCLK is located at terminal 2 of terminal H2. Terminal 1 of terminal H2 is connected to a 3.3V power supply, and terminal 4 of terminal H2 is grounded.

[0014] Pin 35 of control chip U3 is VSS_2, which is grounded; pin 36 of control chip U3 is VDD_2, which is connected to a 3.3V power supply; pin 41 of control chip U3 is PB5, which is connected to pin 13 of control chip U1 via resistor R24; pins 1 and 2 of control chip U1 are both connected to a 12V power supply, and pins 3 and 4 of control chip U1 are both grounded; pin 8 of control chip U1 is MAIN_TXD, which is connected to... The NPN transistor Q2 is connected to its emitter (E) terminal. The base (B) terminal of the NPN transistor Q2 is connected to the MAIN_TXD terminal of pin 8 of the control chip U1 via resistor R6. The collector (C) terminal of the NPN transistor Q2 is connected to a 3.3V power supply via resistor R7. The collector (C) terminal of the NPN transistor Q2 is also connected to one end of resistor R8, and the other end of resistor R8 is connected to the U2_RX terminal, which is the pin 13 of the control chip U3. The base (B) terminal of the NPN transistor Q2 is connected to one end of resistor R5, and the other end of resistor R5 is connected to the V_PAD terminal.

[0015] Pin 7 of control chip U1 is the MAIN_RXD terminal. An NPN transistor Q4 is connected to the MAIN_RXD terminal, and its collector (C) is connected to the collector (C) terminal. The base (B) terminal of the NPN transistor Q4 is connected to the MAIN_RXD terminal of pin 7 of control chip U1 via resistor R13. The emitter (E) terminal of the NPN transistor Q4 is connected to a 3.3V power supply via resistor R11. The emitter of the NPN transistor Q4 is also connected to one end of resistor R14. The other end of resistor R14 is connected to the U2_TX terminal, which is pin 12 of control chip U3. The base (B) terminal of the NPN transistor Q4 is connected to one end of resistor R10. The other end of resistor R10 is connected to the V_PAD terminal. A non-polarized capacitor C8 is connected in parallel with resistor R10. The V_PAD terminal is located at pin 12 of control chip U1.

[0016] Pin 46 of control chip U3 is the DJ terminal. The DJ terminal is connected to a four-terminal optocoupler U4 via resistor R9, and is also connected to pin 1 of optocoupler U4. Pin 2 of optocoupler U4 is grounded, and pin 4 of optocoupler U4 is connected to a 12V power supply. Pin 3 of optocoupler U4 is connected to one end of resistor R12, and the other end of resistor R12 is connected to one end of resistor R15, the other end of which is grounded. The end where resistors R12 and R15 are connected is also connected to enhancement-mode MOSFET Q3, and... The gate of enhancement-mode MOSFET Q3 is connected to ground, the gate and drain of enhancement-mode MOSFET Q3 are grounded, a diode M is connected between the source and drain of enhancement-mode MOSFET Q3, the drain of the gate of enhancement-mode MOSFET Q3 is connected to the negative terminal of diode M, the source of enhancement-mode MOSFET Q3 is connected to the positive terminal of diode D2, the negative terminal of diode D2 is connected to a 12V power supply, the negative terminal of diode D2 is also connected to motor control switch CN2, and connected to terminal 1 of motor control switch CN2, and terminal 2 of motor control switch CN2 is connected to the source of enhancement-mode MOSFET Q3;

[0017] Pin 47 of the control chip U3 is VSS_3, which is grounded; pin 48 of the control chip U3 is VDD_3, which is connected to a 3.3V power supply.

[0018] Further optimization of the technical solution also includes an external power supply CN1 connector. Terminal 1 of the power supply CN1 connector is connected to a 12V power supply and provides a stable 12V power supply through a Zener diode D1. Terminal 2 of the external power supply CN1 connector is grounded.

[0019] Further optimization of the technical solution also includes a capacitor bank circuit, in which the positive terminal of the power supply is connected to the 3.3V power supply, the negative terminal is grounded, and four capacitors are connected in parallel between the positive and negative terminals, namely non-polarized capacitor C1, non-polarized capacitor C2, non-polarized capacitor C3 and non-polarized capacitor C4.

[0020] Further optimization of the technical solution: Non-polar capacitors C9 and C11 are both 20pF; the quartz crystal oscillator X1 is 8MHz; resistor R16 is 10kΩ; VDDA terminal is the positive terminal of the U3.3V power supply; non-polar capacitor C10 is 100nF; polar capacitor C5 is 100uF; non-polar capacitors C6 and C13 are 100uF; non-polar capacitor C7 is 22uF; resistor R23 is 4.7kΩ; and resistors R5, R19, and R20 are all... The resistors R12 and R21 are 1kΩ, R22, R17, R10, R15 and R18 are all 10kΩ, R14 and R24 are both 22Ω, R6 and R13 are both 47kΩ, R11 and R7 are both 4.7kΩ, C8 is 33pF, the Zener diode is SS24, and the non-polarized capacitors C1, C2, C3 and C4 are all 100nF.

[0021] The beneficial effects of adopting this technical solution are as follows: This circuit design has the advantages of voltage and current stabilization while ensuring its complete functionality. It uses capacitor banks to realize the storage and release of electrical energy. The system uses a microcontroller as the processor, which has small size, simple structure, is very convenient to use, has strong reliability, and will not have fault problems even after long-term operation. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the pin circuit connection of the control chip U1 in the barcode scanning and collection control system circuit.

[0023] Figure 2 Connect the circuit to pin 13 of the control chip U3.

[0024] Figure 3 Connect the circuit to pin 12 of the control chip U3.

[0025] Figure 4 Connect the circuit to pin 14 of the control chip U3.

[0026] Figure 5 This is a schematic diagram of the pin circuit connection for the control chip U2.

[0027] Figure 6 This is a schematic diagram of the motor drive circuit connected to the motor control switch CN2.

[0028] Figure 7 This is a schematic diagram of the pin circuit connection for the control chip U1.

[0029] Figure 8 This is a schematic diagram of the external power supply circuit connection.

[0030] Figure 9 Connect the circuit to pin 7 of the control chip U3.

[0031] Figure 10 This is to connect pins 20 and 44 of the control chip U3.

[0032] Figure 11 Connect the circuit to pins 5 and 6 of the control chip U3.

[0033] Figure 12 Connect the circuit to pins 34 and 37 of the control chip U3.

[0034] Figure 13 This is a schematic diagram of the circuit connection of the capacitor bank.

[0035] Figure 14 This is a schematic diagram of the circuit connection on terminal H1.

[0036] Figure 15 This is a schematic diagram of the circuit connection on limit switch CN3.

[0037] Figure 16 This is a schematic diagram of the circuit connection on the photosensitive switch CN4. Detailed Implementation

[0038] For ease of explanation, the following is in conjunction with the appendix. Figure 1-16 The circuit of the barcode scanning and item collection control system of the utility model is described in detail.

[0039] A barcode scanning and collection control system includes a control chip U3 with model number STM32F103C8T6, the control chip U3 having 1-48 pins, a control chip U2 with model number HT7333-A, and a control chip U1 with model number PM200-2-07-S-4.3.

[0040] Pin 5 of the control chip U3 is connected to the PD0-OSC_IN terminal, which is grounded through a non-polar capacitor C9; pin 6 of the control chip U3 is connected to the PD1-OSC_OUT terminal, which is grounded through a non-polar capacitor C11; the PD0-OSC_IN terminal and the PD1-OSC_OUT terminal are connected through a quartz crystal oscillator X1.

[0041] Pin 7 of control chip U3 is the NRST terminal, pin 8 of control chip U3 is the VSSA terminal, and pin 9 of control chip U3 is the VDDA terminal. The NRST terminal is connected to the VDDA terminal of pin 9 of control chip U3 through resistor R16. The NRST terminal is also grounded through non-polar capacitor C10, and switch SW1 is connected in parallel with capacitor C10. The VSSA terminal is grounded.

[0042] Pin 12 of control chip U3 is PA2, and pin 13 of control chip U3 is PA3. PA2 is connected to the data receiving port VIN of chip U2, and PA3 is connected to the data transmitting port VOUT of control chip U2. VIN of control chip U2 is connected to a 12V power supply, and the positive terminal of polarized capacitor C5 is connected to VIN of control chip U2. The negative terminal of polarized capacitor C5 is grounded. VOUT of control chip U2 is connected to a 3.3V power supply, and VOUT of control chip U2 is connected to GND of control chip U2 through non-polarized capacitors C6, C7, and C13. GND of control chip U2 is grounded.

[0043] Pin 14 of the control chip U3 is PA4. PA4 is connected to the negative terminal of LED3. The positive terminal of LED3 is connected to a 3.3V power supply through resistor R23.

[0044] Pin 16 of the control chip U3 is PA6. PA6 is connected to the XW terminal on the limit module. The XW terminal is connected to a 3.3V power supply through resistor 19. The XW terminal is also connected to a four-terminal optocoupler U5. Pin 4 of the four-terminal optocoupler U5 is connected to the XW terminal. Pins 2 and 3 of the four-terminal optocoupler U5 are grounded. Pin 1 of the four-terminal optocoupler U5 is connected to the limit switch CN3 through resistor R20. Pin 1 of the four-terminal optocoupler U5 is connected to pin 2 of the limit switch CN3 through resistor R20. Pin 1 of the limit switch CN3 is connected to a 12V power supply.

[0045] Pin 17 of the control chip U3 is PA7. PA7 is connected to ZM on the limit module. ZM is connected to NPN transistor Q5 through resistor R21. ZM is connected to the base (B) of NPN transistor Q5. The emitter (E) of NPN transistor Q5 is grounded. The base (B) of NPN transistor Q5 is grounded through resistor R22. The collector (C) of NPN transistor Q5 is connected to photosensitive switch CN4 and to terminal 2 of photosensitive switch CN4. Terminal 1 of photosensitive switch CN4 is connected to a 12V power supply.

[0046] Pin 20 of control chip U3 is PB2, which is connected to resistor R18 in the BOOT1 circuit, with the other end of resistor R18 grounded. Pin 44 of control chip U3 is BOOT0, which is connected to resistor R17 in the BOOT0 circuit, with the other end of resistor R17 grounded. Pin 23 of control chip U3 is VSS_1, which is grounded. Pin 24 of control chip U3 is VDD_1, which is connected to... 3.3V power supply; pin 30 of control chip U3 is PA9, which is connected to U1_TX on terminal H1. U1_TX is located at terminal 3 of terminal H1. Pin 31 of control chip U3 is PA10, which is connected to U1_RX on terminal H1. U1_RX is located at terminal 2 of terminal H1. Terminal 1 of terminal H1 is connected to 3.3V power supply, and terminal 4 of terminal H1 is grounded.

[0047] Pin 34 of control chip U3 is PA13, which is connected to PA13_SWDIO on terminal H2. PA13_SWDIO is located at terminal 3 of terminal H2. Pin 37 of control chip U3 is PA14, which is connected to PA14_SWCLK on terminal H2. PA14_SWCLK is located at terminal 2 of terminal H2. Terminal 1 of terminal H2 is connected to a 3.3V power supply, and terminal 4 of terminal H2 is grounded.

[0048] Pin 35 of control chip U3 is VSS_2, which is grounded; pin 36 of control chip U3 is VDD_2, which is connected to a 3.3V power supply; pin 41 of control chip U3 is PB5, which is connected to pin 13 of control chip U1 via resistor R24; pins 1 and 2 of control chip U1 are both connected to a 12V power supply, and pins 3 and 4 of control chip U1 are both grounded; pin 8 of control chip U1 is MAIN_TXD, which is connected to... The NPN transistor Q2 is connected to its emitter (E) terminal. The base (B) terminal of the NPN transistor Q2 is connected to the MAIN_TXD terminal of pin 8 of the control chip U1 via resistor R6. The collector (C) terminal of the NPN transistor Q2 is connected to a 3.3V power supply via resistor R7. The collector (C) terminal of the NPN transistor Q2 is also connected to one end of resistor R8, and the other end of resistor R8 is connected to the U2_RX terminal, which is the pin 13 of the control chip U3. The base (B) terminal of the NPN transistor Q2 is connected to one end of resistor R5, and the other end of resistor R5 is connected to the V_PAD terminal.

[0049] Pin 7 of control chip U1 is the MAIN_RXD terminal. An NPN transistor Q4 is connected to the MAIN_RXD terminal, and its collector (C) is connected to the collector (C) terminal. The base (B) terminal of the NPN transistor Q4 is connected to the MAIN_RXD terminal of pin 7 of control chip U1 via resistor R13. The emitter (E) terminal of the NPN transistor Q4 is connected to a 3.3V power supply via resistor R11. The emitter of the NPN transistor Q4 is also connected to one end of resistor R14. The other end of resistor R14 is connected to the U2_TX terminal, which is pin 12 of control chip U3. The base (B) terminal of the NPN transistor Q4 is connected to one end of resistor R10. The other end of resistor R10 is connected to the V_PAD terminal. A non-polarized capacitor C8 is connected in parallel with resistor R10. The V_PAD terminal is located at pin 12 of control chip U1.

[0050] Pin 46 of control chip U3 is the DJ terminal. The DJ terminal is connected to a four-terminal optocoupler U4 via resistor R9, and is also connected to pin 1 of optocoupler U4. Pin 2 of optocoupler U4 is grounded, and pin 4 of optocoupler U4 is connected to a 12V power supply. Pin 3 of optocoupler U4 is connected to one end of resistor R12, and the other end of resistor R12 is connected to one end of resistor R15, the other end of which is grounded. The end where resistors R12 and R15 are connected is also connected to enhancement-mode MOSFET Q3, and... The gate of enhancement-mode MOSFET Q3 is connected to ground, the gate and drain of enhancement-mode MOSFET Q3 are grounded, a diode M is connected between the source and drain of enhancement-mode MOSFET Q3, the drain of the gate of enhancement-mode MOSFET Q3 is connected to the negative terminal of diode M, the source of enhancement-mode MOSFET Q3 is connected to the positive terminal of diode D2, the negative terminal of diode D2 is connected to a 12V power supply, the negative terminal of diode D2 is also connected to motor control switch CN2, and connected to terminal 1 of motor control switch CN2, and terminal 2 of motor control switch CN2 is connected to the source of enhancement-mode MOSFET Q3;

[0051] Pin 47 of the control chip U3 is VSS_3, which is grounded; pin 48 of the control chip U3 is VDD_3, which is connected to a 3.3V power supply.

[0052] Further optimization of the technical solution also includes an external power supply CN1 connector. Terminal 1 of the power supply CN1 connector is connected to a 12V power supply and provides a stable 12V power supply through a Zener diode D1. Terminal 2 of the external power supply CN1 connector is grounded.

[0053] Further optimization of the technical solution also includes a capacitor bank circuit, in which the positive terminal of the power supply is connected to the 3.3V power supply, the negative terminal is grounded, and four capacitors are connected in parallel between the positive and negative terminals, namely non-polarized capacitor C1, non-polarized capacitor C2, non-polarized capacitor C3 and non-polarized capacitor C4.

[0054] Further optimization of the technical solution: Non-polar capacitors C9 and C11 are both 20pF; the quartz crystal oscillator X1 is 8MHz; resistor R16 is 10kΩ; VDDA terminal is the positive terminal of the U3.3V power supply; non-polar capacitor C10 is 100nF; polar capacitor C5 is 100uF; non-polar capacitors C6 and C13 are 100uF; non-polar capacitor C7 is 22uF; resistor R23 is 4.7kΩ; and resistors R5, R19, and R20 are all... The resistors R12 and R21 are 1kΩ, R22, R17, R10, R15 and R18 are all 10kΩ, R14 and R24 are both 22Ω, R6 and R13 are both 47kΩ, R11 and R7 are both 4.7kΩ, C8 is 33pF, the Zener diode is SS24, and the non-polarized capacitors C1, C2, C3 and C4 are all 100nF.

[0055] The beneficial effects of adopting this technical solution are as follows: This circuit design has the advantages of voltage and current stabilization while ensuring its complete functionality. It uses capacitor banks to realize the storage and release of electrical energy. The system uses a microcontroller as the processor, which has small size, simple structure, is very convenient to use, has strong reliability, and will not have fault problems even after long-term operation.

[0056] In the above embodiments, the preferred implementation of the present utility model has been described. Obviously, many changes can still be made under the inventive concept of the present utility model. Here, it should be stated that any changes made under the inventive concept of the present utility model will fall within the protection scope of the present utility model.

Claims

1. A code scanning and item control system, characterized by: This includes control chip U3 (model STM32F103C8T6, with 1-48 pins), control chip U2 (model HT7333-A), and control chip U1 (model PM200-2-07-S-4.3). Pin 5 of the control chip U3 is connected to the PD0-OSC_IN terminal, and the PD0-OSC_IN terminal is grounded through the non-polarized capacitor C9; Pin 6 of the control chip U3 is the PD1-OSC_OUT terminal. The PD1-OSC_OUT terminal is grounded through the non-polar capacitor C11. The PD0-OSC_IN terminal and the PD1-OSC_OUT terminal are connected through the quartz crystal oscillator X1. Pin 7 of control chip U3 is the NRST terminal, pin 8 of control chip U3 is the VSSA terminal, and pin 9 of control chip U3 is the VDDA terminal. The NRST terminal is connected to the VDDA terminal of pin 9 of control chip U3 through resistor R16. The NRST terminal is also grounded through non-polar capacitor C10, and switch SW1 is connected in parallel with capacitor C10. The VSSA terminal is grounded. Pin 12 of control chip U3 is PA2, and pin 13 of control chip U3 is PA3. PA2 is connected to the data receiving port VIN of chip U2, and PA3 is connected to the data transmitting port VOUT of control chip U2. VIN of control chip U2 is connected to a 12V power supply. VIN of control chip U2 is connected to the positive terminal of polarized capacitor C5, and the negative terminal of polarized capacitor C5 is grounded. VOUT of control chip U2 is connected to a 3.3V power supply. VOUT of control chip U2 is connected to GND of control chip U2 through non-polarized capacitors C6, C7, and C13, respectively. GND of control chip U2 is grounded. Pin 14 of the control chip U3 is PA4. PA4 is connected to the negative terminal of LED3. The positive terminal of LED3 is connected to a 3.3V power supply through resistor R23. Pin 16 of the control chip U3 is PA6. PA6 is connected to the XW terminal on the limit module. The XW terminal is connected to a 3.3V power supply through resistor 19. The XW terminal is also connected to a four-terminal optocoupler U5. Pin 4 of the four-terminal optocoupler U5 is connected to the XW terminal. Pins 2 and 3 of the four-terminal optocoupler U5 are grounded. Pin 1 of the four-terminal optocoupler U5 is connected to the limit switch CN3 through resistor R20. Pin 1 of the four-terminal optocoupler U5 is connected to pin 2 of the limit switch CN3 through resistor R20. Pin 1 of the limit switch CN3 is connected to a 12V power supply. Pin 17 of the control chip U3 is PA7. PA7 is connected to ZM on the limit module. ZM is connected to NPN transistor Q5 through resistor R21. ZM is connected to B of NPN transistor Q5. E of NPN transistor Q5 is grounded. B of NPN transistor Q5 is grounded through resistor R22. C of NPN transistor Q5 is connected to photosensitive switch CN4 and connected to terminal 2 of photosensitive switch CN4. Terminal 1 of photosensitive switch CN4 is connected to a 12V power supply. Pin 20 of the control chip U3 is PB2. Pin PB2 is connected to resistor R18 in the BOOT1 circuit, and the other end of resistor R18 is grounded. Pin 44 of the control chip U3 is BOOT0. Pin BOOT0 is connected to resistor R17 in the BOOT0 circuit, and the other end of resistor R17 is grounded. Pin 23 of the control chip U3 is the VSS_1 terminal, and the VSS_1 terminal is grounded; Pin 24 of the control chip U3 is VDD_1, which is powered by a 3.3V supply. Pin 30 of control chip U3 is PA9, which is connected to U1_TX on terminal H1. U1_TX is located at terminal 3 of terminal H1. Pin 31 of control chip U3 is PA10, which is connected to U1_RX on terminal H1. U1_RX is located at terminal 2 of terminal H1. Terminal 1 of terminal H1 is connected to a 3.3V power supply, and terminal 4 of terminal H1 is grounded. Pin 34 of control chip U3 is PA13, which is connected to PA13_SWDIO on terminal H2. PA13_SWDIO is located at terminal 3 of terminal H2. Pin 37 of control chip U3 is PA14, which is connected to PA14_SWCLK on terminal H2. PA14_SWCLK is located at terminal 2 of terminal H2. Terminal 1 of terminal H2 is connected to a 3.3V power supply, and terminal 4 of terminal H2 is grounded. Pin 35 of the control chip U3 is the VSS_2 terminal, and the VSS_2 terminal is grounded; Pin 36 of the control chip U3 is VDD_2, and VDD_2 is connected to a 3.3V power supply. Pin 41 of control chip U3 is PB5. Pin PB5 is connected to pin 13 of control chip U1 through resistor R24. Pins 1 and 2 of control chip U1 are both connected to a 12V power supply, and pins 3 and 4 of control chip U1 are both grounded. Pin 8 of control chip U1 is the MAIN_TXD terminal. An NPN transistor Q2 is connected to the MAIN_TXD terminal, and its emitter (E) is connected to the emitter (E) terminal. The base (B) terminal of the NPN transistor Q2 is connected to the MAIN_TXD terminal of pin 8 of control chip U1 via resistor R6. The collector (C) terminal of the NPN transistor Q2 is connected to a 3.3V power supply via resistor R7. One end of resistor R8 is also connected to the collector (C) terminal of the NPN transistor Q2. The other end of resistor R8 is connected to the U2_RX terminal, which is pin 13 of control chip U3. One end of resistor R5 is connected to the base (B) terminal of the NPN transistor Q2. The other end of resistor R5 is connected to the V_PAD terminal. Pin 7 of control chip U1 is the MAIN_RXD terminal. An NPN transistor Q4 is connected to the MAIN_RXD terminal, and its collector (C) is connected to the collector (C) terminal. The base (B) terminal of the NPN transistor Q4 is connected to the MAIN_RXD terminal of pin 7 of control chip U1 via resistor R13. The emitter (E) terminal of the NPN transistor Q4 is connected to a 3.3V power supply via resistor R11. The emitter of the NPN transistor Q4 is also connected to one end of resistor R14. The other end of resistor R14 is connected to the U2_TX terminal, which is pin 12 of control chip U3. The base (B) terminal of the NPN transistor Q4 is connected to one end of resistor R10. The other end of resistor R10 is connected to the V_PAD terminal. A non-polarized capacitor C8 is connected in parallel with resistor R10. The V_PAD terminal is located at pin 12 of the control chip U1; Pin 46 of control chip U3 is the DJ terminal. The DJ terminal is connected to a four-terminal optocoupler U4 via resistor R9, and is also connected to pin 1 of optocoupler U4. Pin 2 of optocoupler U4 is grounded, and pin 4 of optocoupler U4 is connected to a 12V power supply. Pin 3 of optocoupler U4 is connected to one end of resistor R12, and the other end of resistor R12 is connected to one end of resistor R15, the other end of which is grounded. The end where resistors R12 and R15 are connected is also connected to enhancement-mode MOSFET Q3, and... The gate of enhancement-mode MOSFET Q3 is connected to ground, the gate and drain of enhancement-mode MOSFET Q3 are grounded, a diode M is connected between the source and drain of enhancement-mode MOSFET Q3, the drain of the gate of enhancement-mode MOSFET Q3 is connected to the negative terminal of diode M, the source of enhancement-mode MOSFET Q3 is connected to the positive terminal of diode D2, the negative terminal of diode D2 is connected to a 12V power supply, the negative terminal of diode D2 is also connected to motor control switch CN2, and connected to terminal 1 of motor control switch CN2, and terminal 2 of motor control switch CN2 is connected to the source of enhancement-mode MOSFET Q3; Pin 47 of the control chip U3 is VSS_3, and VSS_3 is grounded. Pin 48 of the control chip U3 is the VDD_3 terminal, which is connected to a 3.3V power supply.

2. The code scanning and item retrieving control system according to claim 1, characterized in that: Also includes The external power supply CN1 connector has a 12V power supply connected to terminal 1, which provides a stable 12V power supply through the Zener diode D1. Terminal 2 of the external power supply CN1 connector is grounded.

3. The code scanning and item retrieving control system of claim 1, wherein: It also includes a capacitor bank circuit, in which the positive terminal of the power supply is connected to the 3.3V power supply, the negative terminal is grounded, and four capacitors are connected in parallel between the positive and negative terminals, namely non-polarized capacitor C1, non-polarized capacitor C2, non-polarized capacitor C3 and non-polarized capacitor C4.

4. The code scanning and item retrieving control system of claim 1, wherein: The non-polar capacitors C9 and C11 are both 20pF, the quartz crystal oscillator X1 is 8MHz, the resistor R16 is 10kΩ, the VDDA terminal is the positive terminal of the U3.3V power supply, the non-polar capacitor C10 is 100nF, the polar capacitor C5 is 100uF, the non-polar capacitors C6 and C13 are 100uF, the non-polar capacitor C7 is 22uF, the resistor R23 is 4.7kΩ, and the resistors R5, R19, and R20 are all 10kΩ. Resistors R12 and R21 are 1kΩ, resistors R22, R17, R10, R15 and R18 are all 10kΩ, resistors R14 and R24 are both 22Ω, resistors R6 and R13 are both 47kΩ, resistors R11 and R7 are both 4.7kΩ, capacitor C8 is 33pF, the Zener diode is SS24, and non-polarized capacitors C1, C2, C3 and C4 are all 100nF.